JPH0462608A - Rush current preventing circuit for dc/dc converter - Google Patents

Abstract

PURPOSE:To satisfactorily control the rush current occurring at start up of a DC/DC converter by making a control transistor function to increase the equivalent resistance of a current control transistor when the large current value is supplied to an input capacitor. CONSTITUTION:A switch 2 is turned on when the charge of an input capacitor 9 is equal to-0. Thus the voltage obtained by dividing the voltage Vin of an input power supply 1 by resistors 5 and 6 is applied to the gate of a MOSFET 8. Then the MOSFET 8 is turned on and a charging current flows to the capacitor 9. When the capacitor 9 is charged and the charging current is reduced, the voltage drop level caused by a current detecting resistor 4 is reduced. Then the base-emitter voltage of an npn transistor 3 is reduced and therefore the gate potential of the MOSFET 8 is increased. As a result, the equivalent resistance of the MOSFET 8 is reduced and the reduction of the charging current is suppressed.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an inrush current prevention circuit for a DC-DC converter that prevents an inrush current when input power is turned on to the DC-DC converter. The present invention relates to a rush current prevention circuit for a DC-DC converter that includes a large capacitor at the input end of the converter.

[Prior Art] In order to suppress fluctuations in input voltage, a DC-DC converter is often provided with a large-capacity capacitor at its input section. In this case, when the input power is turned on, a large rush current flows due to the potential difference between the input power supply voltage and the terminal voltage of the capacitor, which may damage the power switch and the like. For this reason, conventionally, for example, an inrush current prevention circuit as shown in FIG. 5 has been used.

This inrush current prevention circuit includes a two-contact switch 31 and a current limiting resistor 33 connected in series between the input power source 1 and the input capacitor 9 of the DC-DC converter 10, and the current limiting resistor 33. It is composed of relay contacts 34 connected in parallel and a relay control circuit 32 that controls on/off the relay contacts 34 according to the connection state of the two-contact switch 31.

In this circuit, when the charge on the input capacitor 9 is zero,
Relay contact 34 is in an off state.

In this state, when the two-contact switch 31 is turned on and the input power source 1 is applied to the DC-DC converter 10, the relay control circuit 32 is activated and controls to close the relay contact 34 after a predetermined period of time has elapsed. As a result, the current is limited by the current limiting resistor 33 from immediately after the power is turned on until the input capacitor 9 is charged, and when the input capacitor 9 is charged, the current limiting resistor 33 is short-circuited. This is to suppress losses due to normal input current.

Further, when the two-contact switch 31 is turned off, this is detected by the relay control circuit 32, and control is performed to open the relay contact 34 in preparation for the next switch-on.

[Problems to be Solved by the Invention] However, in the conventional inrush current prevention circuit of the DC-DC converter described above, the input capacitor 9 and the current limiting resistor 33 are
Since the charging time for the input capacitor 9 is determined by the time constant determined by the DC - There is a problem that the startup time of the DC converter 10 is long.

Therefore, the resistance value of the current limiting resistor 33 is set to a small value,
It is possible to increase the charging current of the capacitor 9, but in this case, there is a problem that the effect of current limiting is weakened and a large rush current flows, damaging the switch 31.

These problems are especially true for DC-DC devices where the input capacitor has a large capacity and the inrush current must be kept small.
This is noticeable in the case of converters.

The present invention has been made in view of these problems, and it is possible to shorten the startup time of the DC-DC converter, and to sufficiently suppress the rush current.
- An object of the present invention is to provide an inrush current prevention circuit for a DC converter.

[Means for Solving the Problems] The inrush current prevention circuit for a DC-DC converter according to the present invention has a DC-DC converter in which an input capacitor is connected between input terminals.
In a rush current prevention circuit for a DC-DC converter that is connected between the input terminal of a DC converter and an input power source and suppresses a current value flowing to the input capacitor when the input power is turned on, the input power source and the input capacitor are connected. a current-limiting transistor inserted between the current-limiting transistor, a current-sensing resistor that detects the current flowing through the current-limiting transistor, and a current-sensing resistor whose conduction is controlled by the voltage across the current-sensing resistor and whose output is controlled by the current flowing through the current-limiting transistor. The present invention is characterized by comprising a control transistor that controls the equivalent resistance of the current limiting transistor in accordance with a current value that is supplied to a control electrode of the limiting transistor and flows through the current detection resistor.

[Function] According to the present invention, when a large current value flows through the input capacitor when the input power is turned on, this current value is detected by the control transistor via the current detection resistor, and the control transistor limits the current. Since this acts to raise the equivalent resistance of the DC-DC converter, it is possible to sufficiently limit the rush current when starting up the DC-DC converter.

Additionally, as charging of the input capacitor progresses and the charging current value decreases, this current value is detected by the control transistor via the current detection resistor, and the control transistor increases the equivalent resistance of the current limiting transistor. Since it acts to lower the voltage, the charging current value increases. For this reason,
Charging time can be shortened.

[Example] Hereinafter, an example of the present invention will be described based on the accompanying drawings.

FIG. 1 is a circuit diagram of a rush current prevention circuit for a DC-DC converter according to a first embodiment of the present invention.

This circuit is connected between the input power supply 1 and the input capacitor 9 connected between the input terminals of the DC-DC converter, and is configured as follows.

That is, the switch 2, the current detection resistor 4, and the N-channel MO8FET 8 are connected in series between the negative terminal of the input power source 1 and the negative terminal of the input capacitor 9 in this order. Further, resistors 6 and 5 are connected in series between the connection point between the resistor 4 and the source of the MO8FET 8 and the positive terminal of the input power supply 1.

MO8FET8 is a current limiting transistor for suppressing rush current, and its gate is connected to the connection point of resistors 5 and 6. Further, a capacitor 7 is connected between the gate and source of the MO8FET8.

On the other hand, the collector of an NPN transistor 3 is connected to the gate of the MO8FET8. This NPN) transistor 3 is a control transistor for controlling the equivalent resistance of the MO8FET 8, and has a current detection resistor 4 connected between its emitter and base.

Next, the operation of the inrush current prevention circuit according to this embodiment configured as described above will be explained.

FIG. 2 is a waveform diagram showing the operation of this circuit.

Now, when the charge of the input capacitor 9 is zero and the switch 2 is turned on, the voltage obtained by dividing the voltage VITI of the input power supply 1 by the resistor 5.6 is applied to the gate of the MO8FET8. MO8FET 8 is turned on, and charging current Ic flows through input capacitor 9. In addition,
At this time, the capacitor 7 prevents the gate voltage of the MO8FET 8 from rising suddenly.

This current I. increases beyond a preset current value, the voltage drop across the current detection resistor 4 increases, and the NPN
Since the base-emitter voltage of transistor 3 is increased, the gate potential of MO8FET8 is lowered.

As a result, the equivalent resistance of MO8FET8 increases and the current resistance increases. This means that the increase in

On the other hand, charging of the input capacitor 9 progresses, and the current is turned off. When the current detection resistor 4 decreases, the voltage drop caused by the current detection resistor 4 decreases, and the voltage between the base and emitter of the NPN transistor 3 decreases, so that the gate potential of the MO8FET 8 is raised. As a result, the equivalent resistance of MO8FET8 decreases and the current I. This will suppress the decrease in

As a result of such control, the current Ic after the input power supply 1 is turned on is suppressed to a constant value, as shown in FIG. 2, and the voltage Vc between the terminals of the input capacitor 9 rises linearly. .

Here, assuming that the capacity of the input capacitor 9 is 01, the human power supply voltage is V Itl, and the maximum value of the input current is Ip, the charging time t of the input capacitor 9 can be expressed by the following equation (1).

tI=CV+-/Ip (1) Therefore, by fixing the current value Ip at the maximum level at startup, this charging time t1 can be shortened compared to the conventional case.

FIG. 3 is a circuit diagram of an inrush current prevention circuit according to a second embodiment of the present invention.

In this embodiment, an inrush current prevention circuit is provided on the positive electrode side of the input power source 1.

That is, a switch 12 and a current detection resistor 1 are connected between the positive terminal of the input power source 1 and the positive terminal of the input capacitor 9.
4 and P channel MO8FETI8 are connected in series in this order. Also, resistor 14 and MO8FET18
A resistor 16.15 is connected in series between the connection point with the source and the negative terminal of the input power source 1.

MO8FE718 is a current limiting transistor for suppressing inrush current, and its gate is connected to resistor 15.16.
connected to the connection point. Further, a capacitor 17 is connected between the gate and source of the MO8FET 18.

On the other hand, the collector of a PNP transistor 13 is connected to the gate of MO8FET8. This PNP transistor 13 is a control transistor that controls the equivalent resistance of the MO8FET 18, and has a current detection resistor 14 connected between its emitter and base.

In this embodiment as well, when the input current increases, the base-emitter voltage of transistor 13 increases and MO8F
Since the gate of ET18 is pulled up, MO8FET
The equivalent resistance of 18 increases and the current is suppressed. Also, when the input current decreases, the pace number emitter voltage of transistor 13 decreases and the gate of MO8FET18 is pulled down, so the equivalent resistance of MO8FE718 decreases,
Current increases.

In this way, also in this embodiment, since the charging current to the input capacitor 9 at startup is controlled to be a constant value, the DC- It is possible to shorten the startup time of the DC converter.

FIG. 4 is a circuit diagram of an inrush current prevention circuit according to a third embodiment of the present invention.

In FIG. 4, the same parts as in FIG. 1 are given the same reference numerals, and overlapping explanations of the parts will be omitted.

The difference between this circuit and the circuit in Figure 1 is that instead of MO8FET8 in Figure 1, an MO8FET with a current detection function is used.
21 is used. Also, in this example,
A current detection resistor 4 is connected between the first source and the second source of the MO8FET 21 and is not provided in the charging path of the input capacitor 9.

According to this embodiment, since the current detection resistor is not provided in the charging path of the input capacitor 9, there is an advantage that there is no input current loss due to the current detection resistor 4.

[Effects of the Invention] As described above, according to the present invention, when the input power is turned on, the inrush current flowing to the input capacitor is limited by the current limiting transistor, and the current flowing to the current limiting transistor is controlled by the current detecting resistor. Since the equivalent resistance of the current limiting transistor is controlled by detecting it with the control transistor through the device, the input current can be kept at a constant value when the power is turned on. Therefore, the inrush current can be sufficiently suppressed, and the startup time of the DC-DC converter can be shortened.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an inrush current prevention circuit for a DC-DC converter according to a first embodiment of the present invention, FIG. 2 is a waveform diagram showing the operation of the circuit, and FIG. FIG. 4 is a circuit diagram of an inrush current prevention circuit for a DC-DC converter according to a third embodiment of the present invention, and FIG. 5 is a circuit diagram of a conventional inrush current prevention circuit DC-
FIG. 6 is a circuit diagram of the inrush current prevention circuit of the DC converter, and is a waveform diagram showing the operation of the circuit. 1; Input power supply, 2, 12; Switch, 3; NPN transistor, 4, 14; Current detection resistor, 5I8.15, 1
6; Resistor, 7.17; Capacitor, 8.18; MO8
FET19; input capacitor, 10; DC-DC converter, 13; PNP) transistor, 211 MO8FET with current detection function 131: 2 contact switch, 32; I
J Ray control circuit, 33; Current limiting resistor, 34; 'J Ray contact applicant NEC Corporation

Claims (1)

[Claims] (1) DC formed by connecting an input capacitor between input terminals
- A rush current prevention circuit for a DC-DC converter that is connected between the input terminal of the DC converter and the input power source and suppresses a current value flowing to the input capacitor when the input power source is turned on; A current-limiting transistor is inserted between the capacitor and the current-limiting transistor, a current-detecting resistor detects the current flowing through the current-limiting transistor, conduction is controlled by the voltage across the current-detecting resistor, and its output is controlled by the voltage across the current detecting resistor. and a control transistor that controls the equivalent resistance of the current limiting transistor in accordance with a current value supplied to a control electrode of the current limiting transistor and flowing through the current detection resistor. Current prevention circuit.