JPH046822A - Method for manufacturing crystalline semiconductor thin film - Google Patents
Method for manufacturing crystalline semiconductor thin filmInfo
- Publication number
- JPH046822A JPH046822A JP10802290A JP10802290A JPH046822A JP H046822 A JPH046822 A JP H046822A JP 10802290 A JP10802290 A JP 10802290A JP 10802290 A JP10802290 A JP 10802290A JP H046822 A JPH046822 A JP H046822A
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor film
- crystalline semiconductor
- thin film
- amorphous
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 37
- 239000010409 thin film Substances 0.000 title claims description 15
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000000034 method Methods 0.000 title claims description 9
- 239000010408 film Substances 0.000 claims description 76
- 239000013078 crystal Substances 0.000 claims description 25
- 239000000758 substrate Substances 0.000 claims description 10
- 238000010438 heat treatment Methods 0.000 claims description 6
- 238000000206 photolithography Methods 0.000 claims description 3
- 230000001678 irradiating effect Effects 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229910021419 crystalline silicon Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 241000270281 Coluber constrictor Species 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- OQZCSNDVOWYALR-UHFFFAOYSA-N flurochloridone Chemical compound FC(F)(F)C1=CC=CC(N2C(C(Cl)C(CCl)C2)=O)=C1 OQZCSNDVOWYALR-UHFFFAOYSA-N 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本究明は結晶性半導体薄膜の製造方法に関するものであ
って、S OI (Silicon on In5u
lator)構造を形成するのに用いて最適なものであ
る。[Detailed Description of the Invention] [Industrial Application Field] The present study relates to a method for manufacturing a crystalline semiconductor thin film,
It is most suitable for use in forming a lator structure.
結晶性半導体薄膜の製造方法の従来例として特開昭61
−288413号公報に記載されたものがある。第3図
(a)〜第2図(C)に従来例の実施例を示す工程順断
面図を示す。以下図面にもとづいて説明する。As a conventional example of a method for manufacturing a crystalline semiconductor thin film, JP-A-61
There is one described in JP-288413. FIG. 3(a) to FIG. 2(C) are process-order sectional views showing a conventional example. The following will be explained based on the drawings.
まず、第3図(a)に示すように石英基板l。First, as shown in FIG. 3(a), a quartz substrate l is prepared.
上に多結晶Si膜(多結晶シリコン膜)11を減圧気相
成長法により形成した後、第3図(b)に示すように5
in2膜(二酸化シリコン膜)12を積層する。次に、
レーザービーム3を照射して多結晶51M1llを融解
及び結晶化して第3図(C)に示すように単結晶5il
i(単結晶シリコン膜)13にする。5in2膜12は
多結晶Si膜11のレーザー照射時の融解に伴なうシリ
コンの流動を抑制し、冷却後固体化した単結晶Si膜1
3の表面が5in2膜12の無いときに比べ平坦になる
というものである。After forming a polycrystalline Si film (polycrystalline silicon film) 11 thereon by low-pressure vapor phase epitaxy, as shown in FIG.
An in2 film (silicon dioxide film) 12 is laminated. next,
The polycrystalline 51M1ll is melted and crystallized by irradiating the laser beam 3 to form a single crystal 5il as shown in FIG. 3(C).
i (single crystal silicon film) 13. The 5in2 film 12 suppresses the flow of silicon caused by the melting of the polycrystalline Si film 11 during laser irradiation, and solidifies the monocrystalline Si film 1 after cooling.
The surface of the 5in2 film 12 becomes flatter than that without the 5in2 film 12.
しかしながら、レーザービーム3を5in2膜12を通
して多結晶Si膜11へ照射すると、実際に作成される
結晶化した5illは第4図の結晶化Si膜14のよう
に不規則な粒界を有するものとなる。これは、融解した
シリコン膜中の不規則な位置によりシリコン結晶の成長
核が発生するためで、シリコン膜中に存在する隣接し合
うシリコン結晶は、互いの成長を妨げ合い、規則酸のな
い粒界を形成することとなる。また、このようにして形
成された結晶化5iH1d中のシリコン結晶の粒径は不
そろいてシリコン膜中の物性は膜の場所によってかなり
異なるものとなるという問題点を有している。However, when the laser beam 3 is irradiated to the polycrystalline Si film 11 through the 5in2 film 12, the crystallized 5ill actually created has irregular grain boundaries like the crystallized Si film 14 in FIG. Become. This is because growth nuclei of silicon crystals occur due to irregular positions in the molten silicon film, and adjacent silicon crystals in the silicon film prevent each other from growing, resulting in regular acid-free grains. This will form a world. Another problem is that the grain sizes of the silicon crystals in the crystallized 5iH1d thus formed are uneven, and the physical properties of the silicon film vary considerably depending on the location of the film.
本発明は、従来技術が有する上記のような問題点を是正
した制御された粒界と任意に指定した粒径を有するシリ
コン膜を得ることができる結晶性半導体薄膜の製造方法
を提供することを目的とする。The present invention aims to provide a method for manufacturing a crystalline semiconductor thin film that can correct the above-mentioned problems of the prior art and can obtain a silicon film having controlled grain boundaries and an arbitrarily specified grain size. purpose.
本発明に係る結晶性半導体薄膜の製造方法は、上記課題
を解決するために、絶縁性基体上に形成した非晶性半導
体膜を結晶化させることにより多結晶半導体膜を得るよ
うにした結晶性半導体薄膜の製造方法において、前記絶
縁性基体上に第1非晶性半導体膜を形成しフォトリソグ
ラフィー法により島状に残しレーザービームを照射して
前記第1非晶性半導体膜を結晶化して単結晶半導体膜を
得る工程と、前記単結晶半導体膜にレジスト膜を積層し
て前記単結晶半導体膜の中心領域を島状に残す工程と、
前記レジスト膜と露出した前記絶縁性基体上を被膜する
第2非晶性半導体膜を形成する工程と、前記レジスト膜
と前記レジスト膜上の前記第2非晶性半導体膜を除去し
た後、500℃以上の熱処理により前記単結晶半導体膜
を核として結晶成長を行ない結晶性半導体膜を形成する
ことを特徴とする。In order to solve the above-mentioned problems, a method for manufacturing a crystalline semiconductor thin film according to the present invention provides a crystalline semiconductor film in which a polycrystalline semiconductor film is obtained by crystallizing an amorphous semiconductor film formed on an insulating substrate. In the method for manufacturing a semiconductor thin film, a first amorphous semiconductor film is formed on the insulating substrate, and is left in an island shape by photolithography and irradiated with a laser beam to crystallize the first amorphous semiconductor film. a step of obtaining a crystalline semiconductor film; a step of laminating a resist film on the single-crystal semiconductor film to leave a central region of the single-crystal semiconductor film in an island shape;
forming a second amorphous semiconductor film covering the resist film and the exposed insulating substrate; and removing the resist film and the second amorphous semiconductor film on the resist film; The present invention is characterized in that a crystalline semiconductor film is formed by performing crystal growth using the single crystal semiconductor film as a nucleus by heat treatment at a temperature of .degree. C. or higher.
以下本発明に係る結晶性半導体薄膜の製造方法をSol
構造の形成に適用した実施例につき図面を参照しながら
説明する。The method for manufacturing a crystalline semiconductor thin film according to the present invention will be described below.
An example applied to the formation of a structure will be described with reference to the drawings.
まず第1図(a)に示すように絶縁性基体1上に第1非
晶性Si膜2を例えばプラズマ化学的気相成長法により
形成した後、レーザービーム3を照射して第1非晶性S
t膜2を融解して結晶化し、第1図(b)に示すように
結晶化した単結晶Si膜4をフォトリソグラフィー法に
よりレジスト膜5をマスクにして化学的なエツチング処
理により島状に残す。続いて第1図(c)に示すように
レジスト膜5を残した状態で例えばプラズマ化学的気相
成長法により第2非晶性Si膜6を積層する。First, as shown in FIG. 1(a), a first amorphous Si film 2 is formed on an insulating substrate 1 by, for example, plasma chemical vapor deposition, and then a laser beam 3 is irradiated to form the first amorphous Si film 2. Sex S
The T film 2 is melted and crystallized, and the crystallized single crystal Si film 4 is left in an island shape by photolithography using a resist film 5 as a mask and chemically etched as shown in FIG. 1(b). . Subsequently, as shown in FIG. 1(c), a second amorphous Si film 6 is deposited by, for example, plasma chemical vapor deposition with the resist film 5 remaining.
このとき第2非晶性Si膜6は露出した絶縁性基体1上
とレジスト膜5上に形成されるが、膜厚は単結晶Si膜
4と同じになるようにする。次に、第1図(C)に示す
ようにレジスト膜5の選択的エツチングを行ないレジス
ト膜5上の第2非晶性Si膜6と共に取り除く。この工
程により絶縁性基体1上には単結晶Si膜4と第2非晶
性Si膜6からなる平坦な薄膜か形成される。さらに第
1図(e)に示すように単結晶Si膜4を成長核として
500℃以上の熱処理により結晶成長を行ない結晶粒界
面8を有する結晶性Si膜9を形成する。第1図(d)
に示す単結晶Si膜4を結晶成長核とする熱処理による
結晶化は、単結晶Si膜4の隣接する第2非晶性Si膜
6へ横方向に進む。At this time, the second amorphous Si film 6 is formed on the exposed insulating substrate 1 and the resist film 5, but the film thickness is made to be the same as that of the single crystal Si film 4. Next, as shown in FIG. 1C, the resist film 5 is selectively etched and removed together with the second amorphous Si film 6 on the resist film 5. Through this step, a flat thin film consisting of the single crystal Si film 4 and the second amorphous Si film 6 is formed on the insulating substrate 1. Further, as shown in FIG. 1(e), crystal growth is performed by heat treatment at 500° C. or higher using the single crystal Si film 4 as a growth nucleus to form a crystalline Si film 9 having crystal grain interfaces 8. Figure 1(d)
Crystallization by heat treatment using the single-crystal Si film 4 as a crystal growth nucleus shown in FIG.
このため熱処理の時間を短かくすると、第2図に示すよ
うに複数結晶性Si膜9か完全に接触することなく、結
晶化していない第2非晶性Si膜6に挾まれた状態の結
晶性半導体薄膜を得ることが可能である。したがって、
結晶性Si膜9の結晶粒径は、熱処理を行なう時間によ
って制御することが可能である。また、結晶の粒径も同
しである。Therefore, if the heat treatment time is shortened, as shown in FIG. It is possible to obtain a semiconductive thin film. therefore,
The crystal grain size of the crystalline Si film 9 can be controlled by the heat treatment time. Furthermore, the grain size of the crystals is also the same.
また、結晶粒径が制御され結晶成長の核となる単結晶S
i膜4の位置も容易に制御可能なため、第1図(e)に
示す結晶粒界面8の位置も制御可能になる。In addition, the crystal grain size is controlled and single crystal S becomes the nucleus for crystal growth.
Since the position of the i-film 4 can be easily controlled, the position of the crystal grain interface 8 shown in FIG. 1(e) can also be controlled.
本発明に係る結晶性半導体薄膜の製造方法は、任意の大
きさで均一の結晶粒径を実現し、さらに結晶粒の位置が
あらかじめ決められた位置に制御でき、平坦な結晶性半
導体薄膜を得ることが可能であるという効果を有する。The method for producing a crystalline semiconductor thin film according to the present invention realizes a uniform crystal grain size with an arbitrary size, and furthermore, the position of the crystal grains can be controlled to a predetermined position, and a flat crystalline semiconductor thin film can be obtained. This has the effect that it is possible to
第1図(a)〜(e)及び第2図は本発明の結晶性半導
体薄膜の製造方法をSol構造の形成に適用した実施例
を示す断面図。第3図(a)〜(C)及び第4図は従来
の結晶性半導体薄膜の製造方法の実施例を示す断面図で
ある。
φレジスト膜
・第2非晶性St膜
・結晶粒界
・結晶性Si膜
出願人 セイコーエプソン株式会社
代理人 弁理士 鈴 木 喜三部(他1名)1・・・絶
縁性基体
2・・・第1非晶性Si膜
3・・・レーサービーム
4・・・単結晶S1膜
輻晶性ふ狭
第7図
第2図
第3図
第4
図1(a) to (e) and FIG. 2 are cross-sectional views showing an example in which the method for manufacturing a crystalline semiconductor thin film of the present invention is applied to the formation of a Sol structure. 3(a) to 4(C) and FIG. 4 are cross-sectional views showing an example of a conventional method for manufacturing a crystalline semiconductor thin film. φ resist film, second amorphous St film, grain boundary, crystalline Si film Applicant: Seiko Epson Corporation Representative Patent attorney: Kizobe Suzuki (and 1 other person) 1... Insulating substrate 2...・First amorphous Si film 3...Racer beam 4...Single crystal S1 film Crystalline narrowing Fig. 7 Fig. 2 Fig. 3 Fig. 4
Claims (1)
ることにより多結晶半導体膜を得るようにした結晶性半
導体薄膜の製造方法において、前記絶縁性基体上に第1
非晶性半導体膜を形成しフォトリソグラフィー法により
島状に残しレーザービームを照射して前記第1非晶性半
導体膜を結晶化して単結晶半導体膜を得る工程と、前記
単結晶半導体膜にレジスト膜を積層して前記単結晶半導
体膜の中心領域を島状に残す工程と、前記レジスト膜と
露出した前記絶縁性基体上を被膜する第2非晶性半導体
膜を形成する工程と、前記レジスト膜と前記レジスト膜
上の前記第2非晶性半導体膜を除去した後、500℃以
上の熱処理により前記単結晶半導体膜を核として結晶成
長を行ない結晶性半導体膜を形成することを特徴とする
結晶性半導体薄膜の製造方法。In a method for producing a crystalline semiconductor thin film in which a polycrystalline semiconductor film is obtained by crystallizing an amorphous semiconductor film formed on an insulating substrate, a first
forming an amorphous semiconductor film and leaving it in an island shape using a photolithography method and irradiating the first amorphous semiconductor film with a laser beam to crystallize the first amorphous semiconductor film to obtain a single crystal semiconductor film; and applying a resist to the single crystal semiconductor film. a step of stacking films to leave a central region of the single crystal semiconductor film in an island shape; a step of forming a second amorphous semiconductor film to cover the resist film and the exposed insulating substrate; After removing the film and the second amorphous semiconductor film on the resist film, a crystalline semiconductor film is formed by performing crystal growth using the single crystal semiconductor film as a nucleus by heat treatment at 500° C. or higher. A method for producing a crystalline semiconductor thin film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10802290A JPH046822A (en) | 1990-04-24 | 1990-04-24 | Method for manufacturing crystalline semiconductor thin film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10802290A JPH046822A (en) | 1990-04-24 | 1990-04-24 | Method for manufacturing crystalline semiconductor thin film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH046822A true JPH046822A (en) | 1992-01-10 |
Family
ID=14473991
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10802290A Pending JPH046822A (en) | 1990-04-24 | 1990-04-24 | Method for manufacturing crystalline semiconductor thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH046822A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07270818A (en) * | 1994-03-28 | 1995-10-20 | Sharp Corp | Semiconductor substrate manufacturing method and manufacturing apparatus thereof |
-
1990
- 1990-04-24 JP JP10802290A patent/JPH046822A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07270818A (en) * | 1994-03-28 | 1995-10-20 | Sharp Corp | Semiconductor substrate manufacturing method and manufacturing apparatus thereof |
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