JPH046836A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a manufacturing method in which deposition is small and by which the possibility of disconnecting a metal interconnection formed at the upper part is small by a method wherein an amorphous silicon film formed on an insulating film is etched in an inclined shape expanded and opened upward and the insulating film is etched by making use of the amorphous silicon film as a mask. CONSTITUTION:The following processes are included: a process to form an amorphous silicon film 5 on an insulating film 2 formed on a metal film 1, for interconnection use, constituting one part of a semiconductor device; a process to form a resist mask 3, having an opening in a desired pattern, on the amorphous silicon film 5; a process to etch, via the resist mask 3, the amor phous silicon film 5 in an inclined shape expanded and opened upward; a process to etch the insulating film 2 by making use of said amorphous silicon film 5 as a mask after the resist mask 3 is removed; and a process to form a metal film 4, for upper-part interconnection use, on the metal film 1 for interconnection use and on the insulating film 2 after the amorphous silicon film 5 has been removed. For example, said insulating film 2 is etched under a condition to form an inclined shape expanded and opened upward.

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention relates to a method for manufacturing a semiconductor device, and in particular, a method for manufacturing a semiconductor device, in which an insulating film stacked on a metal film for wiring constituting a part of the semiconductor device is further coated with upper wiring. The present invention relates to a method of forming an aperture through which a metal film for use is passed.

[Prior Art] Currently, semiconductor devices are required to have two or more layers of wiring made of metal materials due to the demand for lower power consumption and higher speed operation as semiconductor devices become smaller and more highly integrated.

At this time, in order to connect the lower wiring metal film and the upper wiring metal film at a predetermined location, after forming the lower wiring metal film, a glabella insulating film is deposited. There is a step of forming an opening at a predetermined location in the insulating film.

Here, cross-sectional views showing the main stages of an example of the conventional method for forming an opening are shown in FIGS. 2(^) to 2(C). First, as shown in FIG. Alloy of Si and Cu (
An insulator 1 formed on the top of a wiring metal film (1) consisting of ^l, Si, and Cu) (hereinafter referred to as Si, Cu). A resist mask (3) is formed by opening holes in a desired pattern in the photoresist coated on the surface of (2).6 Next, the insulating film (2) is etched using reactive ion etching (RIE). As a result, desired openings can be formed in the insulating film (2) as shown in FIG. 2(B).

However, if the opening is formed by such a method, as shown in FIG. ＾I, Si, CuM (4) becomes thinner in parts (a) and (b), and parts (a) are particularly prone to disconnection due to phenomena such as electromigration.

Therefore, as a solution to this problem, for example,
There is an opening forming method that combines isotropic etching and anisotropic etching as disclosed in Japanese Patent No. 9923. Figures 3 (^) to (D) show this conventional example.
As shown in the figure (^), after forming a resist mask (3) with holes in the desired pattern on the surface of the insulating film (2) formed on the metal film for wiring (1), hydrogen fluoride When isotropic etching using a solution or the like is performed, the result is as shown in Figure 3 (B), and then reactive ion etching (RIE) is performed.
When anisotropic etching is performed using this method, the result is as shown in FIG. 3(C).

The upper wiring metal film (4
) is deposited, the thickness of the upper wiring metal # (4) at the top of the opening increases compared to that in Figure 2 (C) as shown in Figure 3 (D), leading to disconnection of the wiring due to electromigration, etc. resistance is improved.

[Problems to be Solved by the Invention] In the conventional example described above, it is necessary to perform reactive ion etching preferentially on the insulating film (2) rather than on the wiring metal film (1). For this reason, in reactive ion etching, for example, CHF or +02 gas is used. In this etching, for example, ^l, Si
, when the surface of the wiring metal film (1) made of Cu appears, carbon, which is a component of the resist mask (3), and ^1 and Cu
The metal components react, and as shown in Figure 4, insulation B (2)
A deposit (6) is deposited on the side wall of the opening. This deposition (6) creates a protruding part as shown in Figure 4 due to the reduction of the insulation M (2) by RIE, which may cause disconnection of the upper wiring metal film (4). be.

In addition, deposition (6) was performed on the wiring metal film (1).
) are the upper wiring metal R1 (4) and the wiring metal film (1).
It may prevent contact with

Also, in the second conventional example, there is a thin portion in the upper wiring metal film (4) [portion (II) in FIG. 3(D)>
, (c), (d)], there is a possibility of wire breakage due to electromigration, etc.

The present invention has been made to solve the conventional problems as described above, and provides a method for manufacturing a semiconductor device 1 that requires less deposition and less possibility of disconnection of the metal wiring formed on the upper part. The purpose is to obtain.

[Means for Solving the Problems] A method for manufacturing a semiconductor device according to the present invention includes a step of forming an amorphous silicon film on an insulating film formed on a metal film for wiring forming a part of a semiconductor device. a step of forming a resist mask with holes in a desired pattern on the amorphous silicon film; a step of etching the amorphous silicon film into an upwardly expanding inclined shape through the resist mask; etching the insulating film by masking the amorphous silicon film after removing the resist mask, and forming an upper wiring metal film on the wiring metal film and the insulating film after removing the amorphous silicon film. It includes a process.

(Function) According to the present invention, since an amorphous silicon film is used instead of a resist mask as an etching mask for an insulating film, deposition on the side wall of an opening in the insulating film is significantly reduced. By processing, the shape of the opening can be made into a tapered shape, and the resistance against disconnection of the wiring can be improved.Also, by using NF or gas to remove the amorphous silicon film after forming the opening, , deposits on the bottom metal traces can be removed.

[Embodiment] Figures 1 (^) to (C) are sectional views showing the main stages of an embodiment of the present invention.

First, as shown in Figure 1 (^), a metal film for wiring (1)
An amorphous silicon film (5) f!: is formed by sputtering or the like on the insulating film (2) formed on the insulating film (2). The thickness of this amorphous silicon M (5) is equal to the thickness of the insulating film (2). For example, if a silicon oxide film with a thickness of 1 μm is formed as the insulating film (2), the
m to 400 nm is suitable.

Next, a resist mask (3) with holes in a desired pattern is formed on the amorphous silicon film (5). Use this resist mask (3) as an etching mask,
The amorphous silicon film (5) is etched. At this time, etching is performed, for example, with N2" for 50 s.
iC1,=50. When carried out under the conditions of eC, and a pressure of 20 m and 11 g, the amorphous silicon film (5) can be etched into an upwardly expanding inclined shape as shown in Figure 1 (B). As shown in Figure 1 (C),
After removing the resist mask (3) and using the remaining amorphous silicon film (5) as an etching mask, CHF5
= 45. cc, NF, -15,. . ,,02=15s
When the insulating film (2) is etched under the conditions of ccx, 50+*lIl+, and 0.25w/Cm2, as shown in Fig. 1(D).
, As shown in (E), the amorphous silicon film (5) becomes thinner and the amorphous silicon M (5) is slightly etched on the side, so that the opening becomes wider.
The insulation M(2) has an inclined shape that smoothly expands upward. Furthermore, as shown in FIG. 1(E), a wiring metal film (1
) When the surface of Si and Cu appears and the etching is completed, the amorphous silicon film (5) remaining on the insulating film (2) is removed by plasma etching using NF and gas [Fig. F)]. Plasma etching using this NF3 gas can be used to form an amorphous silicon film (
It is effective not only for removing 5) but also for removing CxFy-based deposits deposited on the wiring metal film (1). The upper wiring metal film (4) is placed over the opening formed in this way. When Si and Cu are formed, an upper wiring metal film (4) with good film thickness uniformity as shown in Figure 1 (C) is obtained, and metal wiring with high resistance to disconnection due to electromigration etc. can be obtained. can be formed.

In this example, N2 + 5iCI< was used for etching the amorphous silicon film (5), but it is not necessarily limited to this gas, and any other gas can be used as long as it can etch the amorphous silicon film. It is also possible to use a solution. Further, although CHF and NF+02 were used for etching the insulating film, it is not necessarily limited to these gases. Furthermore, it is not necessary to limit the use of NF to remove the amorphous silicon film, and gases such as SF and CF can also be used.

[Effects of the Invention] As explained in detail above, the present invention includes a step of forming an amorphous silicon film on an insulating film formed on a metal film for wiring constituting a part of a semiconductor device, and A step of forming a resist mask with holes in a desired pattern on the silicon film, a step of etching the amorphous silicon film into an upwardly expanding inclined shape through the resist mask, and a step of etching the amorphous silicon film into an inclined shape expanding upward through the resist mask. The method includes etching the insulating film by masking the amorphous silicon film after removing the amorphous silicon film, and forming an upper wiring metal film on the wiring metal film and the insulating film after removing the amorphous silicon film. Therefore, it is possible to reduce the deposition that induces disconnection of the upper metal wiring, and at the same time, it is possible to reduce the disconnection of the metal wiring.

[Brief explanation of the drawing]

Figures 1 (^) to (G) are sectional views of the main stages of the embodiment of the present invention, Figures 2 (^) to (C) are sectional views of the main stages of the first conventional example, and Figure 3 ( ^) to (D) are sectional views of the main stages of the second conventional example, and FIG. 4 is a sectional view showing the state of deposition when openings are formed in the second conventional example. In the figure, (1) is a metal film for wiring, (2) is an insulating film,
(3) is a resist mask, (4) is a metal film for upper wiring,
(5) indicates an amorphous silicon film.

Claims (1)

[Claims] (1) A step of forming an amorphous silicon film on an insulating film formed on a metal film for wiring constituting a part of a semiconductor device, and forming holes in a desired pattern on the amorphous silicon film. forming a resist mask; etching the amorphous silicon film in an upwardly expanding inclined shape through the resist mask; and etching the amorphous silicon film into the insulating film by masking the amorphous silicon film after removing the resist mask. A method for manufacturing a semiconductor device, comprising: etching the amorphous silicon film; and forming an upper wiring metal film on the wiring metal film and the insulating film after removing the amorphous silicon film.