JPH047099B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] A method for manufacturing a hetero bipolar transistor (hereinafter referred to as HBT) having an emitter electrode in which a GaAs crystal and an AlGaAs crystal are formed in a heterostructure, the method comprising: to the upper layer
An InGaAs crystal layer is provided, and by taking advantage of the low shot-key barrier of InGaAs to metals, the base region is formed using the same material and the same material on the GaAs crystal layer that forms the base region. By forming the base electrode and emitter electrode simultaneously in the process and forming the base electrode adjacent to the emitter electrode, the base resistance of the formed device is reduced and high-speed operation is possible.
Providing a method for manufacturing HBT.

[Industrial application field]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a heterojunction bipolar transistor that simplifies the process and increases speed.

BACKGROUND ART In recent years, in order to increase the speed of semiconductor devices such as semiconductor integrated circuits and semiconductor memories, heterojunction bipolar transistors in which an emitter region is formed of crystal layers of GaAs and AlGaAs on a GaAs substrate have been used.

[Conventional technology]

The conventional manufacturing method for such HBT is as follows:
As a first method, as shown in FIG.
Using MOCVD method or molecular beam epitaxial method, N-type GaAs crystal layer 1, P-type GaAs crystal layer 2, and N-type AlGaAs are deposited on GaAs substrate 101.
After forming the crystal layer 3 and the N ⁺ type GaAs crystal layer 4, the crystal layers 1 and 2 and the crystal layers 3 and 4 are etched into a mesa shape.

Furthermore, an emitter electrode 5 made of an alloy made of gold-germanium is placed on the crystal layers 3 and 4, and a base electrode 6 made of a gold-zinc alloy is placed on the GaAs crystal layer 2.
A collector electrode 7 made of a gold-germanium alloy was vapor-deposited on the N-type GaAs crystal layer 1, and a lift-off method was used to form the collector electrode 7 into a predetermined pattern without forming it all at once using separate processes. .

As a second method, an attempt has been made to form the base electrode 3 and the emitter electrode 5 adjacently in self-alignment.

Furthermore, as a third manufacturing method, as shown in FIG. 11, after etching the N ⁺ type GaAs crystal layer 4 forming the emitter region into a predetermined pattern, using the patterned emitter region as a mask,
AlGaAs crystal layer 3 serving as an external base region;
There is also a method of ion-implanting beryllium (Be) atoms into the GaAs crystal layer 2 to form ion-implanted layers 2A and 3A to lower the base resistance value and speed up the formed device.

[Problem that the invention seeks to solve]

However, the first method has the disadvantage that the emitter electrode, base electrode, and collector electrode are formed from different materials, and the electrodes are not formed in one step, making the manufacturing process complicated.

Therefore, a mask alignment process is required to form these electrodes, and as a result, it is necessary to maintain margin for mask alignment, which creates a distance in the lateral direction between the emitter electrode 5 and the base electrode 6, which increases the base resistance. This results in an increase in the size of the device, which impedes speeding up of the device being formed.

Further, in this method, an alloying process is used between the N-type GaAs crystal layer and the gold-germanium electrode formed thereon, which creates a problem in that the depth of the alloy layer needs to be controlled.

In addition, the material for forming the emitter electrode 5 and the material for forming the base electrode 6 are different, and both electrodes must be formed in separate processes, making it impossible to form both electrodes at the same time using self-alignment. There is.

Furthermore, the third method requires large-scale and expensive ion implantation equipment, and an annealing process to activate the implanted ions, which can lead to re-diffusion of impurities in the crystal and complicate the process. There is a problem.

Furthermore, the material for forming the emitter electrode 5 and the material for forming the base electrode 6 are different, and both electrodes must be formed in separate steps, which has the drawback of complicating the work.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that eliminates the above-mentioned drawbacks, simplifies the process, reduces base resistance, and increases the speed of the semiconductor device formed.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes forming a GaAs crystal layer as a collector region, a GaAs crystal layer as a base region, an AlGaAs crystal layer as an emitter region, and a GaAs crystal layer on a semi-insulating substrate, and then forming a GaAs crystal layer on the top layer. a step of forming a laminated InGaAs crystal layer; a step of forming a first insulating film on the substrate; and a step of forming the first insulating film in a predetermined pattern; and a step of forming an emitter using the patterned first insulating film as a mask. etching the crystal layer forming the region until it reaches the crystal layer forming the base region; after forming a second insulating film on the substrate that is not etched by the etching agent for the first insulating film; a step of anisotropically etching an insulating film to form it on the side wall of the emitter region forming crystal layer formed by the etching; after forming a photoresist film on the substrate, forming a metal film on the substrate and removing unnecessary A step of removing the metal film together with the photoresist film and forming an emitter-ohmic electrode and a base electrode all at once. After forming a photoresist film on the entire surface of the substrate, etching the photoresist film and etching the metal film on the sidewall of the emitter region. The method is characterized by comprising the steps of: removing the metal film and the second insulating film formed on the photoresist film, and forming a collector electrode after removing the photoresist film.

[Effect]

The method of manufacturing a semiconductor device of the present invention has a small band gap, and can easily form an ohmic junction with an alloy containing gold without requiring a heat treatment process such as an alloy process, and can be doped with a high concentration. A crystalline layer of N ⁺ InGaAs whose contact resistance can be on the order of 10 ^-8 Ωcm ² is formed in the emitter region.

In addition, since the P ⁺ GaAs crystal layer easily makes ohmic contact with alloys containing gold, by using this as the base layer, the emitter electrode and the base electrode can be connected to the same gold-containing alloy, such as chromium-gold. (Cr/Au), titanium-platinum-gold (Ti/Pt/Au)
can be formed all at once in the same process by self-alignment.

This also allows the base electrode to be formed adjacent to the emitter electrode, reducing the base resistance and increasing the speed of the device without requiring a complicated ion implantation process to form the base extraction region. I can figure it out.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail using the drawings.

As shown in FIG. 1, a semi-insulating GaAs substrate 11
An N ⁺ GaAs crystal layer 12 is formed thereon to a thickness of 5000 Å using molecular beam epitaxial growth, MOCVD, or the like.

Furthermore, an N-type GaAs crystal layer 13 with a thickness of 3000 m
Form to a thickness of Å. This N ⁺ GaAs crystal layer 12 and the N-type GaAs crystal layer 13 serve as a collector region.

Then on the substrate, P ⁺ type as a base region
A GaAs crystal layer 14 is formed to a thickness of 1000 Å.

Furthermore, an N-type AlGaAs crystal layer 15 of 1000 nm is formed on top of that.
Form to a thickness of ~2000 Å.

Furthermore, on top of that, a crystal layer 16 of N ⁺ type GaAs is placed at 1000 nm.
Form to a thickness of Å.

Furthermore, an N ⁺ type InGaAs crystal layer 17 is formed on top of that.
The N-type AlGaAs described above was formed to a thickness of 1000 Å.
An emitter region is formed by a crystal layer 15, an N ⁺ type GaAs crystal layer 16, and an N ⁺ type InGaAs crystal layer 17.

Next, a SiO ₂ film 18 is formed on the substrate using a chemical vapor deposition (CVD) method.

Furthermore, as shown in FIG. 2, the SiO ₂ film 18 is formed into a predetermined pattern using a photolithography method, a reactive ion etching (RIE) method using trifluoromethane (CHF ₃ ) gas as a reaction gas, or the like. After the formation, the N ⁺ type InGaAs crystal layer 1 is formed by RIE method using the SiO ₂ film 18 as a mask and methane dichloride difluoride (CCl ₂ F ₂ ) gas as a reactive gas.
7. Etch the N ⁺ type GaAs crystal layer 16 and the N type AlGaAs crystal layer 15 until reaching the P ⁺ type GaAs crystal layer 14.

Furthermore, as shown in FIG. 3, a Si nitride film 19 is formed on the substrate using a plasma CVD method.

Next, as shown in FIG. 4, the Si nitride film 19 is anisotropically etched by RIE using tetrafluoromethane (a mixed gas of CF ₄ gas and oxygen (O ₂ ) gas) as a reaction gas.

Furthermore, the SiO ₂ film 18 on the substrate is selectively etched by the RIE method using CHF ₃ gas as a reaction gas to form an N ⁺ InGaAs crystal layer 17 and an N ⁺ GaAs crystal layer 1.
6. A Si nitride film 19 is deposited on the side wall of the emitter region made of the N-type AlGaAs crystal layer 15 and etched into a predetermined pattern. At this time, the P ⁺ GaAs crystal layer 14 is left exposed at the location where the base electrode will be formed in a later step.

Next, a SiO ₂ film 20 is formed by CVD on the non-forming area of the metal film to be formed in a later step, a resist pattern is formed thereon by photolithography, and RIE is performed using the resist pattern as a mask.
A SiO ₂ film 20 is formed in a predetermined area using a method.

After forming a metal film 22 of chromium-gold (Cr-Au) or titanium-platinum-gold (Ti/Pt/Au) on the substrate by vapor deposition, as shown in FIG. 21 and the unnecessary metal film 12 thereon is also removed using a so-called lift-off method, and a metal film 22E is formed on the emitter region and a metal film 22B is formed on the base region at the same time.

In this way, the metal film 22E becomes the ohmic contact electrode of the emitter, the metal film 22B becomes the base electrode, and the emitter electrode and the base electrode are formed in self-alignment with respect to the emitter region.

Here, under the metal film 22E, there is ^N
A type InGaAs crystal layer 17 is formed, and a P ⁺ type GaAs crystal layer 14 is formed under the metal film 22B, making it easy to obtain an ohmic contact. A contact is formed.

Next, as shown in FIG. 7, a photoresist film 23 is deposited on the entire surface of the substrate.

Then, as shown in Figure 8, argon (Ar)
The photoresist film 23 is etched by ion milling using gas. Then, the metal film 22 on the Si nitride film 19 formed on the side wall of the emitter region
is removed by etching, and the metal film 22E formed on the emitter region and the metal film 22B formed on the base region become insulated.

Next, as shown in FIG. 9, the P ⁺ GaAs crystal layer 14 forming the base region and the N-type GaAs layer below
The crystal layer 13 is etched, and the metal film made of gold-germanium/gold is formed into a collector electrode 24 in a predetermined pattern by vapor deposition, photolithography, dry etching, or the like.

〔Effect of the invention〕

As described above, according to the method of manufacturing a semiconductor device of the present invention, the emitter electrode and the base electrode are formed of the same material, making manufacturing simple and easy.

Furthermore, since the base electrode is formed in self-alignment with respect to the emitter region through the insulating film formed on the sidewall of the crystal layer forming the emitter region,
This has the effect of reducing the base resistance and increasing the speed of the formed device.

[Brief explanation of drawings]

1 to 9 are cross-sectional views showing an embodiment of the method of the present invention in the order of steps, and FIGS. 10 and 11 are cross-sectional views for explaining a conventional method. In the figure, 11 is a GaAs substrate, 12 is a
N ⁺ GaAs crystal layer, 13 is N type GaAs crystal layer, 14
is a P ⁺ GaAs crystal layer, 15 is an N-type AlGaAs crystal layer,
16 is an N ⁺ GaAs crystal layer, 17 is an N ⁺ InGaAs crystal layer, 18 and 20 are SiO ₂ films, 19 is a Si nitride film, 2
1 and 23 are photoresist films, 22 is a metal film, 24
indicates the collector electrode.

Claims (1)

[Claims] 1. Gallium-arsenic (GaAs) crystal layers 12 and 13 as collector regions, GaAs crystal layer 14 as a base region, and aluminum-gallium-arsenide (AlGaAs) as emitter regions on a semi-insulating substrate 11. ) After forming the crystal layer 15 and the GaAs crystal layer 16, forming an indium-gallium-arsenic (InGaAs) crystal layer 17 on the top layer; after forming the first insulating film 18 on the substrate, forming the first insulating film 18 on the substrate;
A step of forming an insulating film 18 in a predetermined pattern, using the patterned first insulating film 18 as a mask, forming a crystal layer 17, 1 forming an emitter region.
6 and 15 until reaching the crystal layer 14 forming the base region, after forming a second insulating film 19 on the substrate that is not etched by the etching agent of the first insulating film 18,
The second insulating film 19 is anisotropically etched to form the second insulating film 1 on the side walls of the emitter region forming crystal layers 17, 16, 15 formed by the etching.
After forming a photoresist film 21 on the substrate, a metal film 22 is formed on the substrate, unnecessary metal film 22 is removed together with the photoresist film 21, and emitter-ohmic electrodes 22E, and a step of simultaneously forming a base electrode 22B, after forming a photoresist film 23 on the entire surface of the substrate,
While etching the photoresist film 21, the crystal layers 17, 16, forming the emitter region are etched.
15. A method for manufacturing a semiconductor device, comprising the steps of: removing a metal film 12 formed on the sidewall of the photoresist film 15; and forming a collector electrode 24 after removing the photoresist film 21.