JPH0471022U - - Google Patents

Info

Publication number
JPH0471022U
JPH0471022U JP11519790U JP11519790U JPH0471022U JP H0471022 U JPH0471022 U JP H0471022U JP 11519790 U JP11519790 U JP 11519790U JP 11519790 U JP11519790 U JP 11519790U JP H0471022 U JPH0471022 U JP H0471022U
Authority
JP
Japan
Prior art keywords
signal
output
cpu
mute
down control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11519790U
Other languages
Japanese (ja)
Other versions
JP2595421Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990115197U priority Critical patent/JP2595421Y2/en
Publication of JPH0471022U publication Critical patent/JPH0471022U/ja
Application granted granted Critical
Publication of JP2595421Y2 publication Critical patent/JP2595421Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案の一実施例であるオーデイオ機器
の電子ボリユーム装置の回路図である。 １……電子ボリユーム、２……ＣＰＵ、３……
キースイツチ、４……ハイカツトミユート回路、
５……全帯域ミユート回路。 The drawing is a circuit diagram of an electronic volume device for audio equipment, which is an embodiment of the present invention. 1...Electronic volume, 2...CPU, 3...
Key switch, 4...High cutout circuit,
5...Full band mute circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] キースイツチ等の操作によるアツプ／ダウンコ
ントロール時にＣＰＵから出力されるデータ、ク
ロツク、ストローブ信号によつてオーデイオ入力
信号のレベル調整を行なう電子ボリユームにおい
て、前記アツプ／ダウンコントロール時に電子ボ
リユームのオーデイオ出力信号に現れるノイズ成
分を除去するハイカツトミユート回路あるいはト
ラツプミユート回路を該アツプ／ダウンコントロ
ール時のみ前記ＣＰＵから出力されるミユート信
号によつて動作させ該ミユート信号の出力に追随
させて該ＣＰＵからデータ、クロツク、ストロー
ブ信号を出力させオーデイオ入力信号のレベル調
整を行なうことを特徴とするオーデイオ機器の電
子ボリユーム装置。 In an electronic volume that adjusts the level of an audio input signal using data, clock, and strobe signals output from the CPU during up/down control by operating a key switch, etc., the signal that appears in the audio output signal of the electronic volume during up/down control. A high-cut mute circuit or a trap mute circuit for removing noise components is operated by the mute signal output from the CPU only during the up/down control, and is made to follow the output of the mute signal to receive data, clocks, and strobes from the CPU. An electronic volume device for audio equipment, characterized in that it outputs a signal and adjusts the level of an audio input signal.
JP1990115197U 1990-10-31 1990-10-31 Electronic volume device for audio equipment Expired - Lifetime JP2595421Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990115197U JP2595421Y2 (en) 1990-10-31 1990-10-31 Electronic volume device for audio equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990115197U JP2595421Y2 (en) 1990-10-31 1990-10-31 Electronic volume device for audio equipment

Publications (2)

Publication Number Publication Date
JPH0471022U true JPH0471022U (en) 1992-06-23
JP2595421Y2 JP2595421Y2 (en) 1999-05-31

Family

ID=31862941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990115197U Expired - Lifetime JP2595421Y2 (en) 1990-10-31 1990-10-31 Electronic volume device for audio equipment

Country Status (1)

Country Link
JP (1) JP2595421Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019075714A (en) * 2017-10-17 2019-05-16 新日本無線株式会社 Amplifier circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01146623U (en) * 1988-03-29 1989-10-09

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01146623U (en) * 1988-03-29 1989-10-09

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019075714A (en) * 2017-10-17 2019-05-16 新日本無線株式会社 Amplifier circuit

Also Published As

Publication number Publication date
JP2595421Y2 (en) 1999-05-31

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term