JPH0473325B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention provides a PLL synthesizer receiver that enables scanning tuning in which the tuning frequency is increased or decreased by a predetermined frequency to match a desired broadcast frequency. Involved in improvements.

Background technology and its problems In the conventional PLL synthesizer receiver,
When the scanning tuning range is wide, it takes time to select a channel, so a fast forward scanning tuning switch is provided in addition to the normal scanning tuning switch, and the normal scanning tuning switch and fast forward tuning switch can be used as necessary. I pressed each key at the same time to increase the scanning speed.

However, this requires pressing each key of the two scanning channel selection switches at the same time, which is extremely inconvenient in practice.

Purpose of the Invention In view of the above, the present invention automatically increases the scanning tuning speed when the scanning tuning range during scanning tuning is wide by simply operating a key of one scanning tuning switch. Therefore, the PLL that scans and selects channels quickly
This paper attempts to propose a synthesizer receiver.

Summary of the Invention The present invention provides a receiving section capable of switching the receiving band, a receiving band switching means for switching the receiving band of the receiving section, a PLL synthesizer for channel selection that supplies a tuning signal to the receiving section, and a scanning channel selection device. A tuning pulse generation means that continuously generates a tuning pulse while the switch is operated and supplies the tuning pulse to a programmable frequency divider of a PLL synthesizer for tuning, and a tuning pulse generation means. A counting means for counting the tuning pulses of the counting means, a counting means of the counting means and a switching signal of the reception band switching means are determined, and when the counted value of the counting means exceeds a plurality of predetermined values, the tuning pulse is counted. The generation means is controlled to change the frequency of the tuning pulse from a preset first frequency to a mutually preset frequency greater than the first frequency according to the width of the scanning tuning range of the receiving band. and a discrimination means for switching to a different second frequency.

According to the present invention, there is provided a PLL synthesizer receiver that can quickly perform scanning tuning by simply operating a key of one scanning tuning switch, regardless of the width of the scanning tuning range of the receiving band. can be obtained.

Embodiment An embodiment of the present invention will be described below with reference to FIG. This example covers FM radio broadcasting, AM medium wave radio broadcasting, and AM shortwave radio broadcasting (2 bands).
This is a case where the present invention is applied to a radio receiver that receives. 1 is an FM radio receiving section, and 2 is an AM radio receiving section. First, the FM radio receiving section 1 will be explained. 3 is an antenna, 4 is a high frequency amplifier circuit, 5 is a frequency conversion circuit, 6 and 7 are their frequency mixers and local oscillators, 8 is an intermediate frequency amplifier, 9 is an FM demodulator, 10 is a multiplexer, 1
1L and 11R are output terminals for left and right audio signals.

Next, the AM radio receiving section 2 will be explained. 1
2 is an antenna, 13 is a high frequency amplifier, 14 is a frequency converter, 15 and 16 are its frequency mixer and local oscillator, respectively, 17 is an intermediate frequency amplifier, and 18 is a frequency converter.
It is an AM detector. The audio signal (monaural signal) from the AM detector 18 is supplied via the multiplexer 10 to left and right audio signal output terminals 11L and 11R.

Reference numeral 20 indicates a PLL synthesizer for channel selection as a whole, which will be explained below. 21 is a prescaler to which a local oscillation signal from any one of the local oscillators 7 and 16 is supplied; 22 is a programmable frequency divider to which a frequency signal from the prescaler 21 is supplied; 23 is a phase comparator; and 24 is a reference. It is an oscillator (crystal oscillator). Then, in the phase comparator 23, the frequency signal from the programmable frequency divider 22 and the reference oscillation signal from the reference oscillator 24 are phase-compared, and the comparison output is sent to the FM radio receiving section 1. It is supplied as a tuning signal to each variable capacitance diode of the tuning circuit of the high-frequency amplifier 4 and the resonant circuit of the local oscillator 7 through the filter 26, and is supplied to the high-frequency amplifier 13 through the other low-pass filter 27 to the AM radio receiving section 2. is supplied as a tuning signal to each variable capacitance diode of the tuning circuit of the local oscillator 16 and the resonant circuit of the local oscillator 16. A last channel memory 25 stores the last selected frequency division ratio in the programmable frequency divider 22, and also writes the frequency division ratio into the programmable frequency divider 22.

Reference numeral 19 denotes a band switching switch, and by switching this, the FM radio receiving section 1 and the AM radio receiving section 2 are switched by supplying or not supplying power to them, and the AM radio receiving section 2 is also switched.
By switching each coil of the tuning circuit of the high frequency amplifier 13 and the resonant circuit of the local oscillator 16, switching between the SW1 and SW2 bands of medium waves and short waves is performed.

Reference numeral 28 denotes a scanning channel selection signal generator for generating up and down scanning channel selection signals and a scanning channel selection signal indicating that scanning channel selection is in progress by pressing the keys of the scanning channel selection up and down operation switches 29U and 29D. It is a circuit.

30 is a microcomputer, and each block surrounded by a broken line represents a functional block constituted by a program of the computer 30. Reference numeral 31 denotes a channel selection pulse generating means for generating a channel selection pulse. This channel selection pulse generating means 31
The more channel selection pulses are supplied to the programmable frequency divider 22 of the PLL synthesizer 20 for channel selection,
The frequency division ratio is controlled. The frequency of the tuning pulse from the tuning pulse generation means 31 is determined by the discrimination circuit 3.
2. Scanning channel selection signal generation circuit 2
The scanning channel selection signal from 8 is supplied to a determining means 34 for determining whether the scanning channel selection is up or down, and the frequency division ratio of the programmable frequency divider (counter) 22 is increased according to the up or down state. and down is controlled.

The determining means 32 determines the switching signal from the band switching switch 19 and the counting output of the counting means 33 that counts the number of tuning pulses from the tuning pulse generating means 31, and thereby determines the switching signal from the band switching switch 19 and the counting output of the counting means 33 that counts the number of tuning pulses from the tuning pulse generating means 31.
Controls the frequency of the channel selection pulse. Further, the counting means 33 performs counting when the scanning channel selection signal is outputted from the scanning channel selection signal generation circuit 28, and resets the counting contents when the scanning channel selection signal is no longer output.

When FM radio broadcasting or AM radio broadcasting is selected by the band changeover switch 19, the scanning channel selection pulse generation means 31 generates a signal based on an up or down scanning channel selection signal from the scanning channel selection signal generation circuit 28. A tuning pulse with a frequency that is one times faster than the standard frequency is generated, but when shortwave radio broadcasting is being received, the frequency of the tuning pulse from the scanning tuning pulse generation means 31 changes as explained below. do.

That is, after continuously operating the up or down operation switch 29U or 29D and counting, for example, 10 consecutive tuning pulses from the scanning tuning pulse generation means 31, the short wave SW1 band is received. When the tuning pulse frequency is, for example, 10 times faster than the standard frequency, the SW2 band is wider than the SW1 band or the number of broadcasting stations is smaller. When the tuning pulse generation means 31 is controlled by the discriminating means 32 so that the frequency of the tuning pulse is, for example, 20 times faster than the standard frequency.

FIG. 2 shows a flowchart of the program of the microcomputer 30 when receiving short wave broadcasting. That is, by supplying the scanning tuning signal from the scanning tuning signal generation circuit 28 to the determining means 34, it is determined whether it is up scanning tuning or down scanning tuning. Therefore, the frequency division ratio of the programmable frequency divider 22 is controlled to be switched upward and downward.

The programmable frequency divider 22 is supplied with a single speed tuning pulse from the scanning tuning pulse generation means 31. And the scanning channel selection operation switch 29U,
When either one of 29D is in operation state, 1
The double-speed tuning pulse continues to be supplied to the programmable frequency divider 22. The number of channel selection pulses is continuous.
10 or more, that is, when the number of steps (for example, 5kHz) of the programmable frequency divider 22 reaches 10 steps,
This time, the frequency of the channel selection pulse from the channel selection pulse generation means 31 changes depending on which of the SW1 and SW2 bands of shortwave broadcasting is in the receiving state.
When switching to 10x speed or 20x speed is selected and either the scanning tuning operation switch 29U or 29D is pressed, the 10x or 20x speed tuning pulse continues to be supplied to the programmable frequency divider 22. .

Then, the scanning channel selection operation switch 29U, 2
When the operation of 9D is completed, the frequency division ratio of the programmable frequency divider 22 is fixed to the state at that time. or,
Even after counting 10 channel selection pulses, SW1
If it is determined that neither the SW2 band nor the SW2 band is received, a 1x speed tuning pulse will be generated.

Although not shown here, when the minimum value of the frequency division ratio of the programmable frequency divider 22 reaches the maximum value, the scanning channel selection is stopped or returns to the maximum value or the minimum value. It is possible to continue scanning and selecting stations from the beginning.

Incidentally, at the start of scanning tuning, scanning tuning is performed in the up direction or down direction from a predetermined frequency division ratio given to the programmable frequency divider 22 by the last channel memory 25.

According to such a PLL synthesizer receiver, when the bandwidth is wide such as shortwave broadcasting and scanning and tuning takes time, the scanning and tuning range can be adjusted by simply operating a single tuning operation switch key. If the band is wide, the channel selection scanning speed will be automatically increased, and in the SW2 band, which has a wider band width than the SW1 band or has fewer broadcasting stations in the band, the shortwave SW1 band Since scanning is performed at a faster speed than the above, scanning and tuning can be performed quickly even in the SW2 band.

Effects of the Invention According to the present invention described above, by simply operating one key of the scanning tuning switch, when the scanning tuning range is wide, the scanning tuning speed is automatically switched to a high speed. Furthermore, the scanning tuning speed can be changed to a different speed depending on the scanning tuning range of the receiving band, so scanning tuning can be performed quickly regardless of the width of the scanning tuning range of the receiving band. You can get a PLL synthesizer receiver that can do this.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a flowchart for explaining the program of the microcomputer. 20 is a PLL synthesizer for channel selection, 29U, 2
9D is a scanning channel selection switch, 30 is a microcomputer, 31 is a channel selection pulse generating means, and 33 is a counting means.

Claims (1)

[Scope of Claims] 1: a receiving section capable of switching a receiving band; receiving band switching means for switching the receiving band of the receiving section; and a tuning PLL that supplies a tuning signal to the receiving section.
a synthesizer; and a tuning pulse generation means that continuously generates a tuning pulse while the scanning tuning switch is operated and supplies the tuning pulse to a programmable frequency divider of the tuning PLL synthesizer. , a counting means for counting the tuning pulses from the tuning pulse generation means, and determining the counted value of the counting means and the switching signal of the receiving band switching means, and determining the predetermined number of counted values of the counting means, which is plural. When the frequency exceeds the first frequency, the tuning pulse generating means is controlled to change the frequency of the tuning pulse from a preset first frequency to a frequency higher than the first frequency to scan and tune the reception band. 1. A PLL synthesizer receiver comprising: a discrimination means for switching to a different second frequency set in advance according to the width of the range.