JPH0473835B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to electronic imaging devices, and more particularly to electronic imaging devices for strobe imaging.

(Prior art and its problems) Solid-state imaging devices have advantages such as small size, light weight, long life, and low power consumption, and have recently been widely used in place of image pickup tubes. FIG. 5 shows a conventional example of a so-called interline transfer type (ILT type) solid-state imaging device for electronic cameras formed using a charge-coupled device (CCD).

In FIG. 5, a plurality of light receiving element rows 2 each having a plurality of light receiving elements 2a each having a pn diode or MOS structure arranged in a row are provided on a semiconductor substrate 1, and the plurality of light receiving elements 2a are arranged in a matrix. It is located. Vertical shift registers 3, 3, . . . are provided along the right side of each light-receiving element row 2, and a horizontal shift register 4 is formed in contact with one end of each vertical shift register 3.

In the above configuration, charges accumulated in each light receiving element 2a in each light receiving element row 2 in response to exposure of the semiconductor substrate 1 are transferred to the corresponding vertical shift register 3 via a transfer gate (not shown) at regular time intervals. Ru. The signal charges transferred to each vertical shift register 3 continue to be transferred row by row, that is, to each light receiving element column 2.
Each signal charge from a group of light-receiving elements 2a located on the same line in the horizontal direction is synchronously and sequentially transferred to a horizontal shift register 4, and the signal charge group of each row is further transferred from the horizontal shift register 4 to an output amplifier 5. is read out.

By the way, in the above-mentioned imaging device, if the amount of exposure to the semiconductor substrate 1 during one imaging period is insufficient, the output signal becomes small, and as a result, the signal-to-noise ratio of the output signal becomes an unsatisfactory value. becomes. On the other hand, when the exposure amount becomes excessive, charges overflow from the light receiving element 2a, causing so-called blooming. Therefore, it is necessary to adjust the exposure amount to an appropriate value.

Therefore, an imaging apparatus is known in which a photometric element for measuring exposure is provided and one image capturing is completed when the exposure detected by the photometric element reaches a predetermined value.

However, due to the structure of the photometric element being separate from the semiconductor substrate on which the light receiving element is formed,
In the photometry path between the imaging area defined by the photodetector array on the semiconductor substrate and the photometry element, various noises generated around the outside of the semiconductor substrate, especially noises emitted along with strobe light emission during strobe imaging, are generated. This poses a serious problem in that it is difficult to accurately detect the exposure amount due to noise, etc., and it is difficult to perform strobe imaging with an appropriate exposure amount. To deal with this, it is conceivable to add a noise shielding means to the photometric system path that connects the above-mentioned imaging area and a separate photometric element, but this solution would make the entire device complicated and expensive, and Difficult to implement.

Further, as shown in FIG. 6, a half mirror 6 is installed in front of the semiconductor substrate 1, a photometric element 7 is placed on the side of the half mirror 6, and an imaging lens 8 is installed.
A device is known in which a part of the light that passes through the semiconductor substrate 1 and enters the semiconductor substrate 1 is reflected to the photometric element 7 side for photometry. According to this configuration, the object and the substrate 1 are substantially connected. Photometry can be performed within the optical path. However, in the configuration shown in FIG. 6, since a part of the incident light is reflected, there is a problem that the amount of light incident on the substrate 1 is reduced and the sensitivity is lowered. Furthermore, since the half mirror 6 is inserted between the lens 8 and the substrate 1, aberrations occur in the incident light and the image quality deteriorates.

(Means for Solving the Problems) The present invention has been made to completely solve the above problems, and in order to achieve the purpose, the electronic imaging device of the present invention has a The photometric elements are arranged in a row, and on both sides of the photometric elements, a row of light receiving elements and a vertical shift register corresponding to the row of light receiving elements are alternately arranged in parallel symmetrically with respect to the photometric element. photometric element,
It is characterized by comprising a solid-state image sensor in which a light-receiving element array and a vertical shift register are integrally formed on one semiconductor substrate, and a strobe device that is controlled based on the output of the photometric element.

In addition, a plurality of the above photometric elements were arranged on a straight line, and a coefficient was set for each photometric element that decreased as the distance from the center of the above straight line increased, and the multiplication value of each photometric element output and the corresponding coefficient was added. It is preferable that the value is the output of all photometric elements.

Alternatively, a plurality of photometric elements may be arranged on a straight line, and the area thereof may be made smaller as the distance from the center on the straight line increases, and the sum of the outputs of each photometric element may be taken as the output of all photometric elements.

Further, each of the light receiving elements and the shift register can be formed by, for example, a charge coupled device.

(Example) Hereinafter, the present invention will be described with reference to the accompanying drawings showing one example.

FIG. 1 shows a solid-state imaging device section in an electronic imaging device of the present invention. This solid-state image sensor section is constructed using an ITL type CCD, as in the conventional example.

As shown in FIG. 1, on a semiconductor substrate 1, a plurality of light receiving element rows 2, 2, . A plurality of light receiving elements 2a are arranged in a matrix. However, in this embodiment, unlike the conventional example, the left two
The vertical shift registers 3, 3 corresponding to the light-receiving element rows 2, 2 of the column are arranged parallel to the light-receiving element row 2 along the left side of each light-receiving element row 2, while the vertical shift registers 3, 3 of the two columns on the right side 3, 3 are arranged parallel to the light receiving element row 2 along the right side of the corresponding light receiving element row 2, respectively. A transfer gate 10 is interposed between each light receiving element row 2 and the corresponding vertical shift register 3. Further, one end of each vertical shift register 3 is connected to a horizontal shift register 4,
The horizontal shift register 4 is connected to a signal output terminal 11 via an output amplifier 5.

two central rows of light-receiving elements 2 on the substrate 1;
A rectangular photometric element 12 having a long side in the direction in which each light-receiving element array 2 extends (vertical direction in FIG. 1) is provided between the two. This photometric element 12
is formed, for example, as a photodiode consisting of an n ⁺ impurity diffusion region like each light receiving element 2a. As mentioned above, on both sides of the photometric element 12,
If each vertical shift register 3 is arranged along the outer side of the substrate 1 of the corresponding light-receiving element row 2, that is, along the side opposite to the photometric element 12, there will be a gap between the two central light-receiving element rows 2, Since the shift register 3 is not disposed and only the photometric element 12 is disposed, the photometric element 12 can be provided within the light receiving area without disturbing the arrangement of the light receiving element rows 2, 2, . . . .

The photometric element 12 is connected to a comparator 16 via a photometric amplifier 13, a photometric output terminal 14, and an integrator 15. The comparator 16 is configured to output an imaging regulation signal to the drive circuit 17 when the integral value Mon of the photometric output transmitted from the integrator 15 becomes equal to a preset reference value Vo. Note that a value corresponding to an appropriate amount of exposure to the light-receiving area during one imaging period is selected as the reference value Vo.

The drive circuit 17 applies a vertical shift pulse ΦV to each vertical shift register 3 based on the vertical synchronization pulse VD (see FIG. 2) generated by a circuit provided inside or outside the drive circuit, the above-mentioned imaging regulation signal, etc.
, a horizontal shift pulse ΦH to the horizontal shift register 4, and a transfer pulse ΦT to each transfer gate 10, respectively. Note that the comparator 16 and the drive circuit 17 are arranged outside the substrate 1.

In FIG. 2, the vertical synchronizing pulse VD is switched between a high level H and a low level L at regular time intervals, and from one rising edge of this VD (switching from H to L) to the next rising edge. makes one cycle. ΦT is the above transfer pulse,
ΦV is the above vertical shift pulse. This vertical shift pulse ΦV has a normal transfer frequency fv (for example, 15.75KHz) for signal charge output as a transfer frequency,
High-speed drive frequency fc for sweeping out residual charge (e.g.
1MHz). Sig is signal output terminal 11
The signal output from , Mon is the integral value of the above photometric output.

Hereinafter, the basic operation of the solid-state image sensor section will be explained in detail as time passes.

Transfer pulse ΦT is switched from low level L to high level H in synchronization with the rise of VD at time _T1 , and ΦT is set to low level L again in synchronization with the rise of VD immediately thereafter. This transfer pulse ΦT causes the charges accumulated in each light receiving element 2a before time _T1 , that is, the residual charges, to be transferred from each light receiving element column 2 to the corresponding vertical shift register 3 via each transfer gate 10. As a result, signal charges start to be newly accumulated in each light receiving element 2a according to the exposure amount from time _T1 .

Further, in synchronization with the fall of VD at time _T1 , the output of the integrator 15 is set as the initial reference value, and the integrator 15 starts integrating the photometric output proportional to the exposure amount. Further, the drive circuit 17 applies a high-speed drive frequency fc= to each vertical shift register 3 after time _T1 .
A 1 MHz vertical shift pulse ΦV is output, whereby the residual charges transferred from each light receiving element array 2 to the vertical shift register 3 are swept out at high speed to the output terminal 11 via the horizontal shift register 4 and output amplifier 5. Note that the residual charge swept out in this way is not used as an image signal.

When the integral value Mon of the photometric output reaches the reference value Vo at time Q ₂ , the imaging regulation signal is output from the comparator 16 to the drive circuit 17 as described above. In response, the drive circuit 17 outputs a transfer pulse ΦT to each transfer gate 10. Based on this transfer pulse ΦT, the signal charges accumulated in each light receiving element 2a between times _T1 and _T2 are transferred to the corresponding vertical shift register 3.
will be forwarded to. Note that since the residual charge is swept out at a high speed, the sweeping out ends before time _T2 .

The signal charge transferred to each vertical shift register 3 at time T ₂ is temporarily held in each vertical shift register 3. In synchronization with the rise of VD at time _T3 , each vertical shift register 3 is driven at a normal transfer frequency fv = 15.75kHz, and the signal charge held in each vertical shift register 3 until then is transferred to the horizontal shift register 4. Ru. Further, the signal charge is read out to the output terminal 11 via the horizontal shift register 4 and the output amplifier 5. In this way, the signal charge accumulated in each light receiving element 2a between times T ₁ and T ₂ in the first period is transferred to the second period T _{3 .}
− Read during T ₄ . At this time, the exposure amount during one imaging period T ₁ -T ₂ is always equal to the reference value Vo. The charges accumulated in each light receiving element 2a between times _T2 and _T4 are swept out at a high speed drive frequency fc during a period starting from time _T4 .

In the above explanation, ΦV and ΦH are each 1
Although only the phase was selected, due to the structure of the CCD used,
Each pulse has two to four phases.

In addition, a mechanical shutter for exposure control is used to control the time.
Exposure control can be performed such that the shutter opens at time _T1 and closes at time _T2 .

Furthermore, by omitting each transfer gate 10, using the electrode of each vertical shift register 3 as a transfer electrode, and changing the pulse value of the vertical shift pulse ΦV appropriately, the charges accumulated in each light receiving element 2a can be reduced. Direct transfer to the vertical shift register 3 is also possible.

Next, an example of the electronic imaging device of the present invention will be explained with reference to a time chart shown in FIG.

The solid-state image sensor section of the above embodiment is similar to that shown in FIG. 1, and a known battery-powered strobe device (not shown) is connected to a drive circuit 17 outside the semiconductor substrate 1 of the solid-state image sensor section. be done.

In Fig. 3, ST indicates the strobe light output emitted from the strobe device as VD, ΦT, ΦV,
Sig and Mon indicate similar pulses or signals as described above. In this case, a pulse having a normal transfer frequency of 15.75 KHz is used as the vertical shift pulse ΦV.

Light emission by the strobe is started at time _T2 in the first period, which starts simultaneously with the fall of the vertical synchronization pulse VD at time _T1 . Based on this strobe light emission, the integrator 15 integrates the photometric output.

At time _T3 , when the integral value Mon of the photometric output reaches the reference value Vo and the exposure amount reaches a predetermined value, strobe light emission is stopped. Actually, the strobe light is emitted at the time.
Finishes a little later than T ₃ . Note that the dotted line in the strobe light output is the output state when strobe light emission based on the photometry output is not stopped.

Next, by a transfer pulse ΦT synchronized with the rise of VD at time T ₄ , the charges accumulated in each light receiving element 2 a during the strobe light emission period in the first period T ₁ - _{T 4} are transferred to the corresponding vertical shift register 3. Ru. Subsequently, this charge is sequentially transferred from each vertical shift register 3 via the horizontal shift register 4 and the output amplifier 5 to the output terminal 11 during the second period T ₄ -T ₅ and is read out as an output signal Sig.
In this way, one imaging can be performed every two periods.

Next, another embodiment of the present invention will be described with reference to FIG.

In FIG. 4, three photometric elements 13a, 13b, and 13c are used, unlike the photometric element 12 in the solid-state image sensor section of FIG. As in the element section, they are arranged in a straight line between the two light receiving element rows 2, 2 in the central part of the semiconductor substrate 1. And each photometric element 12
a, 12b, 12c are photometric amplifiers 13, respectively.
a, 13b, 13c and photometry output terminals 14a, 1
It is connected to the adder 15 via 4b and 14c. In the adder 15, the output Mon-1 from the photometric element 12a located at the center of the straight line is multiplied by a large coefficient, and the outputs from the photometric elements 12b and 12c located near the ends of the straight line are multiplied by a large coefficient. It is multiplied by a coefficient smaller than the coefficient for the center photometric element 12a. Further, in the adder 15, the photometric output and each multiplication value of the coefficient are added, and then the added value is integrated. The integrated total photometric output Mon is input to the comparator 16.

In the embodiment with the above configuration, the output signal from the photometric element 12a located at the center of the light receiving area is multiplied by a larger coefficient than the output signal from the photometric elements 12b and 12c located closer to the ends. Center photometric element 1 for total photometric output Mon
The photometric output Mon-1 from 2a is largely reflected, thereby allowing more preferable photometry. Note that the same effect can be obtained by changing the area of each photometric element so that it becomes smaller as it moves away from the center of the light receiving area.

(Effects of the Invention) As described above, in the present invention, one photometric element or a plurality of photometric elements are arranged in the center of an imaging area defined by a plurality of light receiving element rows formed on one semiconductor substrate. Since an element array is formed and the amount of light irradiated to the imaging area, that is, the amount of exposure to the area is directly measured,
Exposure adjustment at the center of the imaging area, which is generally important in imaging, can be performed with high precision. In particular, since the above photometric measurement was performed on the same semiconductor substrate as that on which the photodetector array is formed, various noises from the outside surroundings of the solid-state image sensor section, such as strobe light emission, may occur during strobe imaging. Accurate exposure adjustment is possible by effectively avoiding the influence of accompanying discharge noise, and the quality of captured images can be improved.

Furthermore, in the solid-state image sensor section having the above configuration,
Since each light-receiving element row is arranged symmetrically with respect to the photometric element in the center, the pixel arrangement is not disturbed, and geometric irregularities in the photographed image can be suppressed. Further, since the light emitting element section and the shift register section are formed without disturbing the arrangement pitch, uniformity of sensitivity over the entire screen can be ensured.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram of a solid-state image sensor section applicable to the imaging device of the present invention, FIG. 2 is a time chart showing the basic operation timing of the solid-state image sensor section of FIG. 1, and FIG. 3 is a time chart of the solid-state image sensor section of the present invention. Time chart showing the operation timing of the imaging device of one embodiment, No. 4
The figure is a schematic block diagram of an imaging device according to another embodiment of the present invention, FIG. 5 is a front explanatory diagram of an imaging semiconductor device in a conventional solid-state imaging device, and FIG. 6 is a side explanatory diagram of a conventional solid-state imaging device. It is. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Light receiving element row, 2a... Light receiving element, 3... Vertical shift register (shift register), 12, 12a, 12b, 12c... Photometric element,
13, 13a, 13b, 13c...Amplifier.

Claims (1)

[Scope of Claims] 1. Photometric elements are arranged in a line in the center of a semiconductor substrate, and on both sides of the photometric element, a photodetector array and a vertical shift register corresponding to the photometric element array are arranged symmetrically with respect to the photometric element. A solid-state image sensor in which these photometric elements, photodetector arrays, and vertical shift registers are integrally integrated on one semiconductor substrate in an arrangement relationship in which they are alternately arranged in parallel, and control is performed based on the output of the photometric elements. What is claimed is: 1. An electronic imaging device comprising: a strobe device;