JPH0476601U - - Google Patents
Info
- Publication number
- JPH0476601U JPH0476601U JP11915090U JP11915090U JPH0476601U JP H0476601 U JPH0476601 U JP H0476601U JP 11915090 U JP11915090 U JP 11915090U JP 11915090 U JP11915090 U JP 11915090U JP H0476601 U JPH0476601 U JP H0476601U
- Authority
- JP
- Japan
- Prior art keywords
- playback
- recording
- output
- unit
- switch circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001934 delay Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Description
第１図は本考案による磁気固体デイスク式の録
音再生装置を示すブロツク線図、第２図は本考案
の変形例を示すブロツク線図、第３図は従来の録
音再生装置のブロツク線図である。
図において、１は音声入力端子、２は増幅器、
３は録音再生部、４はＣＰＵ部、５は操作部、６
は増幅器、７は音声出力端子、８は出力スイツチ
回路、９は遅延回路を示す。なお、図中、同一符
号は同一、または相当部分を示す。
Fig. 1 is a block diagram showing a magnetic solid disk type recording/playback device according to the present invention, Fig. 2 is a block diagram showing a modification of the present invention, and Fig. 3 is a block diagram of a conventional recording/playback device. be. In the figure, 1 is an audio input terminal, 2 is an amplifier,
3 is a recording/playback section, 4 is a CPU section, 5 is an operation section, 6
is an amplifier, 7 is an audio output terminal, 8 is an output switch circuit, and 9 is a delay circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
録音再生部と、この録音再生部の動作を指示する
操作部と、この出力を受けて、録音再生部を録音
、再生或いは停止と制御するＣＰＵ部（マイクロ
プロセツサ部）と、録音入力或いは再生出力を適
量なレベルにする増幅器を備えた録音再生装置に
おいて再生時に再生信号を予め設定した時間遅延
させる遅延回路とＣＰＵ部により制御される入力
スイツチ回路、出力スイツチ回路を有し再生終了
時、録音再生部の出力が音声出力端子に出力され
るまえに出力スイツチ回路を開路することを特徴
とする録音再生装置。 A recording and playback unit that records and plays back audio on a magnetic solid-state disk, an operation unit that instructs the operation of this recording and playback unit, and a CPU unit that receives the output and controls the recording and playback unit to record, play, or stop. A delay circuit that delays a playback signal by a preset time during playback in a recording/playback device equipped with a microprocessor section), an amplifier that adjusts the recording input or playback output to an appropriate level, and an input switch circuit controlled by the CPU section; 1. A recording/playback device comprising an output switch circuit and opening the output switch circuit at the end of playback before the output of the recording/playback section is output to an audio output terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11915090U JPH0476601U (en) | 1990-11-13 | 1990-11-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11915090U JPH0476601U (en) | 1990-11-13 | 1990-11-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0476601U true JPH0476601U (en) | 1992-07-03 |
Family
ID=31867128
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11915090U Pending JPH0476601U (en) | 1990-11-13 | 1990-11-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0476601U (en) |
-
1990
- 1990-11-13 JP JP11915090U patent/JPH0476601U/ja active Pending