JPH0480105U - - Google Patents
Info
- Publication number
- JPH0480105U JPH0480105U JP12381390U JP12381390U JPH0480105U JP H0480105 U JPH0480105 U JP H0480105U JP 12381390 U JP12381390 U JP 12381390U JP 12381390 U JP12381390 U JP 12381390U JP H0480105 U JPH0480105 U JP H0480105U
- Authority
- JP
- Japan
- Prior art keywords
- connection line
- resistance connection
- resistor
- line
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
- 239000004020 conductor Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Non-Reversible Transmitting Devices (AREA)
- Waveguides (AREA)
Description
第１図は、この考案による減衰器の回路を示す
図、第２図は、この考案による減衰器の構成例を
示す図、第３図は従来の減衰器の回路を示す図、
第４図は、従来の減衰器の構成例を示す図である
。
図において１ａ〜１ｃは第１〜第３の抵抗、２
ａ〜２ｄは第１〜第４の抵抗接続線路、３は誘電
体基板、４は接地導体、５は先端短絡線路、ＳＩ
は入力端、ＳＯは出力端を示す。なお、図中同一
符号は同一又は相当部分を示す。
FIG. 1 is a diagram showing a circuit of an attenuator according to this invention, FIG. 2 is a diagram showing a configuration example of an attenuator according to this invention, and FIG. 3 is a diagram showing a circuit of a conventional attenuator.
FIG. 4 is a diagram showing an example of the configuration of a conventional attenuator. In the figure, 1a to 1c are first to third resistors, 2
a to 2d are first to fourth resistance connection lines, 3 is a dielectric substrate, 4 is a ground conductor, 5 is a tip short-circuit line, SI
indicates an input end, and SO indicates an output end. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
入力端子につながる第１の抵抗接続線路と、この
第１の抵抗接続線路と第２の抵抗接続線路に接続
された第１の抵抗と、上記第２の抵抗接続線路に
つながる第３の抵抗接続線路と上記第２の抵抗接
続線路と第３の抵抗接続線路の接続点にその１端
がつながり、かつ他端が接地されている第２の抵
抗と、上記第３の抵抗接続線路と出力端につなが
る第４の抵抗接続線路との間に接続する第３の抵
抗で構成され、上記第２の抵抗を抵抗材料で埋め
たビアホールを使つて構成したことを特徴とする
減衰器。 a first resistance connection line configured on the microstrip line and having one end connected to an input terminal; a first resistance connected to the first resistance connection line and the second resistance connection line; a third resistance connection line connected to the second resistance connection line; and a second resistance connection line, one end of which is connected to the connection point of the second resistance connection line and the third resistance connection line, and the other end of which is grounded. A resistor, a third resistor connected between the third resistor connecting line and a fourth resistor connecting line connected to the output end, and using a via hole filled with the second resistor with a resistive material. An attenuator characterized by comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12381390U JPH0480105U (en) | 1990-11-26 | 1990-11-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12381390U JPH0480105U (en) | 1990-11-26 | 1990-11-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0480105U true JPH0480105U (en) | 1992-07-13 |
Family
ID=31871499
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12381390U Pending JPH0480105U (en) | 1990-11-26 | 1990-11-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0480105U (en) |
-
1990
- 1990-11-26 JP JP12381390U patent/JPH0480105U/ja active Pending
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