JPH0480189U - - Google Patents

Description

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention;
FIG. 2 is a timing chart of the signals of each part. Ha, Hb are a pair of rotating magnetic heads, 4, 24
8 and 28 are a pair of write clock signal generation circuits, and 42 is a common read clock signal generation circuit.

Claims (1)

[Claims for Utility Model Registration] Image signals recorded on N (=2, 3, 4,...) inclined tracks on a magnetic tape are transferred to N rotating magnetic heads arranged close to each other. Therefore, there are N time-axis error correction memories to which N reproduced video signals obtained by simultaneous reproduction are respectively supplied and written, and N horizontal memories each separated from the N reproduced video signals. N write clock signal generation circuits that generate N write clock signals based on the synchronization signal and the N burst signals and supply them to the time axis error correction memory, respectively; and the N playback video signals. A read clock signal is generated by phase modulating a reference clock signal using velocity error signals obtained based on N horizontal synchronization signals and N burst signals, respectively separated from the N clock signals. 1. A time-base error correction device comprising: a read clock signal generating circuit commonly supplied to a memory for time-base error correction;