JPH0480200U - - Google Patents
Info
- Publication number
- JPH0480200U JPH0480200U JP12357190U JP12357190U JPH0480200U JP H0480200 U JPH0480200 U JP H0480200U JP 12357190 U JP12357190 U JP 12357190U JP 12357190 U JP12357190 U JP 12357190U JP H0480200 U JPH0480200 U JP H0480200U
- Authority
- JP
- Japan
- Prior art keywords
- listener
- filter circuit
- audio signal
- transfer characteristic
- transfer characteristics
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stereophonic Arrangements (AREA)
Description
第1図は本考案に係るオーデイオ信号再生装置
の一実施例を示すブロツク図、第2図は受聴者が
ヘツドホンを装着した状態を示す概略図、第3図
は受聴者の聴覚部分の伝達特性を演算する手段の
要部を示す図、第4図は受聴者と仮想のLおよび
Rチヤンネル・スピーカの関係を示す図、第5図
は第1図の距離演算回路を示すブロツク図、第6
図AおよびBはインパルスの発振および受信タイ
ミングを示す波形図である。
1……デコーダ、3……第1のフイルタ回路(
フイルタ回路)、5……第2のフイルタ回路(フ
イルタ回路)、7……CPU、9……記憶回路(
RAM)、11……受聴者、13……ステレオ・
ヘツドホン、15……スピーカ、17……マイク
ロホン、19……キー入力装置、21……仮想の
Lチヤンネル・スピーカ、23……仮想のRチヤ
ンネル・スピーカ、25,27,41……フイル
タ回路、29……ROM、31,33……遅延回
路、35……距離演算回路、37……発振器、3
9……受信器。
Fig. 1 is a block diagram showing an embodiment of the audio signal reproducing device according to the present invention, Fig. 2 is a schematic diagram showing a state in which a listener is wearing headphones, and Fig. 3 is a transfer characteristic of the auditory part of the listener. FIG. 4 is a diagram showing the relationship between the listener and the virtual L and R channel speakers. FIG. 5 is a block diagram showing the distance calculation circuit of FIG. 1.
Figures A and B are waveform diagrams showing impulse oscillation and reception timing. 1... Decoder, 3... First filter circuit (
filter circuit), 5...second filter circuit (filter circuit), 7...CPU, 9...memory circuit (
RAM), 11... Listener, 13... Stereo
Headphone, 15...Speaker, 17...Microphone, 19...Key input device, 21...Virtual L channel speaker, 23...Virtual R channel speaker, 25, 27, 41...Filter circuit, 29 ...ROM, 31, 33 ... Delay circuit, 35 ... Distance calculation circuit, 37 ... Oscillator, 3
9...Receiver.
Claims (1)
ヤンネル・スピーカから前記受聴者の左および右
側受聴点までの伝達特性をhL(ω)およびhR
(ω)、前記受聴者に装着するステレオ・ヘツド
ホンの左および右チヤンネル・スピーカから前記
左および右側受聴点までの逆伝達特性をHL ̄1
(ω)およびHR ̄1(ω)、前記受聴者の左右
の外部的聴覚部分における逆伝達特性をEL ̄1
(ω)およびER ̄1(ω)としたとき、 少なくとも前記逆伝達特性HL ̄1(ω)、H
R ̄1(ω)、EL ̄1(ω)およびER ̄1(
ω)に関するデータを予め記憶した記憶回路と、 前記記憶回路からのデータに基づく伝達特性[
hL(ω)×HL ̄1×EL ̄1(ω)]によつ
て左チヤンネルのオーデイオ信号を通過させる第
1のフイルタ回路と、 前記記憶回路からのデータに基づく伝達特性 [hR(ω)×HR ̄1(ω)×ER ̄1(ω)
]によつて右チヤンネルのオーデイオ信号を通過
させる第2のフイルタ回路と、 を具備することを特徴とするオーデイオ信号再生
装置。[Claims for Utility Model Registration] Transfer characteristics from virtual left and right channel speakers placed in front of a listener to left and right listening points of the listener are expressed as hL(ω) and hR.
(ω), the reverse transfer characteristics from the left and right channel speakers of the stereo headphone worn by the listener to the left and right listening points are HL ̄ 1
(ω) and HR ̄ 1 (ω), the reverse transfer characteristics in the left and right external auditory parts of the listener are expressed as EL ̄ 1
(ω) and ER ̄ 1 (ω), at least the reverse transfer characteristic HL ̄ 1 (ω), H
R ̄ 1 (ω), EL ̄ 1 (ω) and ER ̄ 1 (
a memory circuit that stores data regarding ω) in advance; and a transfer characteristic based on the data from the memory circuit.
a first filter circuit that passes the audio signal of the left channel by hL(ω)×HL ̄ 1 ×EL ̄ 1 (ω)], and a transfer characteristic [hR(ω)× HR ̄ 1 (ω)×ER ̄ 1 (ω)
An audio signal reproducing device comprising: a second filter circuit for passing a right channel audio signal through a second filter circuit;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12357190U JPH0480200U (en) | 1990-11-27 | 1990-11-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12357190U JPH0480200U (en) | 1990-11-27 | 1990-11-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0480200U true JPH0480200U (en) | 1992-07-13 |
Family
ID=31871267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12357190U Pending JPH0480200U (en) | 1990-11-27 | 1990-11-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0480200U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5171101A (en) * | 1974-12-17 | 1976-06-19 | Matsushita Electric Industrial Co Ltd |
-
1990
- 1990-11-27 JP JP12357190U patent/JPH0480200U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5171101A (en) * | 1974-12-17 | 1976-06-19 | Matsushita Electric Industrial Co Ltd |
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