JPH0481086U - - Google Patents
Info
- Publication number
- JPH0481086U JPH0481086U JP12562990U JP12562990U JPH0481086U JP H0481086 U JPH0481086 U JP H0481086U JP 12562990 U JP12562990 U JP 12562990U JP 12562990 U JP12562990 U JP 12562990U JP H0481086 U JPH0481086 U JP H0481086U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- average value
- cell
- interest
- multiplication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Radar Systems Or Details Thereof (AREA)
Description
第１図は、この考案の一実施例によるＣＦＡＲ
回路の系統図、第２図はこの考案の一実施例の動
作説明図、第３図は従来のＣＦＡＲ回路の系統図
である。
図において、１はリフアレンスセル、２は注目
セル、３は平均値回路、４は乗算回路、５は比較
回路、６は積分回路、７は乗算回路１、８は乗算
回路２、９は比較回路１、１０は比較回路２、１
１は積分回路１、１２は比較回路３である。なお
、図中、同一符号は同一、又は相当部分を示す。
FIG. 1 shows a CFAR according to an embodiment of this invention.
FIG. 2 is an explanatory diagram of the operation of an embodiment of this invention, and FIG. 3 is a diagram of a conventional CFAR circuit. In the figure, 1 is a reference cell, 2 is a cell of interest, 3 is an average value circuit, 4 is a multiplication circuit, 5 is a comparison circuit, 6 is an integration circuit, 7 is a multiplication circuit 1, 8 is a multiplication circuit 2, and 9 is a comparison circuit Circuits 1 and 10 are comparison circuits 2 and 1
1 is an integrating circuit 1, and 12 is a comparing circuit 3. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
該平均値回路により算出されたビデオ平均値にＣ
ＦＡＲ係数Ｋ１を乗算する乗算回路と、この乗算
回路の出力であるスレツシヨルドレベル１と注目
セルを比較する比較回路と、上記ビデオ平均値に
ＣＡＲ係数Ｋ２を乗算する乗算回路と、この乗算
回路の出力であるスレツシヨルドレベル２と注目
セルを比較する比較回路と、比較回路の結果に基
づき制御される積分回路と、積分回路の出力を比
較検定する比較回路とを備えたＣＦＡＲ回路。 an average value circuit that calculates an average value of the input video;
C to the video average value calculated by the average value circuit.
A multiplication circuit that multiplies the FAR coefficient K1, a comparison circuit that compares the cell of interest with threshold level 1, which is the output of this multiplication circuit, a multiplication circuit that multiplies the video average value by the CAR coefficient K2, and this multiplication circuit. A CFAR circuit comprising: a comparison circuit that compares a threshold level 2 which is the output of the cell of interest with a cell of interest; an integration circuit that is controlled based on the result of the comparison circuit; and a comparison circuit that compares and verifies the output of the integration circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12562990U JPH0481086U (en) | 1990-11-27 | 1990-11-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12562990U JPH0481086U (en) | 1990-11-27 | 1990-11-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0481086U true JPH0481086U (en) | 1992-07-15 |
Family
ID=31873220
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12562990U Pending JPH0481086U (en) | 1990-11-27 | 1990-11-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0481086U (en) |
-
1990
- 1990-11-27 JP JP12562990U patent/JPH0481086U/ja active Pending
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