JPH0482850U - - Google Patents

Info

Publication number
JPH0482850U
JPH0482850U JP12793090U JP12793090U JPH0482850U JP H0482850 U JPH0482850 U JP H0482850U JP 12793090 U JP12793090 U JP 12793090U JP 12793090 U JP12793090 U JP 12793090U JP H0482850 U JPH0482850 U JP H0482850U
Authority
JP
Japan
Prior art keywords
wiring
monitor
measuring device
optical switch
semiconductor measuring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12793090U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12793090U priority Critical patent/JPH0482850U/ja
Publication of JPH0482850U publication Critical patent/JPH0482850U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例である半導体測定
装置の回路図、第2図は従来の半導体測定装置の
回路図である。1……素子、2……素子1のリー
ド、3……電源端子の配線、4……直流電源装置
、5……接地端子の配線、6……入力端子の配線
、7……入力信号発生器、8……モニター端子の
配線、9……波形モニター装置、10……光スイ
ツチ素子。なお、図中、同一符号は同一、又は相
当部分を示す。
FIG. 1 is a circuit diagram of a semiconductor measuring device which is an embodiment of this invention, and FIG. 2 is a circuit diagram of a conventional semiconductor measuring device. 1...Element, 2...Element 1 lead, 3...Power terminal wiring, 4...DC power supply, 5...Ground terminal wiring, 6...Input terminal wiring, 7...Input signal generation 8... Wiring of monitor terminal, 9... Waveform monitor device, 10... Optical switch element. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の同一素子をボード上で動作させて劣化を
調べるバーンイン装置において、セツトアツプ時
にチエツクする各素子のモニター端子に光スイツ
チを設け、このモニター端子の配線を共通化した
ことを特徴とする半導体測定装置。
A semiconductor measuring device characterized in that, in a burn-in device in which a plurality of identical devices are operated on a board to examine deterioration, an optical switch is provided at the monitor terminal of each device to be checked during setup, and the wiring of the monitor terminals is shared. .
JP12793090U 1990-11-28 1990-11-28 Pending JPH0482850U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12793090U JPH0482850U (en) 1990-11-28 1990-11-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12793090U JPH0482850U (en) 1990-11-28 1990-11-28

Publications (1)

Publication Number Publication Date
JPH0482850U true JPH0482850U (en) 1992-07-20

Family

ID=31875412

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12793090U Pending JPH0482850U (en) 1990-11-28 1990-11-28

Country Status (1)

Country Link
JP (1) JPH0482850U (en)

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