JPH0485969U - - Google Patents
Info
- Publication number
- JPH0485969U JPH0485969U JP12672890U JP12672890U JPH0485969U JP H0485969 U JPH0485969 U JP H0485969U JP 12672890 U JP12672890 U JP 12672890U JP 12672890 U JP12672890 U JP 12672890U JP H0485969 U JPH0485969 U JP H0485969U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- input video
- video signal
- separation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000926 separation method Methods 0.000 claims description 6
- 238000000605 extraction Methods 0.000 claims description 4
- 239000000284 extract Substances 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 2
Landscapes
- Synchronizing For Television (AREA)
Description
第１図は、この考案による同期分離回路の一実
施例を示す構成ブロツク図、第２図は第１図の実
施例の動作を説明するための各部信号波形図タイ
ミングチヤート、第３図は第１図の実施例の句具
体的回路構成を示す回路図、第４図は、従来の同
期分離回路を示す図、第５図は第４図の回路の各
部信号波形図タイミングチヤートである。
１……同期分離回路、２……高域通過フイルタ
、３……増幅器、４……移相器、５……上側振幅
取り出し回路、６……下側振幅取り出し回路、７
，８……加算回路。
FIG. 1 is a configuration block diagram showing an embodiment of the synchronous separation circuit according to this invention, FIG. 2 is a timing chart showing signal waveforms of each part to explain the operation of the embodiment of FIG. 1, and FIG. FIG. 1 is a circuit diagram showing a specific circuit configuration of the embodiment, FIG. 4 is a diagram showing a conventional synchronization separation circuit, and FIG. 5 is a timing chart showing signal waveforms of each part of the circuit of FIG. 4. DESCRIPTION OF SYMBOLS 1... Synchronous separation circuit, 2... High-pass filter, 3... Amplifier, 4... Phase shifter, 5... Upper amplitude extraction circuit, 6... Lower amplitude extraction circuit, 7
, 8...addition circuit.
Claims (1)
期分離回路と、 前記入力ビデオ信号から高域成分のみ抽出する
高域成分抽出回路と、 前記同期分離回路の出力信号から前記高域成分
抽出回路で抽出した信号に基づいてパルス性ノイ
ズを除去して同期信号を出力するノイズ除去回路
と、 を備えて成ることを特徴とする同期分離回路。[Claims for Utility Model Registration] A sync separation circuit that separates and outputs a sync signal from an input video signal; a high-frequency component extraction circuit that extracts only high-frequency components from the input video signal; and a sync separation circuit that extracts only high-frequency components from the input video signal; A synchronization separation circuit comprising: a noise removal circuit that removes pulse noise based on the signal extracted by the high frequency component extraction circuit and outputs a synchronization signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12672890U JPH0485969U (en) | 1990-11-30 | 1990-11-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12672890U JPH0485969U (en) | 1990-11-30 | 1990-11-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0485969U true JPH0485969U (en) | 1992-07-27 |
Family
ID=31874269
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12672890U Pending JPH0485969U (en) | 1990-11-30 | 1990-11-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0485969U (en) |
-
1990
- 1990-11-30 JP JP12672890U patent/JPH0485969U/ja active Pending
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