JPH0487340A - Manufacture of thin-film transistor - Google Patents

Abstract

PURPOSE:To simultaneously implant impurities into many polycrystalline silicon layers formed on a large-area substrate for TFT use by a method wherein, when impurity ions are implanted into the polycrystalline silicon layers, a plasma doping operation using an apparatus of a DC sputtering structure is executed. CONSTITUTION:A source region and a drain region 22-1, 22-2 are formed in a self-alignment method by making use of a formed gate electrode 24 as a mask. At this time, a quartz substrate 21 on which many polycrystalline silicon films 22 having the gate electrode 24 have been formed is placed on the cathode of an ion implantation apparatus 1, and a plasma doping operation is executed. In addition, implanted impurity ions are activated; an interlayer insulating film 25 composed of an SiO2 film is formed by a stuttering method. (Refer to (c) in the figure.) A contact hole is opened. After that, an Al interconnection layer 26 is formed. In addition, it is covered with a silicon nitride film 27 and an SiO2 film 28; a hydrogenation treatment is executed; a TFT having a desired characteristic is obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an ion implantation method in a method of manufacturing a thin film transistor (hereinafter referred to as TPT), and relates to a method using plasma doping during ion implantation. In recent years, research has been progressing on thin film transistors (TPTs) useful as elements for drive circuits of drive switches of liquid crystal display devices.

In particular, TPTs using polycrystalline silicon, which has high electron mobility and stable characteristics, are often used as elements for these drive circuits.

Conventionally, TPT using polycrystalline silicon is manufactured as follows.

That is, a polycrystalline silicon layer is formed on a substrate made of quartz or the like, etched into an island shape, and then a gate oxide film and a gate electrode are formed. Next, use this as a mask and use the self-alignment method (
Source/drain regions are formed from two layers.

At this time, ion implantation is usually used to introduce impurities. That is, impurity ions generated by an ion source are accelerated with a high electric field, and the impurity is mechanically implanted into the polycrystalline silicon layer.

After the implanted ions are activated, a protective film is formed and a wiring layer is formed to complete the device.

The ion implantation method allows the amount of impurities implanted into the substrate to be measured with high precision, and its characteristics can be easily controlled, and it can be formed at a sufficiently low temperature compared to the conventional thermal diffusion method, so it is particularly effective. It is widely used in the production of polycrystalline silicon TPT.

[Problem to be solved by the invention]

Recently, the screens of flat display devices such as liquid crystal display devices have become larger, and as a result, it has become necessary to form a large number of TPTs on a large-area substrate.

However, in the ion implantation method using a conventional ion implantation device, the ion beam is focused and implanted into the polycrystalline silicon layer, so the device is not only large but also has a diameter of 9.
A large number of elements formed on a large-area substrate of about 0an;
It was impossible to implant ions at the same time.

Therefore, an object of the present invention is to provide a method for simultaneously introducing impurities into a large number of TPTs formed on a large-area substrate in a method for manufacturing TPTs using polycrystalline silicon.

[Means to solve the problem]

In order to achieve the above object,9 the present inventors have conducted intensive research and found that when implanting impurity ions into a polycrystalline silicon layer,
By performing plasma doping using a sputter structure device, a large number of polycrystalline silicon layers are formed on a large-area substrate for TFT.

It has been found that it is possible to simultaneously implant impurities.

〔Example〕

An embodiment of the present invention will be described with reference to FIGS. 1 and 2.

FIG. 1 is a structural explanatory diagram of a plasma doping apparatus having a DC sputter structure according to the present invention, and FIG. 2 is a diagram showing a TPT using the present invention.
It is a manufacturing process explanatory diagram.

In FIG. 1, 1 is a sputtering chamber, 2 is an anode, 3 is a cand, 4 is a gas, 5 is an exhaust unit such as a pump,
6 is a DC power supply, 7 is a wafer, which is a substrate having a polycrystalline silicon layer, and 8 is a heater.

For example, the pressure inside the ion implanter having the structure as shown in FIG.
2.0) If n-type impurities are to be implanted, introduce phosphon (PHs) diluted with hydrogen into the device (210001)I), warm the substrate to 300°C (= warm the applied voltage to 400°C, etc.). 700V, distance between electrodes 50m
, discharge was performed for 5 minutes with an electrode diameter of 150 mm, and phosphorus ions were implanted into a predetermined portion of the polycrystalline silicon layer.

Form an n-type region.

If p-type impurities are to be implanted, Ar and diborane (BzHs) gases are introduced into the device.

According to the present invention, two impurity ions can be simultaneously implanted into a large number of polycrystalline silicon layers formed on a large-area substrate.

Next, an example of a method for manufacturing TPT using the present invention will be explained with reference to FIG.

FIG. 2 is an explanatory diagram of the manufacturing process of TPT.
An amorphous silicon film is deposited to a thickness of, for example, about xoooA using a VD method at a substrate temperature of 560°C. Next, this amorphous silicon film was heat-treated at 600°C for 50 hours and further heated to 950°C.
After heating for 1 hour, a polycrystalline silicon film 22 is formed by solid phase growth.
form.

This polycrystalline silicon film 22 is patterned into an island shape (=
Etch (see Figure 2(a)).

(n) Sputter gate oxide film 23 by approximately 500X
Next, a polycrystalline silicon layer of about 10
After 00 to 3000X deposition, the gate electrode 24 is formed by etching (see FIG. 2(b)) 0(1) The formed gate electrode 24 is used as a mask.

Source and drain regions 22-1.22-2 by self-alignment method
form. That is, at this time, a quartz substrate 21 on which a large number of polycrystalline silicon films 22 having gate electrodes 24 are formed is placed on the cathode of the ion implantation apparatus 1 having the structure as shown in FIG. 1 of the present invention.

The pressure inside the ion implanter was 2.0 Torr, and the DC voltage was 700
Plasma doping is performed for 5 minutes by introducing PHs gas diluted with 10001)Im hydrogen under the conditions of V and substrate temperature of 300°C.

Furthermore, the implanted impurity ions were activated for 1 hour in a nitrogen atmosphere at 600°C, and the secondary
(A glabellar insulating film 25 made of an H film is formed to a thickness of about 1000× (see FIG. 2(C)).

After forming a contact hole in this interlayer insulating film 25, an M wiring layer 26 is formed and heated at about 450° C. for 30 minutes (see FIG. 2(d)).

(Capital) Plasma C
For example, about 2000X is deposited by the VD method (Fig. 2(e)).
reference).

(VID) Next, a dense 5iCh film 28 is deposited to a thickness of about 1000× to 1 μm, for example, by an ozone CVD method using tetraethoxysilane (TE01).

The TPT coated with the silicon nitride film 27 and the 5iOi film 28 is heat-treated and hydrogenated.

Obtain TPT with desired properties (see Figure 2(f))
.

2 In this embodiment, an example was explained in which a quartz substrate was used as the substrate for forming the TPT. However, the present invention is not limited to this. It is also possible to use a glass substrate such as the following.

Similarly, in the TPT manufacturing process, the hydrogenation treatment is not limited to this embodiment.

〔Effect of the invention〕

In the production of TPTs using polycrystalline silicon as in the present invention, the introduction of impurity ions (= plasma doping) to form the operating region (secondly, the use of large-area substrates (= large number of TPTs) Many regions can be doped at the same time for formation.

Therefore, it is possible to form a TPT using a large number of polycrystalline silicon on a large-area substrate using this method, and it is very useful as an element for drive circuits of liquid crystal display devices and image sensors, whose screens have become increasingly large in recent years. It is.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of the structure of the plasma doping apparatus of the present invention. FIG. 2 is an explanatory diagram of the manufacturing process of TPT using the present invention. 1... Sputtering chamber. 2...Anode. 3... Cando. 4...Gas inlet. 5...Exhaust unit. 6...DC power supply. 7...Wafer 8...Heater. Patent applicant Akira Yamatani (1 other person), patent attorney representing T.D.K Co., Ltd.

Claims (1)

[Claims] A method for manufacturing a thin film transistor using polycrystalline silicon, characterized in that impurity doping for forming an element region is performed by plasma doping using a DC sputtering device.