JPH0488782A - Image pickup device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an imaging device such as a single-chip color video camera or an electronic multi-camera.

[Prior Art] Conventionally, the arrangement of color filters in this type of imaging device is well known, such as a stripe filter as shown in FIG. 4 and a mosaic filter as shown in FIG. 5. For example, “Kunio Imai Current state of technology for good image quality in consumer video movies, Electronics Essentials P, 6 198
9.7”, COD with the same number of pixels
Generally, when using a mosaic filter, higher horizontal resolution can be obtained than when using a stripe filter. For this reason, most recent video cameras employ this mosaic filter method.

On the other hand, as disclosed in US Pat. No. 3,971,0654, it is clear that the above-described single-chip video camera can be constructed even by using an image sensor equipped with a so-called Bayer array color filter.

When such an arrangement is used, the luminance Y is two-dimensionally offset sampled as described in USP 3,971,065, so the sampling efficiency is high, and therefore the luminance signal Y obtained in this way is If the imaging signal is processed using this method, an extremely high quality image can be obtained.

Problem to be solved by invention C] Therefore, if image sensors with the same number of pixels are used, for example, the second
Better image quality can be obtained by using the ayer array as shown in FIG.

In order to obtain such good image quality, for example, in Fig. 6,
The luminance signal Y0 of the shaded part is, for example, Yo = K [Yl +Y2 +Y3 +Y4]
As shown in (1), it is necessary to interpolate from the luminance signals of the upper, lower, left and right pixels.

However, for example, interline type COD can only perform interlaced driving, so in the conventional analog processing method, when scanning the second line in Figure 6, the information of Y3 and Y4 is in different fields, so it is easy to However, there have been few attempts to actually configure an imaging device using the Bayer array.

Also, when interlaced scanning is performed for color signals, for example, in Figure 2, only Y and Cy5 information is obtained in the first field, and Y and Y information is obtained in the second field. was extremely difficult.

Means (and operation) for solving problem C] According to the present invention, a signal from an imaging device is A-D converted, a part of it is recorded in a memory, and then digital processing is performed, thereby converting the normal interlace Even if an interline COD that can only perform scanning is used, an imaging device suitable for the Bayer arrangement can be configured.

[Embodiment] FIG. 1 is a diagram showing the configuration of a video camera to which the present invention is applied.

An optical image formed on the image sensor 13 through the lens 11 and the optical low-pass filter 12 is photoelectrically converted on the image sensor 13. The image sensor 13 is equipped with a color filter as shown in FIG. A signal read out by interlace scanning from the image sensor 13 is subjected to signal processing such as CDS and γ processing in an analog processing circuit 14, and then A/D conversion is performed in an A/D converter 15. A-D converter 1
The output of 5 is outputted by latch circuit 16.17 at timing φl,
It is latched at φ2. φ1 and φ2 have a period twice as long as the reading clock φ0 for each pixel of the image sensor, and have mutually inverted phases.

As a result, the latch 16 outputs Y, and the latch 17 outputs Cy or Y for each field.

The switch 18 performs luminance interpolation which alternately outputs the output of the latch 16 and O in synchronization with ψ1 [22 performs luminance interpolation using a field memory as described later.

Next, color processing may be performed as follows to obtain two color differences R-Y and B-Y.

That is, the signal obtained by subtracting C9 from Y is considered to be approximately the R signal.

R=kY-αc y (t) Similarly, B=12Y-βY, (2).

(Here, a, β, and β are constants.) Therefore, in the first field, the multipliers 19 and 20
, the second field is controlled by the system controller 25 to have the magnification of β and β in equation (2). Since the subtracter 21 calculates these differences according to equations (1) and (2), the output of the subtracter 21 becomes a field sequential R1B signal. Note that the subtraction may be performed in synchronization with φ1 or φ2. The color processing unit 23 also performs interpolation processing, simultaneous processing, γ processing, etc. using one field's worth of memory.

A color difference matrix section 24 takes the difference between Yγ and Ry Bγ to form two color difference signals, which are made into interleaved signals by an NTSC encoder 26, and a synchronization signal added by a synchronization signal addition section 27. Also, D/A converter 2
8, it is D/A converted and output as a video signal.

Of course, the present invention can also be applied to other interlaced systems, such as PAL systems.

Next, FIG. 7 shows an example of the configuration of the luminance signal interpolation section 22. In this example, a horizontal FIR filter 31 and a vertical FIR filter 3 are shown.
2 are connected in cascade.

The horizontal FIR filter 31 has coefficient multipliers 35, 36, 37
The interpolation low-pass filter C'A is composed of a delay 33, a delay 33, a delay 33, and an adder 38.

Vertical FIR filter 32 has coefficient multipliers 41, 42, 43
and IV-0, FIFO type field memory 3 for 5H
9, an IH delay memory 40, and an adder 44 (
An interpolation low-pass filter called ``station, 1, ``station'' is constructed.

Therefore, as a whole, a so-called 'secondary interdimensional low-pass filter is constructed.

Further, an example of the configuration of the color processing 23 is shown in FIG. The field sequential R/B signal is filtered horizontally by a horizontal FIR filter 51 and then vertically by a vertical FIR filter 52.

Furthermore, by delaying the output of the FIFO type memory 59 filter 52 for one field by 1■, the memory 5
The R and B signals are simultaneously obtained at the input and output of 9. When this is switched field by field using switches 60 and 61, R and B are obtained as these outputs.

The R and B signals are subjected to γ conversion in γ conversion units 62 and 63, and then the data rate is doubled in a color signal horizontal interpolation unit 64. This is because the above color processing has been performed in synchronization with the clock φl. Therefore, the capacity of the field memory 59 may be approximately half that of the field memory 39.

[Other Embodiments] The present invention is also effective if an arrangement as shown in FIG. 3 is used instead of the arrangement in FIG. 2.

In the case of FIG. 3, the color reproducibility is good because the filter is a pure color, but because the difference in sensitivity between Y, R, and B is large, Y tends to be saturated.

In this case, in FIG. 1, the output of the latch 17 will be R or B, so it can be inputted as is to the color processing section 23, or it can be configured similarly to FIG. 1 and the gain of the multiplier can be changed. While maintaining white balance through control, the color differences may be input to the color processing unit 23 in the form of color differences R-Y and B-Y, and processed as they are.

In addition, when real-time processing is not required, such as with an electronic still camera, the configuration shown in Figure 1 can be used to temporarily record data in a normal memory, not a FIFO, and then read the contents of the memory at an appropriate speed while digitally processing the data. Processing may be performed.

[Effects of the Invention] According to the present invention, it is possible to perform
Signal processing becomes possible by using an interlace-driven image sensor having a Bayer array, and the high image quality inherent to the Bayer array can be realized.

[Brief explanation of the drawing]

FIG. 1 is an embodiment of the present invention, FIG. 2 is another embodiment of a color filter suitable for the present invention, FIGS. 4 and 5 are conventional color filter side ports, respectively, and FIG. A diagram showing an example of the luminance interpolation method in the invention, FIG. 7 is a side entrance of the luminance interpolation circuit of the invention,
FIG. 8 shows a side view of the color processing section of the present invention. 13: Image sensor, 15: A-D converter 39: Field memory for luminance 59: Field memory for color signal

Claims (1)

[Claims] Imaging in which pixels are equipped with a first filter corresponding to luminance or are not equipped with a filter in a checkerboard pattern, and other pixels are arrayed with at least two types of second and third color filters. An imaging device comprising: an element; and a memory that performs interpolation of luminance signals and synchronization of color signals of signals from the imaging element.