JPH0492496A - How to manufacture printed circuit boards and how to mount electronic components - Google Patents

How to manufacture printed circuit boards and how to mount electronic components

Info

Publication number
JPH0492496A
JPH0492496A JP20819790A JP20819790A JPH0492496A JP H0492496 A JPH0492496 A JP H0492496A JP 20819790 A JP20819790 A JP 20819790A JP 20819790 A JP20819790 A JP 20819790A JP H0492496 A JPH0492496 A JP H0492496A
Authority
JP
Japan
Prior art keywords
hole
plating
forming
printed circuit
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20819790A
Other languages
Japanese (ja)
Other versions
JP2653905B2 (en
Inventor
Toshihiro Hachiya
八矢 登志広
Teruo Oi
大井 輝男
Keiichi Murata
啓一 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2208197A priority Critical patent/JP2653905B2/en
Publication of JPH0492496A publication Critical patent/JPH0492496A/en
Application granted granted Critical
Publication of JP2653905B2 publication Critical patent/JP2653905B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal

Landscapes

  • Manufacturing Of Printed Circuit Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To mount in high density by filling a conductive material in a predetermined specific through hole, electrolessly plating an entire board, and forming lands and a wiring pattern in through hole openings and on through hole marks filled with the material. CONSTITUTION:After plating catalyst such as palladium, etc., is applied to an entire board including a through hole, it is electrolessly plated to form a first layer copper-plated film 10a. A conductive material 9 is buried in a specific hole 3 by printing. It is secondly electrolessly plated to form a second layer copper-plated film 10b. A resist pattern 12 for forming a wiring pattern 1a including lands 7 is formed. With the pattern 12 as a mask the copper layer is selectively etched, and the pattern 1a including the lands 7 is formed. Further, after the pattern 12 is removed, the lands 7 necessary for connecting are removed, and the board surface is covered with solder resist 13.

Description

【発明の詳細な説明】[Detailed description of the invention] 【産業上の利用分野】[Industrial application field]

本発明は1表裏両面に実装可能な配線パターンを有する
プリント基板の製造方法とそれを用いた電子部品の実装
方法に係り、特に高密度実装に好適なプリント基板の製
造方法とそれを用いた電子部品の実装方法に関する。 [従来の技術1 従来の両面実装用プリント基板においては、−船釣な配
線パターンの接続方法として、第7図にその断面図を示
すように、スルーホール3により基板1の両面に設けら
れた配線パターン1aを電気的に接続する構造と成って
いる。そして、電子部品の実装においては、リード部品
5のようにリード5aを有するものについては、それを
スルーホール内に挿入して、例えばはんだリフロー等に
より基板にはんだ付けされる。また、半導体LSIのよ
うにリードを持たないチップ部品(面付は部品とも云う
)6については、基板表面の配線パターンのはんだ付は
ランド7にチップ部品の接続端子6aがペーストはんだ
により接続される。そして、チップ部品6が実装される
周辺や下部のスルーホール内には、予め基材2と同材質
の絶縁物の表面に金属めっきを施したチップが埋め込ま
れたり、導電ペーストが埋め込まれる場合もある。 なお、この種のプリント配線基板に関するものとしては
、例えば特公昭61−35720号公報が挙げられる。
The present invention relates to a method of manufacturing a printed circuit board having a wiring pattern that can be mounted on both the front and back surfaces, and a method of mounting electronic components using the same, and particularly a method of manufacturing a printed circuit board suitable for high-density mounting and an electronic component using the same. Concerning how to mount parts. [Prior art 1] In the conventional printed circuit board for double-sided mounting, as shown in the cross-sectional view of FIG. It has a structure in which wiring patterns 1a are electrically connected. When mounting electronic components, those having leads 5a, such as the lead component 5, are inserted into through holes and soldered to the board by, for example, solder reflow. In addition, for chip components (also referred to as surface-mounted components) 6 that do not have leads, such as semiconductor LSIs, the wiring pattern on the surface of the board is soldered so that the connection terminals 6a of the chip components are connected to the lands 7 by paste solder. . In the through-holes around and below where the chip components 6 are mounted, chips may be embedded in advance with metal plating applied to the surface of an insulator made of the same material as the base material 2, or conductive paste may be embedded. be. Note that Japanese Patent Publication No. 61-35720 is cited as an example of this type of printed wiring board.

【発明が解決しようとする課題】[Problem to be solved by the invention]

上述の通り、プリント基板に部品を搭載するに際しては
、リード部品とチップ部品とを混載して実装することが
多く、また、実装密度が大きくなればなるほどプリント
基板に設けられるスルーホールの数も多くなり、それだ
け配線パターンに占めるスルーホールの面積も増大し、
チップ部品の搭載に支障を来たしていた。つまり、チッ
プ部品は、基板表面の配線パターンのはんだ付はランド
7にその接続端子6aがペーストはんだにより接続され
るが、その際、接続直下にこのスルーホールが存在する
とこれを導体で埋込み、ここに安定した接続を形成する
必要がある。この埋込み方法として従来の絶縁物の表面
に金属めっきを施したチップを埋め込んだり、導電ペー
ストを埋め込んだりするものは、いずれも実用的でなか
った。 即ち、前者においては、高密度実装になるほどチップの
埋込みが困難となり、後者においては第7図の左の端子
6aに見られるようにペーストはんだ8がスルーホール
内3に沈むため、はんだ付は不良が発生するという問題
があった。 上記いずれの方法においてもチップ部品6の接続は、導
電ペーストにより接続部のみをスポット的に行うもので
あり、接続部のはんだ付性については考慮されていない
。 したがって、本発明の目的は、これら従来の問題点を解
消することにあり、その第1の目的は。 リード部品とチップ部品とを混載して高密度に実装する
ことができるように、スルーホールを実用的に改良され
た手段で埋め込み、この埋め込まれた跡のスルーホール
部上にも他の配線パターンと同様に、はんだ付はランド
を形成してチップ部品をはんだ付けすることのできるプ
リント基板の製造方法を、そして第2の目的は、このプ
リント基板の製造方法により得られた基板を用いた電子
部品の実装方法を、それぞれ提供することにある。 1課題を解決するための手段】 上記本発明の第1の目的は5 (1)、絶縁基材の両面に導体箔を張りあわせた基板を
準備する工程と、この基板に所定口径の貫通孔(スルー
ホール)を設ける工程と、少なくとも前記スルーホール
内にめっき触媒を付与する工程と、前記スルーホール中
の予め予定された特定スルーホール内に導電材料を充填
する工程と、残されたスルーホール(導電材料を充填し
ないスルーホール)内を含み基板全面に無電解めっきを
施す工程と、前記スルーホール開口部及び導電材料の充
填されたスルーホール跡にそれぞれランドを、そしてラ
ンドに接続された配線パターンを形成するためのレジス
トパターンを形成する工程と、前記レジストパターンを
マスクとして前記導体箔を選択的にエツチングする工程
と、前記レジストマスクを除去する工程とを有して成る
プリント基板の製造方法により、達成される。 そして、好ましくは、 (2)、絶縁基材の両面に導体箔を張りあわせた基板を
準備する工程と、この基板に所定口径の貫通孔(スルー
ホール)を設ける工程と、少なくとも前記スルーホール
内にめっき触媒を付与する工程と。 スルーホール内を含み基板全面に無電解めっき処理を施
し、第1のめっき膜を形成する工程と、前記スルーホー
ル中の予め予定された特定スルーホール内に導電材料を
充填する工程と、残されたスルーホール(導電材料を充
填しないスルーホール)内を含み基板全面にめっき処理
を施し、第2のめっき膜を形成する工程と、前記スルー
ホール開口部及び導電材料の充填されたスルーホール跡
にそれぞれランドを、そしてランドに接続された配線パ
ターンを形成するためのレジストパターンを形成する工
程と、前記レジストパターンをマスクとして前記めっき
膜が積層された導体箔を選択的にエツチングして、配線
パターンを形成する工程と、前記レジストマスクを除去
する工程とを有して成るプリント基板の製造方法により
、達成される。 さらに好ましくは、 (3)、上記(1)もしくは(2)記載の絶縁基材の両
面に導体箔を張りあわせる代わりに、絶縁基材の表面に
後の工程で形成されるめっき膜と基材との接着性を良く
するための接着剤塗布処理を施した基板を準備する工程
として成るプリント基板の製造方法により、達成される
。つまり、この製造方法が上記(1)もしくは(2)の
それと異なるところは、絶縁基材の両面に導体箔を張り
あわせた基板を使用する代わりに、絶縁基材のスルーホ
ール内の導体めっき処理を兼ねてその両面に一体的に導
体めっき層を形成する点にある。また。 (4)、上記(2)もしくは(3)記載の第2のめっき
膜を形成する工程のめっき処理としては、電解めっき処
理、無電解めっき処理の何れでもよいが、絶縁基材の両
面に導体箔を張りあわせた基板を使用する場合には、無
電解めっき処理が実用的である。また、導体箔を張りあ
わせていない基板を使用する場合には、配線導体として
必要な厚みを確保するために電解めっき処理とした方が
析出速度(めっき速度)が早く実用的である。 さらにまた、好ましくは、 (5)、上記(1)乃至(4)何れが記載のレジストマ
スクを除去する工程の後に1部品接続に必要なランド上
及びスルーホール内を除き基板全面にソルダーレジスト
を形成する工程を付加して成るプリント基板の製造方法
により、達成される。 上記導電材料としては、スルーホール内への充填のし易
さから、例えば銀ペーストや銅ペースト等の導電性ペー
ストが実用的である。また、充填方法としては、印刷に
よることが容易で望ましい。 上記導体箔としては、通常良く使用されている銅箔が、
また、めっき処理としては、無電解銅めっき処理、もし
くは電解銅めっき処理が実用的で好ましい。 さらにまた、ソルダーレジストとしては、市販の例えば
エポキシ樹脂系5もしくはポリイミド系等の耐熱性樹脂
が使用される。 上記本発明の第2の目的は。 (6)、上記(1)乃至(5)記載のプリント基板の製
造方法に引き続き、上記スルーホールにはリード部品の
リードを、導電材料の充填されたスルーホール跡のラン
ド上には面付は部品を搭載、配置し、それぞれはんだ接
続する工程を含むリード部品と面付は部品とが混載され
た電子部品の実装方法により、達成される。そして好ま
しくは、(7)、上記部品のはんだ接続工程を、面付は
部品の接続と、リード部品の接続とをそれぞれ異なる融
点のはんだで2段階に分割してはんだ接続する工程とす
ることが望ましい。即ち、面付は部品の接続用はんだを
、リード部品のそれより高融点のものとしてリード部品
よりも先に接続するか、或いは、この逆となるが、実用
的には前者が好ましい。
As mentioned above, when mounting components on a printed circuit board, lead components and chip components are often mounted together, and the higher the mounting density, the greater the number of through holes provided on the printed circuit board. This increases the area of the through hole in the wiring pattern.
This was causing problems in mounting chip components. In other words, when soldering the wiring pattern on the surface of the board, the chip component connects the connecting terminal 6a to the land 7 using paste solder, but at that time, if there is a through hole directly below the connection, it is filled with a conductor and need to form a stable connection. Conventional embedding methods, such as embedding metal-plated chips or embedding conductive paste into the surface of an insulator, have not been practical. That is, in the former case, the higher the density of mounting, the more difficult it is to embed the chip, and in the latter case, as seen in the terminal 6a on the left in Figure 7, the paste solder 8 sinks into the through hole 3, resulting in poor soldering. There was a problem that occurred. In any of the above methods, the chip components 6 are connected only in spots using conductive paste, and the solderability of the connections is not considered. Therefore, the purpose of the present invention is to solve these conventional problems, and its first purpose is to. In order to enable high-density packaging of lead components and chip components, the through-holes are buried using a practically improved method, and other wiring patterns are also formed on the through-holes where they are buried. Similarly, soldering is a method for manufacturing printed circuit boards that can form lands and solder chip components. The purpose is to provide each component mounting method. [Means for Solving Problems 1] The first object of the present invention is 5 (1) a step of preparing a substrate having conductive foil pasted on both sides of an insulating base material, and forming a through hole of a predetermined diameter in this substrate. (a step of providing a through hole), a step of applying a plating catalyst at least in the through hole, a step of filling a predetermined specific through hole in the through hole with a conductive material, and a step of filling the remaining through hole. A process of applying electroless plating to the entire surface of the board including the inside (through-holes that are not filled with conductive material), and lands on the openings of the through-holes and the traces of the through-holes filled with conductive material, and wiring connected to the lands. A method for manufacturing a printed circuit board, comprising the steps of forming a resist pattern for forming a pattern, selectively etching the conductive foil using the resist pattern as a mask, and removing the resist mask. This is achieved by Preferably, (2) a step of preparing a board in which conductive foil is pasted on both sides of an insulating base material, a step of providing a through hole (through hole) of a predetermined diameter in this board, and a step of providing at least a through hole in the through hole. and a step of applying a plating catalyst to. A step of performing electroless plating on the entire surface of the substrate including the inside of the through hole to form a first plating film, a step of filling a predetermined specific through hole among the through holes with a conductive material, and a step of filling the remaining through hole with a conductive material. A step of plating the entire surface of the substrate including the inside of the through hole (through hole not filled with conductive material) to form a second plating film, and a step of forming a second plating film on the through hole opening and the trace of the through hole filled with conductive material. A step of forming a resist pattern to form a land and a wiring pattern connected to the land, and selectively etching the conductive foil on which the plating film is laminated using the resist pattern as a mask to form the wiring pattern. This is achieved by a printed circuit board manufacturing method comprising the steps of forming a resist mask and removing the resist mask. More preferably, (3), instead of pasting conductive foil on both sides of the insulating base material described in (1) or (2) above, a plating film and a base material are formed on the surface of the insulating base material in a later step. This is achieved by a printed circuit board manufacturing method that includes the step of preparing a board that has been coated with an adhesive to improve its adhesion. In other words, the difference between this manufacturing method and that of (1) or (2) above is that instead of using a board with conductor foil pasted on both sides of the insulating base material, conductor plating treatment is applied in the through holes of the insulating base material. The point is that a conductor plating layer is integrally formed on both sides. Also. (4) The plating treatment in the step of forming the second plating film described in (2) or (3) above may be either electrolytic plating treatment or electroless plating treatment, but the conductor may be applied to both sides of the insulating base material. When using a substrate laminated with foil, electroless plating is practical. Furthermore, when using a substrate that is not laminated with conductive foil, electrolytic plating is faster and more practical in order to ensure the necessary thickness for the wiring conductor. Furthermore, preferably (5), after the step of removing the resist mask described in any one of (1) to (4) above, a solder resist is applied to the entire surface of the board except for the lands and through holes necessary for connecting one component. This is achieved by a printed circuit board manufacturing method that includes an additional step of forming. Practical examples of the conductive material include conductive pastes such as silver paste and copper paste because they can be easily filled into through holes. Further, as a filling method, printing is easy and desirable. Copper foil, which is commonly used as the conductor foil, is
Further, as the plating treatment, electroless copper plating treatment or electrolytic copper plating treatment is practical and preferable. Furthermore, as the solder resist, a commercially available heat-resistant resin such as epoxy resin 5 or polyimide resin is used. The second object of the present invention is as follows. (6) Following the method for manufacturing a printed circuit board described in (1) to (5) above, the lead of the lead component is placed in the through hole, and the surface is not placed on the land of the through hole filled with conductive material. Lead components and surface mounting, which includes the steps of mounting, arranging components, and respectively soldering them, are achieved by a mounting method for electronic components in which components are mixedly mounted. Preferably, (7) the above-mentioned soldering process for the components is a process in which the connection of the surface-mounted components and the connection of the lead components are divided into two stages using solders having different melting points. desirable. That is, in surface mounting, the solder for connecting the components is connected before the lead component by using a solder having a higher melting point than that of the lead component, or vice versa, but the former is preferred in practice.

【作用1 本発明による特定の、スルーホール内への導電性材料の
埋め込みは、スルーホールを基板に設けた後、めっき処
理前に直ちに埋め込むか、もしくは基板表面全域(貫通
しているスルーホールの内壁を含む)にわたり無電解め
っきにより、例えば銅めっき膜を形成した後に埋め込む
かの2通りの方法がある。勿論この導電性材料を埋め込
んだ後には、貫通しているスルーホールの内壁を含む基
板全面に必ず無電解めっき処理によりめっき膜を形成す
るのであるが、その後の配線パターンの形成工程におい
て、この導電性材料の埋め込まれたスルーホールの跡に
は、めっき膜のランド(面付はチップの接続電極となる
)が形成される。したがってこのランドは、スルーホー
ルが設けられていない領域に形成されるランドと同一の
配線パターン形成プロセスで、しかも同じ銅めっき膜で
形成されるので部品の接続性がよい。つまり、面付は部
品の接続は、めっき膜ランドで行われる。そして、スル
ーホール内に埋め込まれた導電性材料は、このめっき膜
ランドで封じられた構造を有するため、はんだ接続時に
流出したり、スルーホール内に沈んで接続不良を起す恐
れがない。 さらにまた、このランド形成のためのめっき膜の形成及
びその後の選択的エツチングによるランドパターンの形
成は、スルーホール内壁を含む基板両面をめっきし、こ
のめっき膜に必要な配線パターンを形成する一連の工程
の中で行われるため、特別の工程を設ける必要もない。 【実施例】 以下、図面に示した工程図により、本発明の一実施例を
説明する。 実施例1゜ 第1図は、従来のプリント基板の製法と同様の方法で、
スルーホール3に第1層目の銅めっき膜10a形成した
後、導電性材料9を所定のスルーホール3内に埋込み、
その後第2層目のめっき銅膜10bを形成し、その後選
択的エツチング処理により基板1の両面にランド7を含
む配線パターン1aを形成した構成を示した基板要部の
断面図である。以下、第2図の工程図により、さらに具
体的に説明する。 第2図は、周知のサブトラクティブ工法によるプリント
基板の製法に従って製造する様子を示したもので、 同図(a)は、絶縁基材2に両面銅張りされた基板を準
備する工程。 同図(b)は、ドリルで貫通孔3を設けるスルーホール
形成工程、 同図(c)は、スルーホール内を含む基板全面にパラジ
ウム等のめっき触媒を付与した後に、無電解銅めっきを
施すことにより第1層目の銅めっき膜10a形成する工
程、 同図(d)は、特定のスルーホール3内に導電材料(銀
ペーストや銅ペースト等)9を印刷により埋め込む工程
、 同図(e)は、2度目の無電解銅めっきを施すことによ
り第2層目の銅めっき膜10b形成する工程、 同図(f)は、ランド7を含む配線パターン1aを形成
するためのレジストパターン12を形成する工程、 同図(g)は、レジストパターン12をマスクとして銅
層を選択的にエツチングし、ランド7を含む配線パター
ン1aを形成する工程を、それぞれ示したものである。 以上、ここまでの工程で基本的なプリント基板の製造工
程は終了するが、好ましくは次ぎの工程に継続される。 同図(h)は、レジストパターン12を除去した後、接
続に必要なランド7(スルーホール3を含む)を除き、
周知のソルダーレジスト13で基板表面を被覆する工程
を示す、これで、本実施例によるプリント基板の製造工
程は終了した。 次ぎに、この製造工程に引き続き、得られた基板1に電
子部品を搭載し、はんだ接続する実装工程について説明
する。 同図(i)は1面実装部品6としてLSIチップを搭載
し、その接続端子6aをスルーホールが導電材料により
埋め込まれてその上に形成されたランド7にはんだリフ
ローにより接続する工程、同図(j)は、さらにリード
部品5を搭載し、リード5aをスルーホール内に挿入し
て同じくはんだ接続する工程を、それぞれ示したもので
ある。 なお、使用したはんだは、リード部品5のものよりも面
実装部品6のものを高融点とし、リード部品5の接続時
に面実装部品6の接続が損なわれないようにした。この
ようにして面実装部品6とリード部品5とが混載され高
密度実装に好適なプリント基板を製造することができた
。 実施例2゜ 第3図は、第2図のサブトラクティブ工法の代わりに周
知のアディティブ工法によるプリント基板の製法に従っ
て製造する例を示したものである。 同図(a)は、絶縁基材2上に後のめっき工程で形成さ
れるめっき膜が強固に接着するように下地処理として施
された接着剤塗布基板を準備する工程。 同図(b)は、ドリルで貫通孔3を設けるスルーホール
形成工程(第2図と同じ)。 同図(c)は、スルーホール内を含む基板全面にパラジ
ウム等のめっき触媒を付与した後に、無電解銅めっきを
施すことにより第1層目の銅めっき膜10aを形成する
工程(第2図と同じ)、同図(d)は、特定のスルーホ
ール3内に導電材料(銀ペーストや銅ペースト等)9を
印刷により埋め込む工程(第2図と同じ)、 同図(e)は、2度目のめっき工程であるが、この場合
には電解めっきにより配線導体として必要とされる十分
な厚さの銅めっき膜10bを形成する工程、以下、同図
(f)〜同図(j)までの工程は、第2図と同一なので
省略する。このようにして、前記実施例1の場合と同様
に高密度実装に好適なプリント基板を製造することがで
きた。 実施例3゜ 第4図は、実施例2の第3図と類似の製法であるが、第
3図(c)の、スルーホール内を含む基板全面にパラジ
ウム等のめっき触媒を付与した後に、無電解銅めっきを
施すことにより第1層目の銅めっき膜10aを形成する
工程(第2図と同じ)と、同図(d)の、特定のスルー
ホール3内に導電材料(銀ペーストや銅ペースト等)9
を印刷により埋め込む工程(第2図と同じ)との順序を
入れ替え逆の順序として製造した場合の要部断面図を示
したものである。この場合は、図面を省略したが導電材
料9を埋め込んだ後にスルーホール内を含む基板全面に
めっき膜10aが形成される。そして、このめっき膜1
0aにランド7を含む配線パターン1aを形成したもの
である。 第5図は、この第4図の構成を有する基板に、前記実施
例1の第2図(i)及び第2図(j)と同様の工程で面
実装部品6とリード部品5とを混載、実装したものであ
る。前記いずれの実施例とも同様に高密度実装に好適な
プリント基板を製造することができた。 【発明の効果) 以上詳述したように本発明によれば、面実装部品とリー
ド部品とを高密度に混載、実装することができるように
なった。すなわち、プリント基板の製造方法においては
、高密度実装のためにスルーホールを沢山設けても、面
実装に必要な接続領域のスルーホールについては、容易
に導体で埋込み電極接続ランドとすることができるよう
になった。また、実装においては、特に面実装部品の搭
載において、スルーホールが埋め込まれて形成されたラ
ンドが、めっき膜で構成されているため部品のはんだ接
続性が良く、信頼性の高い実装を実現することができる
ようになった。
[Operation 1] The specific embedding of a conductive material into a through-hole according to the present invention can be performed by immediately embedding the conductive material after the through-hole is provided in the substrate and before plating, or by embedding the conductive material over the entire surface of the substrate (through-hole There are two methods: forming a copper plating film, for example, over the inner wall (including the inner wall) by electroless plating and then embedding it. Of course, after embedding this conductive material, a plating film must be formed on the entire surface of the board, including the inner walls of the through-holes, by electroless plating. Lands of the plating film (on the surface, serve as connection electrodes for the chip) are formed at the sites of the through holes filled with the adhesive material. Therefore, this land is formed using the same wiring pattern forming process and the same copper plating film as the land formed in the area where no through hole is provided, so that the connectivity of the components is good. In other words, in surface mounting, parts are connected using plating film lands. Since the conductive material embedded in the through-hole has a structure sealed by the plated film land, there is no possibility that it will flow out during solder connection or sink into the through-hole and cause a connection failure. Furthermore, the formation of a plating film for land formation and the subsequent formation of a land pattern by selective etching involves plating both sides of the substrate, including the inner walls of the through holes, and forming a series of wiring patterns necessary for this plating film. Since this is done during the process, there is no need to set up a special process. [Example] An example of the present invention will be described below with reference to process diagrams shown in the drawings. Example 1 Figure 1 shows a method similar to the conventional manufacturing method of printed circuit boards.
After forming the first layer of copper plating film 10a in the through hole 3, a conductive material 9 is buried in the predetermined through hole 3,
7 is a sectional view of the main part of the substrate, showing a configuration in which a second layer of plated copper film 10b is then formed, and then wiring patterns 1a including lands 7 are formed on both surfaces of the substrate 1 by selective etching treatment. FIG. The process will be explained in more detail below with reference to the process diagram shown in FIG. FIG. 2 shows the manufacturing process of a printed circuit board using the well-known subtractive construction method. FIG. 2(a) shows the process of preparing a board in which an insulating base material 2 is coated with copper on both sides. Figure (b) shows the through-hole forming process in which through-holes 3 are drilled, and Figure (c) shows the process of applying electroless copper plating after applying a plating catalyst such as palladium to the entire surface of the board, including the inside of the through-hole. (d) shows a step of embedding a conductive material (silver paste, copper paste, etc.) 9 in a specific through hole 3 by printing, (e) ) is a step of forming a second layer of copper plating film 10b by applying a second electroless copper plating, and (f) of the same figure shows a step of forming a resist pattern 12 for forming a wiring pattern 1a including lands 7. Step of Forming: FIG. 3(g) shows the step of selectively etching the copper layer using the resist pattern 12 as a mask to form the wiring pattern 1a including the land 7. As described above, the basic printed circuit board manufacturing process is completed through the steps up to this point, but it is preferably continued to the next step. The figure (h) shows that after removing the resist pattern 12, the land 7 (including the through hole 3) necessary for connection is removed.
The process of manufacturing the printed circuit board according to this embodiment is now complete, showing the process of coating the surface of the board with a well-known solder resist 13. Next, following this manufacturing process, a mounting process in which electronic components are mounted on the obtained board 1 and connected by soldering will be described. Figure (i) shows a process in which an LSI chip is mounted as a single-sided mounting component 6, and its connection terminal 6a is connected to a land 7 formed on the through hole filled with a conductive material by solder reflow. (j) shows the process of further mounting the lead component 5, inserting the lead 5a into the through hole, and similarly connecting it with solder. The solder used for the surface mount component 6 had a higher melting point than that of the solder for the lead component 5, so that the connection of the surface mount component 6 would not be damaged when the lead component 5 was connected. In this way, it was possible to manufacture a printed circuit board suitable for high-density mounting in which the surface-mounted component 6 and the lead component 5 were mounted together. Embodiment 2 FIG. 3 shows an example in which a printed circuit board is manufactured by a well-known additive method instead of the subtractive method shown in FIG. 2. FIG. 5A shows a step of preparing an adhesive-coated substrate that has been treated as a base treatment so that a plating film to be formed in a later plating step will firmly adhere to the insulating base material 2. Figure (b) shows a through-hole forming process (same as Figure 2) in which a through-hole 3 is formed using a drill. FIG. 2(c) shows a process of forming the first layer of copper plating film 10a by applying electroless copper plating after applying a plating catalyst such as palladium to the entire surface of the substrate including the inside of the through holes (see FIG. 2). (same as Figure 2), Figure (d) shows the process of embedding a conductive material (silver paste, copper paste, etc.) 9 in a specific through hole 3 by printing (same as Figure 2), Figure (e) shows 2. This is the second plating process, in this case the process of forming a copper plating film 10b with a sufficient thickness required as a wiring conductor by electrolytic plating, from (f) to (j) in the same figure. The steps shown in FIG. 2 are the same as those shown in FIG. 2, so they will be omitted. In this way, a printed circuit board suitable for high-density packaging could be manufactured, as in the case of Example 1. Example 3 - Figure 4 shows a manufacturing method similar to that in Figure 3 of Example 2, but after applying a plating catalyst such as palladium to the entire surface of the substrate including the inside of the through-hole in Figure 3(c), The step of forming the first layer of copper plating film 10a by applying electroless copper plating (same as in FIG. 2) and the step of forming a conductive material (silver paste or copper paste, etc.) 9
2 is a cross-sectional view of a main part when the process of embedding by printing (same as in FIG. 2) is reversed and manufactured in the reverse order. In this case, although not shown in the drawings, after embedding the conductive material 9, a plating film 10a is formed over the entire surface of the substrate including the inside of the through hole. And this plating film 1
A wiring pattern 1a including a land 7 is formed on 0a. FIG. 5 shows that a surface mount component 6 and a lead component 5 are mixedly mounted on a board having the configuration shown in FIG. 4 in the same process as in FIGS. 2(i) and 2(j) of the first embodiment. , has been implemented. Similarly to any of the above examples, a printed circuit board suitable for high-density packaging could be manufactured. [Effects of the Invention] As described in detail above, according to the present invention, surface mount components and lead components can be mixed and mounted at high density. In other words, in the printed circuit board manufacturing method, even if many through-holes are provided for high-density mounting, the through-holes in the connection area necessary for surface mounting can easily be made into buried electrode connection lands with conductors. It became so. Additionally, in mounting, especially when mounting surface-mounted components, the land formed by filling the through-hole is made of a plating film, which allows for good solder connection of the components and achieves highly reliable mounting. Now I can do it.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例となるプリント基板の断面図
、第2図は同じく一工程図を示す断面斜視図、第3図は
同じく他の工程図を示した断面斜視図、第4図は同じく
他の実施例を示すプリント基板の断面図、第5図は同じ
く他の実施例を示す実装断面図、そして第6図は従来の
プリント基板の部品実装断面図である。 く符号の説明〉 1・・・基板、 1a・・・配線パターン、 2・・・絶縁基材、 3・・・スルーホール、 4・・・はんだ、 5・・・リード部品、 6・・・面付は部品(チップ部品)、 7・・・はんだ付はランド、 8・・・ペーストはんだ、 9・・・導電性材料、 1o・・・めっき銅、 11・・・接続穴、 12・・・レジストパターン、 13・・・ソルダーレジスト。
FIG. 1 is a cross-sectional view of a printed circuit board according to an embodiment of the present invention, FIG. 2 is a cross-sectional perspective view showing one process diagram, FIG. 3 is a cross-sectional perspective view similarly showing another process diagram, and FIG. FIG. 5 is a cross-sectional view of a printed circuit board similarly showing another embodiment, FIG. 5 is a mounting cross-sectional view showing another embodiment, and FIG. 6 is a cross-sectional view of a conventional printed circuit board with components mounted thereon. Explanation of symbols> 1... Board, 1a... Wiring pattern, 2... Insulating base material, 3... Through hole, 4... Solder, 5... Lead parts, 6... Surface mounting is a component (chip component), 7... Soldering is a land, 8... Paste solder, 9... Conductive material, 1o... Plated copper, 11... Connection hole, 12... -Resist pattern, 13...Solder resist.

Claims (7)

【特許請求の範囲】[Claims] 1.絶縁基材の両面に導体箔を張りあわせた基板を準備
する工程と、この基板に所定口径の貫通孔からなるスル
ーホールを設ける工程と、少なくとも前記スルーホール
内にめっき触媒を付与する工程と、前記スルーホール中
の予め予定された特定スルーホール内に導電材料を充填
する工程と、残されたスルーホール内を含み基板全面に
無電解めっきを施す工程と、前記スルーホール開口部及
び導電材料の充填されたスルーホール跡にそれぞれラン
ドを、そしてランドに接続された配線パターンを形成す
るためのレジストパターンを形成する工程と、前記レジ
ストパターンをマスクとして前記導体箔を選択的にエッ
チングする工程と、前記レジストマスクを除去する工程
とを有して成るプリント基板の製造方法。
1. A step of preparing a substrate in which conductive foil is pasted on both sides of an insulating base material, a step of providing a through hole consisting of a through hole of a predetermined diameter in this substrate, a step of applying a plating catalyst in at least the through hole, A step of filling a conductive material into a predetermined specific through hole among the through holes, a step of applying electroless plating to the entire surface of the board including the inside of the remaining through hole, and a step of filling the through hole opening and the conductive material. a step of forming a resist pattern for forming lands in each of the filled through-hole traces and a wiring pattern connected to the lands; and a step of selectively etching the conductor foil using the resist pattern as a mask. A method for manufacturing a printed circuit board, comprising the step of removing the resist mask.
2.絶縁基材の両面に導体箔を張りあわせた基板を準備
する工程と、この基板に所定口径の貫通孔からなるスル
ーホールを設ける工程と、少なくとも前記スルーホール
内にめっき触媒を付与する工程と、スルーホール内を含
み基板全面に無電解めっき処理を施し、第1のめっき膜
を形成する工程と、前記スルーホール中の予め予定され
た特定スルーホール内に導電材料を充填する工程と、残
されたスルーホール内を含み基板全面にめっき処理を施
し、第2のめっき膜を形成する工程と、前記スルーホー
ル開口部及び導電材料の充填されたスルーホール跡にそ
れぞれランドを、そしてランドに接続された配線パター
ンを形成するためのレジストパターンを形成する工程と
、前記レジストパターンをマスクとして前記めっき膜が
積層された導体箔を選択的にエッチングして、配線パタ
ーンを形成する工程と、前記レジストマスクを除去する
工程とを有して成るプリント基板の製造方法。
2. A step of preparing a substrate in which conductive foil is pasted on both sides of an insulating base material, a step of providing a through hole consisting of a through hole of a predetermined diameter in this substrate, a step of applying a plating catalyst in at least the through hole, A step of performing electroless plating on the entire surface of the substrate including the inside of the through hole to form a first plating film, a step of filling a predetermined specific through hole among the through holes with a conductive material, and a step of filling the remaining through hole with a conductive material. plating the entire surface of the substrate, including the inside of the through-hole, to form a second plating film, and forming a land at the opening of the through-hole and the trace of the through-hole filled with a conductive material, and connecting the land to the land. a step of forming a resist pattern for forming a wiring pattern; a step of selectively etching the conductive foil on which the plating film is laminated using the resist pattern as a mask to form a wiring pattern; and a step of forming a wiring pattern using the resist pattern as a mask. A method of manufacturing a printed circuit board, comprising the step of removing.
3.上記絶縁基材の両面に導体箔を張りあわせる代わり
に絶縁基材の表面に後の工程で形成されるめっき膜と基
材との接着性を良くするための接着剤塗布処理を施した
基板を準備する工程として成る請求項1もしくは2記載
のプリント基板の製造方法。
3. Instead of pasting conductive foil on both sides of the insulating base material, a substrate is coated with an adhesive to improve the adhesion between the base material and the plating film that will be formed in a later process on the surface of the insulating base material. 3. The method of manufacturing a printed circuit board according to claim 1, further comprising a step of preparing.
4.上記第2のめっき膜を形成する工程のめっき処理を
、電解めっき、もしくは無電解めっき処理として成る請
求項2もしくは3記載のプリント基板の製造方法。
4. 4. The method of manufacturing a printed circuit board according to claim 2, wherein the plating treatment in the step of forming the second plating film is electrolytic plating or electroless plating.
5.上記レジストマスクを除去する工程の後に、ランド
上及びスルーホール内を除き基板全面にソルダーレジス
トを形成する工程を付加して成る請求項1乃至4何れか
記載のプリント基板の製造方法。
5. 5. The method of manufacturing a printed circuit board according to claim 1, further comprising the step of forming a solder resist on the entire surface of the substrate except on the lands and in the through holes after the step of removing the resist mask.
6.請求項1乃至5記載のプリント基板の製造方法に引
き続き、上記スルーホールにはリード部品のリードを、
導電材料の充填されたスルーホール跡のランド上には面
付け部品を搭載、配置し、それぞれはんだ接続する工程
を含むリード部品と面付け部品とが混載された電子部品
の実装方法。
6. Continuing to the method for manufacturing a printed circuit board according to claims 1 to 5, a lead of a lead component is inserted into the through hole.
A mounting method for electronic components in which lead components and surface-mounted components are mixed, which includes a process of mounting and arranging surface-mounted components on the lands of through-holes filled with conductive material and connecting them with solder.
7.上記部品のはんだ接続工程を、面付け部品の接続と
、リード部品の接続とをそれぞれ異なる融点のはんだで
2段階に分割してはんだ接続する工程として成る請求項
6記載の電子部品の実装方法。
7. 7. The electronic component mounting method according to claim 6, wherein the step of soldering the components is a step of soldering the surface-mounted components and the lead components in two stages using solders having different melting points.
JP2208197A 1990-08-08 1990-08-08 Printed circuit board manufacturing method and electronic component mounting method Expired - Fee Related JP2653905B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2208197A JP2653905B2 (en) 1990-08-08 1990-08-08 Printed circuit board manufacturing method and electronic component mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2208197A JP2653905B2 (en) 1990-08-08 1990-08-08 Printed circuit board manufacturing method and electronic component mounting method

Publications (2)

Publication Number Publication Date
JPH0492496A true JPH0492496A (en) 1992-03-25
JP2653905B2 JP2653905B2 (en) 1997-09-17

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* Cited by examiner, † Cited by third party
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JPH05243728A (en) * 1991-12-27 1993-09-21 Tokuyama Soda Co Ltd Circuit board manufacturing method
JPH07249842A (en) * 1994-03-08 1995-09-26 Yagi Antenna Co Ltd Low noise high frequency amplifier
US6376052B1 (en) 1997-10-14 2002-04-23 Ibiden Co., Ltd. Multilayer printed wiring board and its production process, resin composition for filling through-hole
KR100412155B1 (en) * 2000-05-15 2003-12-24 히다찌 에이아이시 가부시키가이샤 Electronic Component Device and Method of Manufacturing the Same
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JP2007287868A (en) * 2006-04-14 2007-11-01 Fujitsu Ltd Printed wiring board and printed wiring board manufacturing method
CN107889358A (en) * 2017-11-07 2018-04-06 竞华电子(深圳)有限公司 A kind of multi-layer PCB preparation method

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JPS6426876U (en) * 1987-08-07 1989-02-15
JPH01160082A (en) * 1987-12-16 1989-06-22 S M C:Kk Manufacture of through-hole wiring board
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05243728A (en) * 1991-12-27 1993-09-21 Tokuyama Soda Co Ltd Circuit board manufacturing method
JPH07249842A (en) * 1994-03-08 1995-09-26 Yagi Antenna Co Ltd Low noise high frequency amplifier
US6376052B1 (en) 1997-10-14 2002-04-23 Ibiden Co., Ltd. Multilayer printed wiring board and its production process, resin composition for filling through-hole
US6376049B1 (en) 1997-10-14 2002-04-23 Ibiden Co., Ltd. Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole
EP2015624A2 (en) 1997-10-14 2009-01-14 Ibiden Co., Ltd. Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole
USRE40947E1 (en) 1997-10-14 2009-10-27 Ibiden Co., Ltd. Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole
EP1197131A4 (en) * 1999-03-29 2006-07-19 Viasystems Inc A via connector and method of making same
KR100412155B1 (en) * 2000-05-15 2003-12-24 히다찌 에이아이시 가부시키가이샤 Electronic Component Device and Method of Manufacturing the Same
JP2007287868A (en) * 2006-04-14 2007-11-01 Fujitsu Ltd Printed wiring board and printed wiring board manufacturing method
CN107889358A (en) * 2017-11-07 2018-04-06 竞华电子(深圳)有限公司 A kind of multi-layer PCB preparation method

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