JPH0510033B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention can be used in a device for reading information from an information recording carrier (hereinafter simply referred to as a disk) on which information is recorded on concentric or spiral tracks. This invention relates to a motor control device.

Conventional Structures and Their Problems In recent years, devices for reproducing image information recorded on disks, digitized audio information, etc. have been frequently developed and announced. As a means of improving the recording density of these discs, a method of controlling a motor so that the linear velocity is constant (hereinafter abbreviated as CLV) is often used.

Information recorded on a disk is generally divided into units called frames, and each frame has a synchronization pattern. The purpose of inserting this synchronization pattern into frames is to arrange each frame with a predetermined repetition period. In other words, it is necessary to extract the information signal recorded on the disc, identify this synchronization pattern, and configure the motor rotation control system so that this synchronization pattern is synchronized with a reference clock having a predetermined repetition period. be.
However, if the frame repetition period is significantly different from the reference clock period, it becomes difficult to identify this synchronization pattern, so some method is used to bring the frame repetition period closer to the reference clock period. There is a need.

An example in which digital information is recorded on a disk will be described below.

Now, if the number of bits in one frame is M, the recording length per bit on the disk is d, and the rotational linear velocity of the disk is L, then the frame repetition period t _f is t _f = Md/L...( 1) is given by. Here, when the information reading position from the center of the disk is r, the rotation speed N of the motor is given by N=120πr/L (2). Therefore, from equations (1) and (2), the following relationship is obtained: t _f =Md/120πr·N (3). In other words, the period of the reference clock is
When t _ck is set, t _ck = Md / 120πr・No ......(4) It can be seen that the motor rotation speed should be brought close to the rotation speed N _p that satisfies the following.

Hereinafter, a conventional motor control device will be described with reference to the drawings. FIG. 1 is a block diagram schematically showing a conventional motor control device. 1 is a disk, 2 is a motor, 3 is a motor drive means, 4 is an information reading means, 5 is a signal processing means, 6 is a frequency detection means, 7 is a switching means, 8 is an error detection means, 9 is a main control means, 10 is an auxiliary control means, and 11 is a reference oscillation source.

The operation of the motor control device configured as described above will be described below.

After starting the motor 2, the information reading means 4 from the disc 1
The information signal read out by the signal processing means 5
The information signal is inputted to the signal generator, undergoes processing such as binarization and differentiation of inverted edges, identifies the synchronization pattern for each frame of the information signal, and outputs a frame synchronization signal S _F.

The error detection means 8 detects a frequency and phase error between the frame synchronization signal S _F and the reference clock output from the reference oscillation source 11, and this error signal is outputted to the main control means 9. The main control means 9 performs processing such as phase compensation, amplification, and ripple removal, and outputs the signal to the b terminal of the switching means 7.

At the same time, the information signal S _I is input to the frequency detection means 6, which counts the number of each information bit of the information signal S _I within a predetermined time, and sets the counted value of the maximum period to a preset value set in advance in the frequency detection means. It is determined how many counts there are errors, and this error amount is converted into a speed error signal of the disc 1 and output to the auxiliary control means 10. The auxiliary control means 10 amplifies the speed error signal, removes ripples, etc., and outputs it to the a terminal of the switching means 7.

Generally, the signal processing means 5 often establishes internal synchronization with the information signal S _I using a PLL or the like, and when the rotation speed N of the motor 2 deviates by a wide range from the predetermined rotation speed N _p , Said frame synchronization signal S _F
The scope of obtaining the information is limited. When the signal processing means 5 is in an asynchronous state with the information signal S _I , an apparent frame synchronization signal having no correlation with the rotation speed N of the motor 2 is output. This apparent frame synchronization signal does not reflect the rotation speed of motor 2, so
It is impossible to control the rotation speed of the motor 2 using this apparent frame synchronization signal. Furthermore, since this apparent frame synchronization signal lacks the regularity of the original frame synchronization signal, this asynchronous state can be easily detected. Therefore, when the signal processing means 5 is in such a state, the signal processing means 5 detects the state, and this detection signal connects the switching means 7 to the a terminal side, and the disc 1, the frequency detection means 6, By forming an auxiliary control loop consisting of the auxiliary control means 10, the switching means 7, the motor drive means 3, and the motor 2, and bringing the rotation speed of the motor 2 close to a predetermined rotation speed _Np , the signal processing means 5
is synchronized with the information signal S _I. Through this operation, the signal processing means 5 can output a frame synchronization signal S _F reflecting the rotation speed N of the motor 2, and the signal processing means 5 commands the switching means 7 to switch to the b terminal side.
Send S _C. After this operation, a main control loop consisting of the disk 1, information reading means 4, signal processing means 5, error detection means 8, main control means 9, switching means 7, motor drive means 3, and motor 2 is formed, Since phase synchronization can be achieved between the reference clock and the frame synchronization signal, the rotation of the motor 2 can be controlled more precisely.

However, in the above configuration,
Two control loops are required to control the motor 2 that is the controlled object, and the frequency detection means 6
The drawbacks were that the circuit size had to increase and the configuration became complicated. Furthermore, in the above-mentioned auxiliary control loop, there is inevitably an error between the normal rotational speed N _p and the actual rotational speed. This is because the above-mentioned rotational speed error of the motor is counted as coarsely as possible for economical reasons. Furthermore, in order to detect the maximum period of the information signal, it is necessary to count the number of bits of each information over at least one frame, and the rotation speed information output by the frequency detection means always has a period of one frame. This is accompanied by more dead time. Therefore, when switching from the auxiliary control loop to the main control loop, these frequency errors and phase errors due to dead time are applied to the main control loop. At this time, if a disturbance etc. is added to the main control loop, the signal processing means 5 again outputs the information signal.
The drawback was that it could get out of sync with the S _I.

OBJECT OF THE INVENTION An object of the present invention is to provide a motor control device that has a simple configuration and is stable against external disturbances.

Composition of the Invention A motor control device of the present invention includes a motor for rotating a disc, a motor drive means for driving the motor, a rotation control means for controlling the number of rotations of the disc, and a motor for rotating the disc. an information reading means for reading out an information signal from the information signal; an fv conversion circuit for frequency-voltage converting the information signal to obtain a sawtooth signal;
a detection circuit that detects the sawtooth signal with a function of substantially maintaining a peak; and a detection circuit that substantially attenuates the output of the detection circuit to detect the maximum value and the next largest local maximum value of the sawtooth signal within a predetermined time. a coefficient unit that obtains a reference potential having a potential between the two; a comparator that obtains a synchronization signal by shaping the sawtooth signal using the reference potential as a threshold; and a reference oscillator that outputs a reference clock pulse having a predetermined oscillation frequency. and an error detection means for detecting an error in frequency and phase between the reference clock pulse and the synchronization signal and supplying the detected error to the rotation control means.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 2 is a block diagram schematically showing an embodiment of the present invention. In FIG. 2, 1 is a disk, 2 is a motor, 3 is a motor driving means, 4 is an information reading means,
8 is an error detection means, 11 is a reference oscillation source, and 21 is an fv
22 is a detection circuit, 23 is a coefficient multiplier, 24 is a comparator, and 25 is rotation control means.

The operation of the motor control device of this embodiment configured as described above will be described below with reference to the signal waveform diagram shown in FIG. Here, disk 1,
motor 2, motor drive means 3, information reading means 4,
The reference oscillation source 11 is the same as the structure shown in FIG.
Furthermore, since the rotation control means 25 is the same as the main control means 9, it will not be described repeatedly.

Now, the information signal read from disk 1 has a synchronization pattern concentrated at one point in each frame, and this synchronization pattern has the maximum period in each frame to distinguish it from other information. shall be. Now, if the number of bits of a synchronization pattern is n, and the number of bits of each piece of information in an information signal is generally k, then the relationship kn...(5) holds true. Here, k and n are non-negative integers. From the relationship in equation (1), the period t _k of k-bit information is given by t _k =d/L·k (6). Now, assume that a capacitor (not shown) connected to the fv circuit is charged with a constant current I _p . Assuming that the capacitance of this capacitor is C, the local maximum value E _k of the charging voltage when k bits of information is input to the fv circuit 21 is E _k = I _p /C・t _k = I _p /C・d/ L・k is given by (7). Generally, the response frequency of a motor control system is at most a few times due to mechanical resonance of the motor itself.
It is often set at 10Hz, whereas the frame frequency is several KHz or more. Therefore, since changes in the motor rotation speed during one frame can be virtually ignored, it can be seen that in equation (2), the motor rotation speed N can be regarded as approximately constant, and the linear velocity L is approximately constant. Therefore, from equation (7), the maximum value E _k is proportional only to the number of bits of each piece of information in one frame.

From the above discussion, it can be seen that the information signal input to the fv circuit 21 is converted into a sawtooth signal 31 having a maximum value proportional to the number of bits of each information by frequency-voltage conversion. Furthermore, it can be seen from equation (5) that the maximum value of the sawtooth signal 31 in one frame is given by the local maximum value E _o of the charging voltage of the synchronization pattern.

By inputting this sawtooth signal 31 to a detection circuit 22 with a sufficiently small charging time constant and a sufficiently large discharging time constant, the sawtooth signal 31 substantially maintains the maximum value E _o as shown in FIG. A detected signal 32 is obtained. This detected signal 32 is smoothed and divided by a coefficient multiplier 23 to obtain a threshold signal 33. It is necessary to waveform-shape only this threshold signal 33 and the charging peak due to the synchronization pattern using the comparator 24 to generate the synchronization signal 34. In order to satisfy the above objective, this threshold signal 33 must always be between the charging peak due to the synchronization pattern and the charging peak due to all other information. The discharge time constant τ of the detection circuit 22 that satisfies _this condition is given by the (4th From the relationship of the formula, It is. Here, l _o represents the natural logarithm. Furthermore, the potential E _s of the threshold signal is calculated as E _s =I _p /C・d/L・an/2・(1+b・a・n /2m
−a・n) ...(9) is given. That is, from the relationship between equations (9) and (2), the threshold signal 33 is expressed as E _s =I _p・d・a・n/240πrC(1+b・an/2m−an
)・N...(10) and depends only on the motor rotation speed N. Similarly, the charging peak E _o of the synchronization pattern is the (7th)
From the formula, E _o = I _p d・n/120πrCN ...(11) is given. Therefore, the potential of the threshold signal 33
The ratio of E _s to the charging peak E _o of the synchronization pattern is
From equations (10) and (11), E _o /E _s = a/2 (1+b·an/2m−an) (12), and the threshold signal is always constant and does not depend on the rotation speed N. That is, no matter how the rotational speed of the motor 2 changes, the threshold value is always at a constant ratio, and only the charging peak according to the synchronization pattern can be waveform-shaped, and the synchronization signal 34 is one pulse per frame. . The period of this synchronization signal is the same as the period t _f of one frame, and is proportional to the rotation speed of the motor 2 from the relationship of equation (3). Therefore, by matching this synchronization signal 35 with the period _tck of the reference clock, the disk 1 can obtain a control signal that satisfies the above-mentioned CLV.

As described above, since the information signal is frequency-voltage converted to obtain a sawtooth signal and this sawtooth signal is used to obtain a threshold signal, the charging peak due to the synchronization pattern of the original sawtooth signal is The threshold signal makes it possible to shape the waveform while always maintaining the relative relationship. Therefore, according to this embodiment, it is possible to always obtain a synchronization signal having a period proportional to the rotation speed of the motor 2.
It has been realized that the rotation control system can be configured with a single control loop.

Next, other embodiments of the present invention will be described with reference to the drawings.

FIG. 4 is a block diagram showing the general outline of a motor control device in another embodiment of the present invention. In Figure 4, 1 is a disk, 2 is a motor, 3
1 is a motor driving means, 4 is an information reading means, 11 is a reference oscillation source, 21 is an fv circuit, 22 is a detection circuit, 23
is a coefficient unit, 24 is a comparator, 25 is rotation control means,
41 is a defect detection means, and 42 is an fv circuit output control means.

The operation of the motor control device of this embodiment configured as described above will be explained below. Here, the disk 1, motor 2, motor driving means 3, information reading means 4, reference oscillation source 11, fv circuit 21, detection circuit 22, coefficient unit 23, comparator 24, and rotation control means 25 are as shown in FIG. This is the same as that explained in the embodiment, and repeated explanation will be omitted. During normal information reading, the synchronization signal can be extracted without any problems in the embodiment of FIG. However, assuming that the information signal cannot be read out temporarily due to damage to the disk 1, the disturbance in the information signal due to such a defect usually lasts several hundred microseconds. Therefore, by frequency-voltage converting the information signal with defects mixed in, an excessive peak value will be generated in the output sawtooth signal in the fv circuit 21. When such an excessive peak value is applied to the detection circuit 22,
The output of the detection circuit 22 may be greatly disturbed. Therefore, it is necessary to take some kind of countermeasure to the fv circuit 21 only when a defect occurs.

That is, the information signal read by the information reading means 4 is input to the defect detection means 41, and defects in this information signal are detected. As a detection method, for example, frequency discrimination of the information signal or detection of abnormal amplitude is used. In response to the output of the defect detection means 41, the fv circuit output control means 42 controls the fv circuit 21.
hold the output at a constant value. The method is
For example, add a pulse with a sufficiently shorter period than the information signal to the information signal during the defect period, or
A method such as setting a capacitor (not shown) connected to the fv circuit 21 in a discharge state may be used. This operation prevents disturbances in the information signal during the defect period from being reflected in the sawtooth signal output from the fv circuit 21.

As described above, according to this embodiment, by providing the fv circuit output control means 42 that maintains the output of the fv circuit 21 at a constant value when an abnormality occurs in the information signal, the information signal is removed from the defective disk. Stable synchronization signal extraction is achieved even when reading data.

Next, still another embodiment of the present invention will be described with reference to the drawings.

FIG. 5 shows a block diagram of a motor control device in still another embodiment of the present invention.
1 is a disk, 2 is a motor, 3 is a motor drive means, 4
5 is an information reading means, 5 is a signal processing means, 8 is an error detection means, 11 is a reference oscillation source, 21 is an fv circuit, 22
is a detection circuit, 23 is a coefficient unit, 24 is a comparator, 25
41 is a rotation control means, 41 is a defect detection means, and 51 is a switching means.

The operation of the motor control device of this embodiment configured as described above will be described below.
Here, a disk 1, a motor 2, a motor drive means 3,
information reading means 4, reference oscillation source 11, fv circuit 21,
The detection circuit 22, the coefficient unit 23, the comparator 24, and the rotation control means 25 are the same as those explained in the embodiment shown in FIG. It is the same as the processing means 5, and will not be described repeatedly.

In this embodiment, similarly to the embodiment shown in FIG.
This is aimed at countermeasures against defects in information signals. That is, only when the output of the detection circuit 22 is disturbed due to a defect, the motor is controlled by switching from the synchronization signal output from the comparator 24 to the frame synchronization signal output from the signal processing means 5.

It is assumed that a defect occurs in the information signal when the signal processing means 5 is in synchronization with the information signal. At this time, the switching means 51 is switched according to the defect detection signal outputted by the defect detection means 41, and the frame synchronization signal outputted from the signal processing means is switched to the error detection means 8.
to be applied. This is because the response of the signal processing means 5 is sufficiently higher than the response of the detection circuit 22, so the signal processing means 5 returns to normal operation more quickly after the defect ends.

As described above, according to this embodiment, by using a frame synchronization signal that recovers quickly when an abnormality occurs, it is possible to prevent information signal disturbances caused by defects from being applied as an error amount to the rotation control system. are doing.

In the above embodiment, the detection circuit 22 and the coefficient multiplier 23 were explained separately for convenience, but the detection circuit 22
may also have a coefficient function. Further, the comparator 24 only needs to have a so-called comparison function, and for example, a differential amplifier or the like can be used instead.

Furthermore, although the above embodiment does not apply an operation to hold the error signal, by using this function for the output of the error detection means 8, the stability of the motor control system against defects can be improved. Needless to say.

Effects of the Invention As is clear from the above description, the present invention detects a sawtooth signal obtained by frequency-voltage conversion of an information signal, creates a threshold, and shapes the waveform of the sawtooth signal using this threshold to generate a synchronization signal. Since the configuration is adopted, an excellent effect can be obtained in that the synchronization signal can be extracted regardless of the frame period of the information signal. As a result, the motor can be controlled with a single control loop, resulting in an inexpensive configuration.

Furthermore, by adding an FV circuit output control circuit that detects defects and keeps the output of the FV circuit at a constant value during defects, it is possible to extract stable synchronization signals even when there are defects in the information signal. can get. Moreover, by adopting a configuration in which two synchronization signals are switched based on defect detection, it is possible to obtain an effect that disturbances in the synchronization signals due to defects do not cause disturbances in rotation as a manipulated variable of the motor.

[Brief explanation of drawings]

Figure 1 is a block diagram showing an outline of a conventional example, Figure 2 is a block diagram showing an outline of a conventional example;
The figure is a block diagram showing an outline of an embodiment of the present invention.
FIG. 3 is a signal waveform diagram in an embodiment of the present invention,
FIG. 4 is a block diagram schematically showing another embodiment of the invention, and FIG. 5 is a block diagram schematically showing still another embodiment of the invention. DESCRIPTION OF SYMBOLS 1... Disc, 2... Motor, 3... Motor drive means, 4... Information reading means, 5... Signal processing means, 8... Error detection means, 11... Reference oscillation source,
21... fv circuit, 22... detection circuit, 23... coefficient unit, 24... comparator, 25... rotation control means,
41...Defect detection means, 42...FV circuit output control means, 51...Switching means.

Claims (1)

[Scope of Claims] 1. A motor for rotating a disc, a motor driving means for driving the motor, a rotation control means for controlling the rotation speed of the disc, and reading an information signal from the disc. information reading means, a conversion circuit for converting the information signal to obtain a sawtooth signal, a detection circuit for detecting the sawtooth signal with substantially a peak-holding function; a coefficient unit that attenuates and obtains a reference value between the maximum value of the sawtooth signal within a predetermined time and the next largest local maximum value, and a synchronous signal that shapes the waveform of the sawtooth signal using the reference value as a threshold. a reference oscillation source that outputs a reference clock pulse having a predetermined oscillation frequency; and an error detection means for detecting a frequency and phase error between the reference clock pulse and the synchronization signal and supplying the detected error to the rotation control means. A motor control device characterized by: 2. A defect detecting means for detecting a defect in the disk based on the information signal outputted by the information reading means, and a converting circuit output control means for maintaining the output of the converting circuit at a predetermined value or less during the defect period, and controlling the converting circuit output as described above. 2. A motor control device according to claim 1, wherein said means is controlled by the output of said defect detection means. 3. Defect detection means for detecting a defect in the disk using the information signal output by the information reading means, signal processing means for identifying a synchronization pattern from this information signal and extracting a frame synchronization signal, and comparing this frame synchronization signal. A patent claim characterized in that the switching means is provided with a switching means that selects one of the synchronization signals outputted by the device and supplies it to the error detection signal, and the switching means is controlled by the output of the defect detection means. A control device for a motor according to item 1.