JPH051153Y2 - - Google Patents

Description

[Detailed explanation of the invention] "Industrial application field" This invention is applicable to, for example, programmable logic,
The present invention relates to a drive circuit that provides a write signal to a device (hereinafter referred to as PLD).

``Prior Art'' A programmable logic device is an element that can be programmed to a desired logic state by applying a write signal from the outside to change the internal connection state. A drive circuit that provides this write signal is required to have a special function compared to a drive circuit that drives a normal semiconductor integrated circuit.

In other words, the applied voltage is a high voltage of several tens of volts,
The applied current is a high current of about several 100 mA. Both voltage application mode and current application mode are used under precise timing control, so high speed is required.

Furthermore, depending on the type of element, there are elements that perform writing in voltage application mode and elements that perform writing in current application mode.

In other words, in the case of an element that has resistance characteristics when viewed inside from the terminal, and that changes the connection state of the internal circuit by applying a pulse with a constant voltage peak value to the terminal with this resistance characteristic, the internal circuit A function is required to limit the load current to a certain range to prevent excessive current from flowing into the device and damaging the device.

On the other hand, the characteristics when looking inside from the terminal have non-linear characteristics (characteristics of a diode), and if a pulse-like current signal with a constant current peak value is applied to the terminal with this non-linear characteristic, the pulse current In the case of an element that causes a change in the internal circuit, the negative pressure voltage must be limited to a certain range to prevent the terminal voltage from reaching an excessive voltage while applying a drive pulse current and damaging the element. functionality is required.

FIG. 3 shows a conventional drive circuit operating in voltage application mode. When a positive pulse with voltage V ₁ is applied to input terminal 1, transistor Q ₂ is turned on, outputs voltage V ₀ to output terminal 2, and applies a pulse with voltage V ₀ to load 3.

If an excessive current attempts to flow due to a change in the internal circuit of load 3 while a pulse is being applied, the excessive current is detected by resistor 4, and transistor Q ₁
control on. When transistor Q ₁ is turned on, transistor Q ₂ is controlled off and load 3
Controls the application of voltage V ₀ to .

If the load 3 is a negative pulse drive circuit, a negative pulse is applied to the input terminal 1, the transistor _Q4 is turned on, and a negative voltage is applied to the terminal of the load 3. In this case too, if excessive current flows through the load during the application of the pulse, transistor _Q3 turns on,
As a result, the transistor _Q4 is controlled to be turned off to cut off the current, thereby preventing damage to the load 3.

FIG. 4 shows a drive circuit operating in current application mode. In this circuit, when the input terminal 1 is at the center voltage between the power supply voltages +V and -V, all of the diodes D ₁ to _{D 4} are turned on, and all of the current I _A flowing through the current source 6 flows to the current source 7 through the diode bridge.
Therefore, in this state, no current flows into or out of the load 3.

When a positive pulse with voltage V is applied to input terminal 1, diodes D ₂ and D ₃ are turned on while this pulse is applied, and current I _A flows into load 3 through output terminal 2. The internal circuit of the load 3 is driven by this inflow of current.

When the voltage at the load terminal increases abnormally and exceeds the pulse voltage V〓 applied to input terminal 1 while the load 3 circuit is being driven, diode D ₂
is turned off, and the diode _D1 is turned on instead, so that the voltage at the output terminal 2 is maintained at V〓.

When a negative pulse is applied to input terminal 1, diodes D ₁ and D ₄ turn on, and in this case, the current I _A flowing through current source 6 flows to input terminal 1 through diode D ₁ and is connected to the signal source (especially (not shown). At the same time, the current I _B flowing through the current source 7 flows through the load 3 through the diode D ₄ and drives the load 3 with a negative current.

In this state, if the voltage at the terminals of load 3 deviates in a negative direction from the voltage at input terminal 1, in this case diode _D4 turns off, diode _D2 turns on, and the voltage at output terminal 2 is transferred to the input terminal. The voltage applied to 1 is maintained.

``Problem that the invention aims to solve'' Conventionally, the drive circuit that writes in voltage application mode and the drive circuit that writes in current application mode are separate, so for example, the internal state of the PLD can be changed to a desired state. In a device that performs writing, it is necessary to prepare both a drive circuit that operates in a voltage application mode and a drive circuit that operates in a current application mode.

This has the disadvantage of making the device large, and since there are two types of drive circuits, a load that should be driven in voltage application mode may end up being driven by a drive circuit that operates in current application mode, or a load that should be driven in voltage application mode may be driven by a drive circuit that operates in current application mode. There is also the drawback that a load may be driven by a drive circuit that operates in voltage application mode, or may be used incorrectly.

If the load to be driven in voltage application mode is
If the drive circuit operates in the current application mode shown in the figure, even if the state of the load 3 changes during driving and an excessive current flows into the load 3, this cannot be detected and the load is There is a risk of damage.

Furthermore, if a load to be driven in the current application mode is driven by a drive circuit operating in the voltage application mode shown in FIG. 3, the state of the load 3 changes during driving.
Even if an excessive voltage occurs at the terminals of the load 3, this cannot be detected.

One object of this invention is to provide a drive circuit that operates in both voltage application mode and current application mode, and is therefore capable of limiting both excessive current and excessive voltage.

``Means for solving the problem'' In this invention, when the output current is less than the specified current, it outputs a constant voltage and constant current and operates as a constant voltage and constant current source, so that the output current does not reach the planned current value. The output terminal of the power supply circuit is connected between the output terminal of this power supply circuit and the load, and the output terminal of this power supply circuit is connected between the output terminal of the power supply circuit and the load, and the output terminal of the power supply is loaded with the input signal. Drive switch element (drive transistor) connected to the terminal of
and an active terminal (transistor) that turns on when the terminal voltage of the load rises or falls from a set value to suppress a rise in the terminal voltage of the load.

According to the circuit structure of this invention, when a drive switch element (drive transistor) is turned on by an input signal, a constant voltage is applied from the power supply circuit to the terminals of the load.

If the load has a circuit structure to be driven in voltage application mode, a constant voltage is applied from the power supply circuit of the load. If an abnormality occurs inside the load while this voltage is being applied and a current larger than the specified current begins to flow, the power supply circuit detects the increase in current and lowers the output voltage to suppress the increase in current.

On the other hand, if the load has a circuit structure to be driven in current application mode, the power supply circuit supplies a constant current to the load. If the load voltage abnormally rises or falls while this current is being supplied, the active element (transistor) turns on and clamps the load terminal voltage to a predetermined voltage, causing the load terminal voltage to rise or fall beyond that level. Works to prevent it from falling.

As described above, according to this invention, both the voltage limiting operation and the current limiting operation can be performed in both the voltage application mode and the current application mode.

Therefore, writing can be performed safely in any type of PLD, whether it is a PLD that writes in voltage application mode or a PLD that writes in current application mode.

``Example'' Figure 1 shows an example of this invention. In the figure, 1 indicates an input terminal to which a write pulse is input, 2 indicates an output terminal, and 3 indicates a load.

In this device, when the output current is below the specified current value, it outputs a constant voltage and operates as a constant voltage source, and when the output current reaches the specified current value, the internal resistance increases rapidly and the output voltage is suddenly increased. The positive side power supply circuit 11A and the negative side power supply circuit 11B, which have the function of lowering the voltage, turn on and off depending on the input signal, and the voltage output from the positive side power supply circuit 11A and the negative side power supply circuit 11B is connected to the terminal of the load 3. The first drive transistor 12A and the second drive transistor 1
2B, this first drive transistor 12A, and the second
The drive transistor 12B is turned on and off according to the input signal, and the first drive transistor 12A,
When the second drive transistor 12B is in the off state, a constant reverse bias voltage −E _K is applied to its control electrode.
and +E _K , and when the voltage at the output terminal 2 exceeds this reverse bias voltage, either the first drive transistor 12A or the second drive transistor 12B is turned on, and the voltage at the output terminal 2 is set to a predetermined value. The third transistor 13 is clamped to the voltage of
A and a fourth transistor 13B constitute a drive circuit.

The positive side power supply circuit 11A and the negative side power supply circuit 11B each include two transistors 14 and 15, and a constant current circuit 16 that allows a constant current to flow through one transistor 15 and defines the value of the constant current that flows through the other transistor 14. and emitter resistors 17 and 18. Positive side power supply circuit 1
For 1A, transistors 14 and 15 are PNP type transistors, and their emitters are connected to the positive power supply terminal through emitter resistors 17 and 18, respectively.

In the negative side power supply circuit 11B, transistors 14 and 15 are NPN type transistors, and their emitters are connected to the negative power supply terminal through emitter resistors 17 and 18. The other structure is the same as that of the positive power supply circuit 11A.

A constant current always flows through the transistor 14 by a constant current circuit 16. This constant current causes a constant voltage drop across the emitter resistor 18 of the transistor 15, and the base potential of the transistor 15 is maintained at a constant value. As a result, the base potential of the other transistor 14 is maintained at a constant value.

When either the first drive transistor 12A or the second drive transistor 12B is turned on in this state, the positive side power supply circuit 11A or the negative side power supply circuit 11B is connected to the load 3 through the first drive transistor 12A or the second drive transistor 12B. connected, positive side power supply circuit 11A, negative side power supply circuit 11B
A voltage and current defined by is applied to the load 3. At this time, if the load 3 is an element to be driven in the voltage application mode, the output terminal 2 is maintained at a constant voltage.

In addition, if the load 3 is an element to be driven in current application mode, the positive side power supply circuit 11A and the negative side power supply circuit 11A
The current determined by B is passed through output terminal 2 to load 3.
given to.

The first drive transistor 12A and the second drive transistor 12B are turned on and off by the on and off operation of the third transistor 13A and the fourth transistor 13B.
The fifth transistor 19A and the sixth transistor 19B are provided.
The base of transistor 19B is connected to the input terminal 1 via a first constant voltage drop element 21A and a second constant voltage drop element 21B, and a positive side power supply circuit 23A and a negative side power supply circuit 23B are connected to the connection point between the first constant voltage drop element 21A and the base of the fifth transistor 19A and the second constant voltage drop element 21B and the base of the sixth transistor 19B via transistors 22A and 22B.

Fifth transistor 19A, sixth transistor 1
Diode 24 between the base and collector of 9B
Connect A and 24B. This diode 24A,
24B is selected as an element, such as a germanium diode, whose forward voltage is smaller than the voltage drop between the bases and emitters of the fifth transistor 19A and the sixth transistor 19B.

Bias voltages V 1 and _{V 2 that} are sufficiently higher than the peak value of the input pulse V ₁ applied to the input terminal 1 are applied to the bases of the transistors 22A and 22B.

When the positive pulse shown in FIG. 2A is input to the input terminal 1, the current of the fourth transistor 13B increases, the base current of the second drive transistor 12B decreases, and the impedance between the collector and emitter increases. let At the same time, the current of the third transistor 13A decreases, and the third transistor 13A decreases.
The impedance of A is controlled in the direction of increasing. In other words, the first drive transistor 12A is completely turned on.

When the first drive transistor 12A is completely turned on, the voltage VIO shown in FIG. 2B is applied to the load 3.

If the load 3 has a circuit structure that operates in the voltage application mode, an abnormality occurs inside the load 3 when the output voltage VIO is applied, and the current increases as shown in Figure 2C.
Suppose that the flow starts rapidly as shown in . At this time, if the output current I _O flowing to the load exceeds the limit value I _LL set in the positive side power supply circuit 11A, the output current I _O is limited to the limit value I _LL as shown in Figure 2C, and the current I _O Any further increase is prevented. The transistor 14 which together constitutes the positive side power supply circuit 11A
As the current flowing through the emitter resistor 17 increases, the voltage drop across the emitter resistor 17 becomes large, and this transistor 14 is cut off, exhibiting a high impedance, resulting in a large voltage drop in the positive power supply circuit 11A. Therefore, the output voltage VIO applied to the load 3 is limited to the voltage _VLL when the current _IO has reached the limit value _ILL , as shown in FIG. 2D.

Note that at this time, the diode 24A becomes conductive, and the current I _B1 is also applied to the load 3 from the power supply circuit 23A. Therefore, at this time, I _O = I _B1 + I _LL flows through the load 3.

On the other hand, if the load 3 has a circuit structure that should be driven in current application mode, the first drive transistor 12A
When fully turned on, the power supply circuit 11A is applied to load 3.
A current I _O equal to the limit value I _LL specified by flows and drives the inside of the load 3.

Suppose that an abnormality occurs inside load 3 while current I _O is flowing through load 3, and the voltage at the terminals of load 3 increases to the extent that it exceeds the specified value V _M as shown in Figure 2 F. At this time, the potential of the output terminal 2 increases in the positive direction. When the potential of output terminal 2 exceeds the bias voltage + _EM generated at connection point B, the second
The drive transistor 12B is turned on and the output terminal 2
The potential of is clamped to the potential of input terminal 1.

In other words, the emitter potential of the second drive transistor 12B is the voltage drop between the emitter and base of the second drive transistor 12B with respect to the potential at the connection point D.
It is approximately equal to the sum of the emitter-base voltage drops of the fifth transistor 19B. On the other hand, since two constant voltage drop elements 21A and 21B consisting of diodes are used between connection points C and D and input terminal 1, this first constant voltage drop The voltage drop of the element 21A and the second constant voltage drop element 21B is approximately equal to the voltage drop between the emitter and base of the second drive transistor 12B and the sixth transistor 19B. Therefore, for this reason, the voltage VIO at the output terminal 2 is clamped to the potential _V1 at the input terminal 1.

When the input pulse is a negative-positive pulse, the second drive transistor 12B is completely turned on, applies a negative voltage to the load 3, and draws current from the load 3 toward the negative power supply circuit 11B. .
If the load 3 abnormally increases at this time, its current is limited to the current value set in the negative power supply circuit 11B, and the current is prevented from increasing in the negative direction beyond the limit value. In addition, if load 3 is an element that operates in current application mode, the terminal voltage of load 3 will be abnormally biased in the negative direction, and the potential of output terminal 2 will now exceed the bias voltage of connection point A -E _K to the negative side. and the first drive transistor 12A turns on, and the load 3
limit the terminal voltage from being biased further in the negative direction.

``Effects of the invention'' As explained above, according to this invention, one circuit can drive any type of element, whether it is an element that writes in voltage application mode or an element that writes in current application mode, and it can also prevent abnormalities. can be protected.

Therefore, it is possible to drive for writing regardless of the type of PLD. Furthermore, even if an abnormality occurs, the voltage and current are limited, so writing and rewriting of the PLD can be performed safely.

In addition, this invention has a structure in which the third transistor 13A, the fourth transistor 13B, the first drive transistor 12A, and the second drive transistor 12B are not completely turned off in any state, so that abnormalities in the input signal and load 3 can be avoided. In contrast, the protection operation for the load 3 can be completely executed by responding at high speed.

[Brief explanation of the drawing]

Fig. 1 is a connection diagram showing an embodiment of this invention, Fig. 2 is a waveform diagram for explaining the operation of this invention,
FIGS. 3 and 4 are connection diagrams for explaining conventional drive circuits. 1...Input terminal, 2...Output terminal, 3...Load, 11A, 11B...Power supply circuit, 12A, 12
B...drive transistor, 13A, 13B...transistor.

Claims (1)

[Claims for Utility Model Registration] A positive power supply circuit that has a characteristic that internal resistance increases rapidly when a current exceeding a set value flows, and a positive side power supply circuit that has a characteristic that internal resistance rapidly increases when a current exceeding a set value flows. a negative power supply circuit; a first NPN drive transistor connected in a forward direction between the positive power supply circuit and the load; and a first NPN drive transistor connected in the forward direction between the negative power supply circuit and the load. a PNP-type second drive transistor; a PNP-type third transistor whose emitter is connected to the base of the first drive transistor, whose base is connected to the input terminal, and whose collector is connected to the negative power supply terminal; 2 is connected to the base of the drive transistor, the base is connected to the input terminal,
NPN type 4 with collector connected to positive power supply terminal
a transistor; a fifth NPN transistor having a collector connected to the positive power supply circuit and an emitter connected to the base of the first drive transistor; a fifth NPN transistor having a collector connected to the negative power supply circuit and an emitter connected to the second drive transistor; a PNP type sixth transistor connected to the base of the drive transistor; a first constant voltage drop element connected between the base of the fifth transistor and the input terminal; and a first constant voltage drop element connected between the base of the sixth transistor and the input terminal. a second constant voltage drop element connected between the terminal and the drive circuit.