JPH05118846A - Displacement gauge - Google Patents
Displacement gaugeInfo
- Publication number
- JPH05118846A JPH05118846A JP30849791A JP30849791A JPH05118846A JP H05118846 A JPH05118846 A JP H05118846A JP 30849791 A JP30849791 A JP 30849791A JP 30849791 A JP30849791 A JP 30849791A JP H05118846 A JPH05118846 A JP H05118846A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- output
- voltages
- detecting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006073 displacement reaction Methods 0.000 title claims abstract description 27
- 238000006243 chemical reaction Methods 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 5
- 101001080825 Homo sapiens PH and SEC7 domain-containing protein 1 Proteins 0.000 abstract description 4
- 102100027472 PH and SEC7 domain-containing protein 1 Human genes 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 8
- 238000001514 detection method Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 230000003287 optical effect Effects 0.000 description 3
- 101100136727 Caenorhabditis elegans psd-1 gene Proteins 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- QWXYZCJEXYQNEI-OSZHWHEXSA-N intermediate I Chemical compound COC(=O)[C@@]1(C=O)[C@H]2CC=[N+](C\C2=C\C)CCc2c1[nH]c1ccccc21 QWXYZCJEXYQNEI-OSZHWHEXSA-N 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Landscapes
- Length Measuring Devices By Optical Means (AREA)
- Measurement Of Optical Distance (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は変位計に関し、さらに
詳しく言えば、半導体位置検出素子（ＰＳＤ；Ｐｏｓｉ
ｔｉｏｎ Ｓｅｎｓｉｔｉｖｅ Ｄｅｔｅｃｔｏｒ）を
用いた三角測量方式の変位計に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a displacement meter, and more specifically, a semiconductor position detecting device (PSD; Posi).
The present invention relates to a triangulation type displacement meter using a motion sensitive detector.
【０００２】[0002]
【従来の技術】まず、図２の断面図に示されているよう
に、半導体位置検出素子（ＰＳＤ）１は、平板状シリコ
ンの表面にＰ層、裏面にＮ層そして中間にあるＩ層の３
層から構成されている。2. Description of the Related Art First, as shown in the cross-sectional view of FIG. 2, a semiconductor position detecting element (PSD) 1 comprises a flat silicon layer having a P layer on the front surface, an N layer on the back surface, and an intermediate I layer. Three
It is composed of layers.
【０００３】この場合、Ｐ層が受光面とされており、そ
の両端には出力端子Ｔ１，Ｔ２が設けられている。Ｐ層
に光スポットＳＰが入射されると、その入射位置には光
エネルギーに比例した電荷が発生し、同電荷は光電流と
してＰ層を通り、出力端子Ｔ１，Ｔ２より出力される。In this case, the P layer serves as a light receiving surface, and output terminals T1 and T2 are provided at both ends thereof. When the light spot SP is incident on the P layer, a charge proportional to the light energy is generated at the incident position, and the charge passes through the P layer as a photocurrent and is output from the output terminals T1 and T2.
【０００４】ここで、受光面（Ｐ層）の中心から出力端
子Ｔ１，Ｔ２に至る距離を距離をＬ、また、その中心か
ら光スポットＳＰの入射位置までの距離をＸａ、出力端
子Ｔ１，Ｔ２より出力される電流をＩ１，Ｉ２とする
と、 Ｘａ＝Ｌ・（Ｉ２−Ｉ１）／（Ｉ１＋Ｉ２） で表される。これを電流Ｉ１，Ｉ２に対応する電圧Ｖ
１，Ｖ２で表すと、 Ｘａ＝Ｌ・（Ｖ２−Ｖ１）／（Ｖ１＋Ｖ２）……式（１） となる。Here, the distance from the center of the light receiving surface (P layer) to the output terminals T1 and T2 is L, the distance from the center to the incident position of the light spot SP is Xa, and the output terminals T1 and T2. When the output currents are I1 and I2, Xa = L · (I2−I1) / (I1 + I2). This is the voltage V corresponding to the currents I1 and I2.
When expressed by 1 and V2, Xa = L · (V2-V1) / (V1 + V2) ...
【０００５】次に、図３を参照しながら、三角測量法に
ついて説明する。レーザー光源２から被測定面４に向け
て光をスポット状に照射し、同被測定面４で反射された
散乱光をレンズ３を介してＰＳＤ１上に結像させる。Next, the triangulation method will be described with reference to FIG. Light is emitted in a spot shape from the laser light source 2 toward the surface to be measured 4, and the scattered light reflected by the surface to be measured 4 is imaged on the PSD 1 via the lens 3.
【０００６】被測定面４が距離ｌずれたことにより、Ｐ
ＳＤ１上でその光スポットが距離Ｘａ分移動したとする
と、上記式（１）の原理により、被測定面４の移動距離
ｌを算出することができる。Since the measured surface 4 is displaced by the distance l, P
Assuming that the light spot moves on SD1 by the distance Xa, the moving distance 1 of the measured surface 4 can be calculated according to the principle of the equation (1).
【０００７】すなわち、Ｘａとｌの関係は、Ｘａ＝Ｋｌ
／（Ｋ′＋ｌ）……式（２） となる。なお、ＫおよびＫ′は光学系から決まる定数で
ある。That is, the relation between Xa and l is Xa = Kl
/ (K '+ 1) ... Equation (2). Note that K and K'are constants determined by the optical system.
【０００８】式（２）より、ｌ＝Ｋ′Ｘａ／（Ｋ−Ｘ
ａ）となり、これに上記式（１）を代入して整理する
と、 ｌ＝−（Ｖ１−Ｖ２）Ａ／｛（Ｖ１＋Ｖ２）＋（Ｖ１−Ｖ２）Ｂ｝…式（３） 同式（３）において、Ａ＝Ｋ′／Ｋ、Ｂ＝１／Ｋであ
る。From the equation (2), l = K'Xa / (K-X
a), and by substituting the above equation (1) for rearranging: l =-(V1-V2) A / {(V1 + V2) + (V1-V2) B} ... Equation (3) Equation (3) In, A = K '/ K and B = 1 / K.
【０００９】図４には、この三角測量法による変位計の
ブロツク線図が例示されている。すなわち、ＰＳＤ１か
ら出力される検出電流Ｉ１，Ｉ２は、電流電圧変換回路
５，６にてそれぞれ電圧Ｖ１，Ｖ２に変換される。FIG. 4 exemplifies a block diagram of the displacement meter based on the triangulation method. That is, the detection currents I1 and I2 output from the PSD1 are converted into voltages V1 and V2 by the current-voltage conversion circuits 5 and 6, respectively.
【００１０】この電圧Ｖ１，Ｖ２は、減算回路７と加算
回路８に加えられ、減算回路７からは（Ｖ１−Ｖ２）な
る差電圧が出力される。また、加算回路８からは（Ｖ１
＋Ｖ２）＋（Ｖ１−Ｖ２）なる和電圧が出力される。The voltages V1 and V2 are applied to the subtraction circuit 7 and the addition circuit 8, and the subtraction circuit 7 outputs a difference voltage of (V1-V2). Also, from the adder circuit 8 (V1
The sum voltage of + V2) + (V1-V2) is output.
【００１１】これらの差電圧および和電圧は、割算回路
９において差電圧を分子とし、和電圧を分母として割算
され、上記の式（３）に基づいて変位量ｌが得られる。The difference voltage and the sum voltage are divided in the divider circuit 9 with the difference voltage as the numerator and the sum voltage as the denominator, and the displacement amount 1 is obtained based on the above equation (3).
【００１２】[0012]
【発明が解決しようとする課題】このようにして、割算
回路９から被測定面４の変位量ｌに比例した電圧Ｖ０が
出力されるのであるが、光学系のずれ、変位量によって
倍率が変わり、これに伴って光スポット径の大きさが変
わる点およびＰＳＤ自体のリニア特性などが問題要因と
なって理論値どおりの結果が得られない、という問題が
あった。In this way, the voltage V0 proportional to the displacement amount l of the surface 4 to be measured is output from the division circuit 9, but the magnification depends on the displacement of the optical system and the displacement amount. However, there is a problem in that the point where the size of the light spot diameter changes and the linear characteristic of the PSD itself becomes a problem factor, and the result as the theoretical value cannot be obtained.
【００１３】[0013]
【課題を解決するための手段】この発明は上記従来の事
情に鑑みなされたもので、その構成上の特徴は、被測定
面にて反射された光スポットを受光する受光面および少
なくとも２つの出力端子を有し、この各出力端子から光
スポットの入射位置と同出力端子との距離に逆比例した
位置検出電流Ｉ１，Ｉ２を出力する半導体位置検出素子
（ＰＳＤ）と、上記位置検出電流Ｉ１，Ｉ２をそれぞれ
電圧Ｖ１，Ｖ２に変換する第１および第２の電流電圧変
換回路と、上記電圧Ｖ１，Ｖ２からその差電圧（Ｖ１−
Ｖ２）を算出する減算回路と、上記電圧Ｖ１，Ｖ２から
（Ｖ１＋Ｖ２）＋（Ｖ１−Ｖ２）なる和電圧を算出する
加算回路と、上記差電圧を分子とし、上記和電圧を分母
として割算を行なう割算回路とを備え、三角測量法にて
上記被測定面の変位量を測定する変位計において、上記
減算回路から出力される上記差電圧の極性を検出する極
性検出手段を備え、その極性に応じて上記減算回路の補
正抵抗を変化させるようにしたことにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional circumstances, and its structural features are a light receiving surface for receiving a light spot reflected by a surface to be measured and at least two outputs. A semiconductor position detecting element (PSD) which has terminals and outputs position detecting currents I1 and I2 which are inversely proportional to the distance between the output position and the incident position of the light spot, and the position detecting current I1. First and second current-voltage conversion circuits for converting I2 into voltages V1 and V2, respectively, and a voltage difference (V1-
V2), a subtractor circuit, an adder circuit that calculates the sum voltage of (V1 + V2) + (V1-V2) from the voltages V1, V2, the difference voltage as a numerator, and the sum voltage as a denominator for division. In a displacement meter for measuring the amount of displacement of the surface to be measured by a triangulation method, a polarity detecting means for detecting the polarity of the difference voltage output from the subtraction circuit is provided, and the polarity thereof is provided. The correction resistance of the subtraction circuit is changed according to the above.
【００１４】[0014]
【作用】上記のように、減算回路の補正抵抗を変化させ
ることにより、リニア特性が改善される。すなわち、図
５ないし図７には変位量（ｌ）と電圧（Ｖ）の特性曲線
が示されているが、補正しない場合には上記の式（３）
からも明らかなように、図５のようなカーブを画く。As described above, the linear characteristic is improved by changing the correction resistance of the subtraction circuit. That is, the characteristic curves of the displacement amount (l) and the voltage (V) are shown in FIGS. 5 to 7, but when not corrected, the above equation (3) is used.
As is clear from Fig. 5, a curve as shown in Fig. 5 is drawn.
【００１５】これに対して、図６および図７は補正抵抗
を調整した場合の特性曲線図であるが、図６のように正
の側のみを調整すると、負の側がずれてしまう。On the other hand, FIGS. 6 and 7 are characteristic curve diagrams when the correction resistance is adjusted. However, when only the positive side is adjusted as shown in FIG. 6, the negative side is displaced.
【００１６】この発明においては、差電圧の極性に応じ
て補正抵抗が調整され、これにより図７に示されている
ようにきれいなリニア特性が得られる。In the present invention, the correction resistor is adjusted according to the polarity of the differential voltage, and as a result, a clean linear characteristic is obtained as shown in FIG.
【００１７】[0017]
【実施例】図１には、この発明に係る変位計の一実施例
が示されている。これによると、この変位計はＰＳＤ１
と、同ＰＳＤ１から出力される検出電流Ｉ１，Ｉ２をそ
れぞれ電圧Ｖ１，Ｖ２に変換する第１および第２の電流
電圧変換回路１１，１２を備えている。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the displacement gauge according to the present invention. According to this, this displacement meter is PSD1
And first and second current-voltage conversion circuits 11 and 12 for converting the detection currents I1 and I2 output from the PSD 1 into voltages V1 and V2, respectively.
【００１８】この電流電圧変換回路１１，１２にて変換
された電圧Ｖ１，Ｖ２は、減算回路１３と加算回路１４
とに加えられる。The voltages V1 and V2 converted by the current-voltage conversion circuits 11 and 12 are added to the subtraction circuit 13 and the addition circuit 14.
Added to.
【００１９】減算回路１３は４つの抵抗Ｒがともに等し
い差動増幅形演算増幅器からなり、そのプラス入力端子
に一方の電圧Ｖ１が加えられ、マイナス入力端子には他
方の電圧Ｖ２が印加される。したがって、その出力側に
は（Ｖ１−Ｖ２）なる差電圧が現われる。The subtraction circuit 13 is composed of a differential amplification type operational amplifier in which all four resistors R are equal, and one voltage V1 is applied to its plus input terminal and the other voltage V2 is applied to its minus input terminal. Therefore, a difference voltage of (V1-V2) appears on the output side.
【００２０】加算回路１４は３つの抵抗Ｒ´がともに等
しい反転演算増幅器からなり、そのマイナス入力端子に
は電圧Ｖ１，Ｖ２および減算回路１３から出力される差
電圧（Ｖ１−Ｖ２）が加えられるが、この場合、差電圧
（Ｖ１−Ｖ２）は上記定数Ｂを調整する補正抵抗１６を
介して供給される。これにより、同加算回路１４から
は、−｛（Ｖ１＋Ｖ２）＋（Ｖ１−Ｖ２）Ｂ｝なる和電
圧が出力される。The adder circuit 14 is composed of an inverting operational amplifier whose three resistors R'are equal to each other, and the voltages V1 and V2 and the difference voltage (V1-V2) output from the subtractor circuit 13 are applied to its negative input terminals. In this case, the difference voltage (V1-V2) is supplied through the correction resistor 16 that adjusts the constant B. As a result, the adder circuit 14 outputs a sum voltage of − {(V1 + V2) + (V1-V2) B}.
【００２１】この実施例において、補正抵抗１６は抵抗
Ｒ１とＲ２の並列回路からなるが、抵抗Ｒ２側にはスイ
ッチング素子としての電界効果トランジスタ（ＦＥＴ）
１８が同抵抗Ｒ２に対して直列に接続されている。In this embodiment, the correction resistor 16 comprises a parallel circuit of resistors R1 and R2, and a field effect transistor (FET) as a switching element is provided on the resistor R2 side.
18 is connected in series with the resistor R2.
【００２２】また、減算回路１３の出力側には、その差
電圧（Ｖ１−Ｖ２）の極性を検出するコンパレータ１７
が接続されている。この実施例では差電圧が正のとき、
同コンパレータ１７の出力が「Ｈ」となり、これにより
ＦＥＴ１８がオンとなって、補正抵抗値が抵抗Ｒ１とＲ
２の合成値とされる。On the output side of the subtraction circuit 13, a comparator 17 for detecting the polarity of the difference voltage (V1-V2).
Are connected. In this example, when the differential voltage is positive,
The output of the comparator 17 becomes "H", which turns on the FET 18 and the correction resistance values become the resistances R1 and R.
It is a composite value of 2.
【００２３】差電圧と和電圧は、割算回路１５に入力さ
れ、同割算回路１５にて差電圧を分子Ｙとし、和電圧を
分母Ｘとする割算が行なわれ、その出力電圧Ｙ／Ｘは次
段の増幅回路１９に供給される。The difference voltage and the sum voltage are input to the division circuit 15, and the division circuit 15 performs division with the difference voltage as the numerator Y and the sum voltage as the denominator X, and the output voltage Y / X is supplied to the amplifier circuit 19 in the next stage.
【００２４】増幅回路１９は、上記定数Ａを調整するた
めのもので、同増幅回路１９から上記式（３）に示され
ている被測定面の変位量に相当するＶ０＝（Ｙ／Ｘ）Ａ
なる電圧が出力される。The amplifier circuit 19 is for adjusting the constant A, and V0 = (Y / X) corresponding to the amount of displacement of the surface to be measured shown in the above equation (3) from the amplifier circuit 19. A
Is output.
【００２５】補正抵抗１６により定数Ｂを調整するにあ
たって、その補正抵抗がＲ１のみのときは、図６のよう
に正の側のみがきれいに調整され、負の側にずれが生ず
るが、差電圧（Ｖ１−Ｖ２）が正のとき、コンパレータ
１７よりＦＥＴ１８がオンとされ、補正抵抗がＲ１とＲ
２の合成値とされるため、図７に示されているように、
ｌ−Ｖ特性がその全域にわたってリニア補正される。When the constant B is adjusted by the correction resistor 16 and only the correction resistor R1 is used, only the positive side is finely adjusted as shown in FIG. 6 and a deviation occurs on the negative side. When V1−V2) is positive, the comparator 17 turns on the FET 18 and the correction resistors R1 and R2.
Since it is a composite value of 2, as shown in FIG.
The IV characteristic is linearly corrected over the entire area.
【００２６】なお上記とは反対に、光学系などの要因に
より、正の側が負の側よりもずれが大きい場合には、コ
ンパレータ１７の入力を逆とし、差電圧（Ｖ１−Ｖ２）
が負のとき、ＦＥＴ１８がオンするようにすれば良い。Contrary to the above, when the positive side is larger than the negative side due to factors such as the optical system, the input of the comparator 17 is reversed and the difference voltage (V1-V2) is applied.
When is negative, the FET 18 may be turned on.
【００２７】[0027]
【発明の効果】以上説明したように、この発明によれ
ば、ＰＳＤから出力される位置検出電流Ｉ１，Ｉ２をそ
れぞれ電圧Ｖ１，Ｖ２に変換するとともに、これらの電
圧Ｖ１，Ｖ２からその差電圧（Ｖ１−Ｖ２）と和電圧
（Ｖ１＋Ｖ２）＋（Ｖ１−Ｖ２）を算出し、差電圧を分
子とし、和電圧を分母として割算を行なう三角測量法に
て上記被測定面の変位量を測定する変位計において、差
電圧の極性に応じて減算回路の補正抵抗を変化させるよ
うにしたことにより、変位量とその検出電圧との関係に
おいて、きれいなリニア特性が得られる。As described above, according to the present invention, the position detection currents I1 and I2 output from the PSD are converted into voltages V1 and V2, respectively, and at the same time, the voltage difference between these voltages V1 and V2 ( V1-V2) and the sum voltage (V1 + V2) + (V1-V2) are calculated, and the displacement amount of the measured surface is measured by the triangulation method in which the difference voltage is used as the numerator and the sum voltage is used as the denominator for division. In the displacement meter, the correction resistance of the subtraction circuit is changed according to the polarity of the difference voltage, so that a clean linear characteristic can be obtained in the relationship between the displacement amount and the detected voltage.
【図１】この発明に係る変位計の一実施例を示した回路
図。FIG. 1 is a circuit diagram showing an embodiment of a displacement meter according to the present invention.
【図２】ＰＳＤを説明するための断面図。FIG. 2 is a sectional view for explaining PSD.
【図３】ＰＳＤを用いた三角測量法を説明するための模
式図。FIG. 3 is a schematic diagram for explaining a triangulation method using PSD.
【図４】同三角測量法を適用した従来の一般的な変位計
のブロック線図。FIG. 4 is a block diagram of a conventional general displacement meter to which the same triangulation method is applied.
【図５】補正なしのときの変位量（ｌ）と検出電圧
（Ｖ）の特性図。FIG. 5 is a characteristic diagram of a displacement amount (l) and a detection voltage (V) without correction.
【図６】抵抗Ｒ１のみによる補正時の変位量（ｌ）と検
出電圧（Ｖ）の特性図。FIG. 6 is a characteristic diagram of a displacement amount (l) and a detection voltage (V) at the time of correction using only a resistor R1.
【図７】抵抗Ｒ１と抵抗Ｒ２の合成値による補正時の変
位量（ｌ）と検出電圧（Ｖ）の特性図。FIG. 7 is a characteristic diagram of a displacement amount (l) and a detected voltage (V) at the time of correction based on a combined value of resistors R1 and R2.
１ ＰＳＤ（半導体位置検出素子） １１，１２ 電流電圧変換回路 １３ 減算回路 １４ 加算回路 １５ 割算回路 １６ 補正抵抗 １７ コンパレータ １８ ＦＥＴ 1 PSD (semiconductor position detection element) 11, 12 current-voltage conversion circuit 13 subtraction circuit 14 addition circuit 15 division circuit 16 correction resistor 17 comparator 18 FET
Claims (1)
する受光面および少なくとも２つの出力端子を有し、こ
の各出力端子から光スポットの入射位置と同出力端子と
の距離に逆比例した位置検出電流Ｉ１，Ｉ２を出力する
半導体位置検出素子（ＰＳＤ）と、上記位置検出電流Ｉ
１，Ｉ２をそれぞれ電圧Ｖ１，Ｖ２に変換する第１およ
び第２の電流電圧変換回路と、上記電圧Ｖ１，Ｖ２から
その差電圧（Ｖ１−Ｖ２）を算出する減算回路と、上記
電圧Ｖ１，Ｖ２から（Ｖ１＋Ｖ２）＋（Ｖ１−Ｖ２）な
る和電圧を算出する加算回路と、上記差電圧を分子と
し、上記和電圧を分母として割算を行なう割算回路とを
備え、三角測量法にて上記被測定面の変位量を測定する
変位計において、 上記減算回路から出力される上記差電圧の極性を検出す
る極性検出手段を備え、その極性に応じて上記減算回路
の補正抵抗を変化させるようにしたことを特徴とする変
位計。1. A light receiving surface for receiving a light spot reflected by a surface to be measured, and at least two output terminals. The output position is inversely proportional to the incident position of the light spot and the output terminal. The semiconductor position detecting element (PSD) that outputs the detected position detecting currents I1 and I2, and the position detecting current I
First and second current-voltage conversion circuits that convert 1 and I2 into voltages V1 and V2, respectively, a subtraction circuit that calculates a difference voltage (V1-V2) from the voltages V1 and V2, and the voltages V1 and V2. From (V1 + V2) + (V1-V2), and an addition circuit for calculating a sum voltage, and a division circuit for performing division using the above difference voltage as a numerator and the above sum voltage as a denominator. A displacement meter for measuring the amount of displacement of a surface to be measured is provided with polarity detecting means for detecting the polarity of the difference voltage output from the subtraction circuit, and the correction resistance of the subtraction circuit is changed according to the polarity. Displacement meter characterized by having done.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3308497A JP3066509B2 (en) | 1991-10-28 | 1991-10-28 | Displacement gauge |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3308497A JP3066509B2 (en) | 1991-10-28 | 1991-10-28 | Displacement gauge |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05118846A true JPH05118846A (en) | 1993-05-14 |
| JP3066509B2 JP3066509B2 (en) | 2000-07-17 |
Family
ID=17981728
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3308497A Expired - Fee Related JP3066509B2 (en) | 1991-10-28 | 1991-10-28 | Displacement gauge |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3066509B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008191078A (en) * | 2007-02-07 | 2008-08-21 | Hitachi High-Technologies Corp | Method for correcting detection value of PSD element and rail displacement measuring apparatus using the same |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10222040A1 (en) | 2002-05-17 | 2003-12-04 | Kennametal Inc | milling tool |
-
1991
- 1991-10-28 JP JP3308497A patent/JP3066509B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008191078A (en) * | 2007-02-07 | 2008-08-21 | Hitachi High-Technologies Corp | Method for correcting detection value of PSD element and rail displacement measuring apparatus using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3066509B2 (en) | 2000-07-17 |
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