JPH0513006Y2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a plasma processing apparatus used for etching semiconductor wafers, etc.

(Prior art) In the manufacturing process of semiconductor integrated circuits, the surface of a semiconductor wafer such as a silicon wafer is selectively covered with an organic film, and the portions not covered with the organic film are selectively coated with plasma. I try to do some etching.

The plasma reaction processing equipment used for such etching is a batch type that processes a large number of wafers at the same time, but since this batch type equipment cannot process each wafer homogeneously, recently high-quality semiconductor integrated circuit chips have been A parallel plate type device disclosed in Japanese Unexamined Patent Publication No. 56-48099 is known as a device for manufacturing.

However, since the parallel plate type plasma reaction processing apparatus sets the wafer between a pair of parallel electrodes, the wafer is directly exposed to plasma and may be damaged.

Therefore, a device that is equipped with a pair of semi-cylindrical external electrodes around the plasma reaction processing device and has a separate wafer processing section and plasma generation section, such as a TCA-
2300 (plasma ashing device manufactured by Tokyo Ohka Kogyo Co., Ltd.)
It has been known. As shown in FIG. 4, this device includes a bell-shaped chamber 101 on a bottom plate 100, a pair of semi-cylindrical electrodes 102 and 103 arranged above the chamber 101, and one electrode 102. to the high frequency power supply 104, the other 10
3 is grounded, and furthermore, a table 105 is faced from below inside the chamber 101, and this table 105
A wafer W is placed on top.

(Problems to be solved by the invention) According to the conventional device shown in FIG. 4, since the upper part of the chamber 101 is used as the plasma generation part,
The wafer W placed at the bottom of the chamber 101 is less damaged by ions and charged particles present in the plasma, but the etching speed is slow and the wafer W is etched isotropically as shown in FIG. The degree of so-called side etching, which is etching to the inside of the opening 106a of the organic film 106 formed in the first place, increases.

(Means for Solving the Problems) In order to solve the above problems, the present invention provides a pair of semi-cylindrical upper electrodes at the top of the chamber of a plasma reaction processing apparatus, and connects one of the upper electrodes to a high frequency power source. , the other end was grounded, and the table-shaped lower electrode facing into the chamber was connected to a high frequency power source.

(Function) Since the upper part of the chamber becomes the plasma generation area,
The wafer placed on the lower electrode is less likely to be damaged by the plasma, and the radicals generated by the plasma are attracted toward the lower electrode connected to the high-frequency power source and strike the wafer surface perpendicularly, resulting in anisotropic etching. will be applied.

(Example) An example of the present invention will be described below based on the accompanying drawings.

FIG. 1 is an overall view of a plasma reaction processing apparatus according to the present invention, in which a bell jar type quartz chamber 2 is mounted and fixed on a bottom plate 1. This quartz chamber 2 has a small diameter part 2b integrally formed on a large diameter main body 2a, and a pair of semi-cylindrical upper electrodes 3 and 4 are arranged on the outside of this small diameter part 2b. Connect to power supply 5, ground the other electrode 4,
Further, a reaction gas introduction pipe 6 is connected to the top of the small diameter portion 2b. Note that the semi-cylindrical electrodes 3 and 4 may be arranged within the chamber 2.

On the other hand, an opening 7 is formed in the bottom plate 1, a collar 8 is fitted into the opening 7, and a table-shaped lower electrode 9 can be moved up and down along the inner peripheral surface of the collar 8. This lower electrode 9 is placed in a position where it is not sandwiched between the pair of electrodes 3 and 4 for plasma generation, and its upper surface is a flat surface on which the semiconductor wafer W is placed.
A flange portion 9a extending outward is formed at the lower portion, and when the lower electrode 9 rises, the upper end of the flange portion 9a comes into pressure contact with a sealing member 10 attached to the lower surface of the bottom plate 1, thereby ensuring airtightness within the chamber 2. I have to. Further, the lower electrode 9 is connected to the high frequency electrode 5, so that a much weaker high frequency than that applied to the upper electrode 3 is applied to the lower electrode 9.

On the other hand, an exhaust ring 11 is provided on the bottom plate 1 inside the chamber 2. The outer peripheral surface of this exhaust ring 11 contacts the inner peripheral surface of the chamber 2, the upper surface is flush with the raised lower electrode 9, and the inner diameter is larger than the outer diameter of the lower electrode 9. An exhaust port 12 for evacuation is formed in. The exhaust port 12 is connected to an exhaust passage 14 formed in the bottom plate 1 via an exhaust passage 13 formed between the exhaust ring 11, the collar 8, and the bottom plate 1. A case will be described in which the surface of a semiconductor wafer W is etched using the plasma reaction processing apparatus configured as described above.

First, the lower electrode 9 is lowered from the position shown in FIG. By suctioning, the pressure inside the chamber 2 is reduced, a reaction gas is introduced from the reaction gas introduction pipe 6, and a high frequency is applied to one of the upper electrodes 3, while a weak high frequency is applied to the lower electrode 9.

Then, plasma is mainly generated in the upper part of the chamber 2 surrounded by the pair of upper electrodes 3 and 4, and the radicals activated by the generation of plasma are directionalized by the high frequency applied to the lower electrode 9. It hits the wafer W perpendicularly. As a result, as shown in FIG. 2, the surface of the wafer W is etched vertically along the window 15a of the organic film 15 formed on the surface, and no side etching occurs.

Further, in the above embodiment, high frequency was applied to the lower electrode 9 from the beginning of etching, but in the initial stage of etching, high frequency was not applied to the lower electrode, but after a predetermined time elapsed, high frequency was applied. Alternatively, the intensity of the high frequency applied to the lower electrode 9 may be changed over time.

By doing this, the amount of side etching can be controlled as desired. By setting the amount of side etching to an appropriate amount, it is possible to obtain a pattern having a tapered shape in the cross-sectional shape of the etching.
As shown in the figure, the insulating layer or metal layer 16 stacked on the wafer W can also be made flat.

(Effects of the invention) As explained above, according to the invention, a pair of upper electrodes for plasma generation are arranged at the upper part of the chamber, and a lower electrode for placing a wafer connected to a high frequency power supply is arranged at the lower part of the chamber. This allows anisotropic etching to be performed while suppressing wafer damage caused by ions and charged particles in the plasma, making it possible to perform processing without side etching, and furthermore, it is possible to control the amount of side etching as desired. It can also be controlled.

[Brief explanation of the drawing]

FIG. 1 is an overall view of a plasma processing apparatus according to the present invention, FIGS. 2 and 3 are enlarged sectional views of a wafer etched by the apparatus according to the present invention, and FIG. 4 is a conventional plasma processing apparatus. FIG. 5 is an enlarged sectional view of a wafer etched by a conventional apparatus. In the drawing, 2 is a chamber, 3 and 4 are semi-cylindrical upper electrodes, 5 is a high frequency power source, 9 is a lower electrode, and W is a semiconductor wafer.

Claims (1)

[Scope of utility model registration request] In a plasma reaction processing apparatus having a Bergier type chamber 2, a pair of upper electrodes 3, 4 divided into semi-cylindrical shapes are provided on the side surface of the Bergier type chamber 2, and one electrode of the upper electrodes 3, 4 is provided. 3 is connected to a high frequency power source 5, the other electrode 4 is grounded, and a lower electrode 9 on which the object to be processed W is placed faces at the lower part of the chamber 2, and this lower electrode 9 is connected to the pair of upper electrodes 3. , 4, located below the plasma generation region defined by
A plasma reaction processing apparatus characterized in that the plasma reaction processing apparatus is connected to a high frequency power source having a lower frequency than the one electrode 3.