JPH05135587A - Memory backup circuit - Google Patents

Abstract

PURPOSE:To obtain time margin from the generation of an alarm to the exchange of a battery at the memory backup circuit for holding data in a memory. CONSTITUTION:When the output voltage of a main battery 31 is lowered and an output voltage Vx of an output line L1 is lowered, the value of a differential voltage signal CS outputted from an operational amplifier 371 is lowered, and a flip-flop 372 outputs an alarm signal AS. This alarm signal AS is transmitted to the side of a numerical controller 10, and alarm display is executed by a display 18. The alarm signal AS is supplied to a gate G of an MOS transistor 34 and operates the MOS transistor 34. Thus, the voltage of a sub battery 32 is supplied through the output line L1 to a CMOS memory 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory backup circuit for holding data in a memory, and more particularly to a memory backup circuit used in a device such as a numerical control device which needs to store one data for a long period of time. Regarding the circuit.

[0002]

2. Description of the Related Art In a control device using a microprocessor such as a numerical control device, data which is desired to be retained even after power-off is stored in a non-volatile memory. SRAM such as CMOS is used as the non-volatile memory.
A battery for backup is connected to the device, and after the power supply of the control device is cut off, the data can be held by the voltage supply from the battery.

Further, when the battery is old, an alarm signal is output on the backup circuit side to notify the battery replacement time.

[0004]

However, the battery is
It has the characteristic that the voltage drops drastically when it reaches the end of its life. FIG. 4 is a diagram showing the characteristics of a lithium battery that is commonly used as a backup battery. Assuming that the battery voltage during normal data retention is 3.3V,
An alarm occurs at point P1 when the voltage drops to 3.0V. If this is left as it is, it will be S at P2 point which dropped to 2.0V.
The data in RAM will be lost. Therefore, the user needs to replace the battery with a new one at the point P1 when the alarm occurs.

However, as can be seen from the figure, the voltage of a lithium battery, a nickel-cadmium battery, etc. has a characteristic that it drops sharply at the end of its life, so the time tx from the point P1 to the point P2 is very short. Becomes Therefore, conventionally, there is a possibility that the data in the SRAM may be lost unless the battery is replaced in a short time.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a memory backup circuit which has a sufficient time from the alarm occurrence to the battery replacement.

[0007]

According to the present invention, in order to solve the above problems, in a memory backup circuit for holding data in a memory, a main battery for supplying a backup voltage to the memory, and the main battery A sub-battery provided as a backup of the main battery and a voltage monitoring means for monitoring the backup voltage of the main battery, and outputting an alarm signal when the backup voltage becomes a predetermined value or less; And a battery switching means for supplying the voltage of the sub-battery to the memory when an alarm signal is output.

[0008]

When the backup voltage of the main battery falls below a predetermined value, the voltage monitoring means outputs an alarm signal, and the battery switching means supplies the memory with the voltage of the sub-battery.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a schematic configuration diagram of hardware of a numerical control device for carrying out the present invention. Processor 11 is R
The entire numerical controller 10 is controlled according to the system program stored in the OM 12. In ROM12, EP
ROM or EEPROM is used. RAM13
An SRAM or the like is used for the memory and stores various data or input signals.

The CMOS memory 14 is a non-volatile memory and is backed up by the backup circuit 15. In the CMOS memory 14, parameters, machining programs, which should be retained even after the power of the numerical control device 10 is cut off,
The offset amount and the like are stored. The backup circuit 15 supplies a battery voltage to the CMOS memory 14 and outputs an alarm signal to the bus 24 to notify the battery replacement time.

The serial port 16 is connected to an external storage device (not shown) such as a paper tape device or a disk device, and exchanges data with these devices. The display control circuit 17 converts the digital signal into a signal for display and gives it to the display unit 18. A CRT or a liquid crystal display device is used for the display unit 18, and the position display of each axis, the state of input / output signals, parameters, alarm messages and the like are displayed.

The keyboard interface 19 sends key input data from the keyboard 20 to the processor 11. The digital I / O 21 exchanges input / output signals with the machine side. The servo control circuit 22 outputs a speed command signal for controlling the motor 23.

FIG. 1 is a circuit diagram showing the configuration of the backup circuit 15. The backup circuit 15 is provided with a main battery 31 that supplies a backup voltage to the CMOS memory 14 and a sub battery 32. Lithium batteries, for example, are used as the main battery 31 and the sub-battery 32, and the output voltage value thereof is about 3.3V. The voltage of the main battery 31 is supplied to the CMOS memory 14 via the diode 33 and the output line L1.
Is supplied to. The output voltage of the main battery 31 drops by about 0.3V by the diode 33 and is supplied to the CMOS memory 14 as the output voltage Vx of 3.0V.

The output side terminal of the diode 33 is M
It is connected to the source S of the OS transistor 34. The sub battery 32 is connected to the drain D of the MOS transistor 34 via a diode 35.

A voltage conversion circuit 36 and an alarm circuit 37 are connected to the output line L1. The voltage conversion circuit 36 includes a DC / DC converter 361 and a reference voltage generation circuit 3
It is composed of 62. The DC / DC converter 361 is
The output voltage Vx supplied to the CMOS memory 14 is about 5.
It is a circuit that boosts the voltage to 0 V, and sends its output voltage to the reference voltage generation circuit 362 and the alarm circuit 37. Reference voltage generating circuit 362 is a circuit for converting the output voltage of the DC / DC converter 361 to the reference voltage V _REF, and sends the reference voltage V _REF to the alarm circuit 37.

The alarm circuit 37 comprises an operational amplifier 371 and a flip-flop 372. The operational amplifier 371 and the flip-flop 372 have a DC / D
The output voltage from the C converter 361 is supplied,
The operational amplifier 371 and the flip-flop 372 operate by this output voltage. The output voltage Vx from the output line L1 and the reference voltage V _REF from the reference voltage generation circuit 362 are input to the operational amplifier 371. The operational amplifier 371 outputs to the flip-flop 372 a differential pressure signal CS corresponding to the differential pressure value between the output voltage Vx and the reference voltage V _REF .

The flip-flop 372 is provided for the differential pressure signal CS.
When the value of is less than or equal to the predetermined value, the alarm signal AS is output to the numerical controller 10. The alarm signal AS is also supplied to the gate G of the MOS transistor 34. Further, the reset signal RS from the outside of the backup circuit 15 is input to the flip-flop 372.

In the backup circuit 15 having such a configuration, the main battery 31 is usually used for CMOS.
The memory 14 is backed up. When the output voltage of the main battery 31 decreases and the output voltage Vx of the output line L1 decreases, the value of the differential pressure signal CS output from the operational amplifier 371 decreases. When the differential pressure signal CS becomes equal to or less than the predetermined value, the flip-flop 372 causes the alarm signal AS.
Is output. This alarm signal AS is the numerical control device 10
It is sent to the side and an alarm is displayed on the display unit 18. Further, the alarm signal AS is the MOS transistor 34.
Is supplied to the gate G of. When the alarm signal AS is supplied, the MOS transistor 34 operates and the voltage of the sub-battery 32 is supplied to the CMOS memory 14 via the output line L1.

FIG. 3 shows the output line L1 in such a process.
5 is a diagram showing a change in the output voltage Vx of FIG. Output voltage Vx
Decreases rapidly from the normal 3.0 V with the decrease in the output voltage of the main battery 31. Then, the value is 2.
The alarm signal AS is output at the Px point where it becomes 7V.
When the alarm signal AS is output, the voltage of the sub-battery 32 is supplied to the output line L1, so that the output voltage Vx immediately returns to 3.0V. During this time, the worker replaces the main battery 31 with a new one.

After the main battery 31 is replaced, the reset signal RS is supplied to the flip-flop 372 and the output of the alarm signal AS is stopped by pressing the reset button or the like provided in the numerical controller 10.

As described above, in this embodiment, the voltage of the sub-battery 32 is supplied before the output voltage of the main battery 31 drops and the data in the CMOS memory 14 disappears. Is given time to replace the with a new one. Therefore,
There is no risk that the data in the CMOS memory 14 will be lost due to the delay in battery replacement.

[0022]

As described above, according to the present invention, when the backup voltage of the main battery becomes less than a predetermined value, an alarm signal is output and the voltage of the sub battery is supplied to the memory. Therefore, there is a time margin from when the alarm signal is output to when the main battery is replaced. Therefore, the replacement of the battery will not be delayed and the data in the memory will not be erased.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a backup circuit.

FIG. 2 is a schematic configuration diagram of hardware of a numerical control device for carrying out the present invention.

FIG. 3 is a diagram showing a change in output voltage of an output line.

FIG. 4 is a diagram showing characteristics of a lithium battery.

[Explanation of symbols]

 10 Numerical Control Device 14 CMOS Memory 15 Backup Circuit 31 Main Battery 32 Sub Battery 34 MOS Transistor 362 Reference Voltage Generation Circuit 371 Operational Amplifier 372 Flip-Flop

Claims (4)

[Claims] 1. A memory backup circuit for holding data in a memory, a main battery supplying a backup voltage to the memory, a sub-battery provided as a spare of the main battery, and the backup of the main battery. Voltage for monitoring the backup voltage and outputting an alarm signal when the backup voltage falls below a predetermined value; and when the alarm signal is output from the voltage monitoring means, the sub-battery voltage A memory backup circuit comprising: a battery switching unit that supplies the memory. 2. The memory backup circuit according to claim 1, wherein the battery switching means is a MOS transistor. 3. The voltage monitoring means includes a reference voltage generation circuit for generating a reference voltage, a differential pressure value calculation circuit for calculating a differential pressure value between the reference voltage and the backup voltage, and the differential pressure value calculation. 2. The memory backup circuit according to claim 1, further comprising: an alarm signal output circuit that outputs the alarm signal according to the differential pressure value calculated by the circuit. 4. The memory backup circuit according to claim 3, wherein the differential pressure value calculation circuit is an operational amplifier, and the alarm signal output circuit is a flip-flop.