JPH05135902A - Rectangular chip resistor and method of manufacturing the same - Google Patents
Rectangular chip resistor and method of manufacturing the sameInfo
- Publication number
- JPH05135902A JPH05135902A JP3300117A JP30011791A JPH05135902A JP H05135902 A JPH05135902 A JP H05135902A JP 3300117 A JP3300117 A JP 3300117A JP 30011791 A JP30011791 A JP 30011791A JP H05135902 A JPH05135902 A JP H05135902A
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- Prior art keywords
- layer
- surface electrode
- electrode layer
- chip resistor
- glass
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- Non-Adjustable Resistors (AREA)
- Details Of Resistors (AREA)
Abstract
(57)【要約】
【目的】 円筒角形チップ抵抗器の代替品として使用さ
れる上面・裏面にガラス層を有する角形チップ抵抗器に
おいて、側面実装でも十分な固着強度が得られ、また裏
面部ガラスの軟化点を上面ガラスの焼成温度および端面
電極の焼成温度より高く設定することにより、製造工程
の簡略化を行うことを目的とする。
【構成】 厚み方向の長さが幅方向の長さの80%〜1
20%の96アルミナ基板1と、この96アルミナ基板
1両主面の上面、裏面電極層2,3と、上面電極層2の
一部に重なる抵抗層4と、軟化点が550℃〜580℃
の第1ガラス層5と、軟化点が630℃〜850℃の第
2ガラス層6と、前記上面、裏面電極層2,3を接続す
る端面電極層7と、端面電極7層と同時に形成した第1
側面電極層10と第2側面電極層11とを備えている。
(57) [Summary] [Purpose] In a rectangular chip resistor having a glass layer on the top and back surfaces that is used as a substitute for a cylindrical rectangular chip resistor, sufficient bonding strength can be obtained even when mounted on the side, and the glass on the back surface is also provided. The softening point is set to be higher than the firing temperature of the upper surface glass and the firing temperature of the end face electrodes to simplify the manufacturing process. [Structure] The length in the thickness direction is 80% to 1 of the length in the width direction.
20% of the 96 alumina substrate 1, the upper surfaces of both main surfaces of the 96 alumina substrate 1, the back surface electrode layers 2 and 3, the resistance layer 4 overlapping a part of the upper surface electrode layer 2, and the softening point of 550 ° C. to 580 ° C.
Of the first glass layer 5, the second glass layer 6 having a softening point of 630 ° C. to 850 ° C., the end face electrode layer 7 connecting the upper face and the back face electrode layers 2 and 3, and the end face electrode 7 layer were formed at the same time. First
The side surface electrode layer 10 and the second side surface electrode layer 11 are provided.
Description
【0001】[0001]
【産業上の利用分野】本発明は高密度配線回路に用いら
れる、円筒チップ抵抗器の一括実装機により実装される
円筒チップ抵抗器代替の角形チップ抵抗器およびその製
造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a rectangular chip resistor as an alternative to a cylindrical chip resistor mounted by a collective mounting machine of cylindrical chip resistors used in a high-density wiring circuit, and a manufacturing method thereof.
【0002】[0002]
【従来の技術】近年、電子機器の軽薄短小化に対する要
求がますます増大していく中、回路基板の配線密度を高
めるため、抵抗素子には非常に小型な角形チップ抵抗器
が多く用いられるようになってきた。また、更に近年で
は実装速度を速めるため、多数のチップ部品を同時に実
装する一括マウントが行われるようになってきている。2. Description of the Related Art In recent years, with the ever-increasing demand for smaller, lighter, smaller electronic devices, in order to increase the wiring density of circuit boards, very small rectangular chip resistors are often used as resistive elements. Has become. Further, in recent years, in order to increase the mounting speed, collective mounting for mounting a large number of chip components at the same time has been performed.
【0003】従来の厚膜タイプの円筒チップ抵抗器の一
括実装機により実装される、角形チップ抵抗器の構造の
一例を図5に示す。FIG. 5 shows an example of the structure of a rectangular chip resistor mounted by a conventional thick film type cylindrical chip resistor package mounting machine.
【0004】従来の円筒チップ抵抗器の一括実装機によ
り実装される角形チップ抵抗器は、厚み方向の長さが幅
方向の長さの80%〜120%の長さである角板形の絶
縁性の96アルミナ基板20と、この96アルミナ基板
20の主面上に形成された一対の厚膜電極による上面電
極層21と、この上面電極層21と接続するように形成
されたルテニウム系厚膜抵抗による抵抗層22と、抵抗
層を覆う軟化点が550℃〜580℃の第1ガラス層2
4と、更に96アルミナ基板20の裏面上の裏面電極層
27と裏面電極層27の一部に重なる軟化点が550℃
〜580℃の第2ガラス層28と、上面電極層21の一
部と重なる端面電極層23とからなっており、露出電極
面にははんだ付け性を確保するためにNiめっき層25
とはんだめっき層26を電解めっきにより形成してい
る。A rectangular chip resistor mounted by a conventional packager of cylindrical chip resistors is a rectangular plate-shaped insulation whose length in the thickness direction is 80% to 120% of the length in the width direction. 96 alumina substrate 20, a top electrode layer 21 formed of a pair of thick film electrodes formed on the main surface of the 96 alumina substrate 20, and a ruthenium-based thick film formed so as to be connected to the top electrode layer 21. The resistance layer 22 due to resistance and the first glass layer 2 having a softening point covering the resistance layer of 550 ° C. to 580 ° C.
4 and the back surface electrode layer 27 on the back surface of the 96-alumina substrate 20 and the softening point overlapping a part of the back surface electrode layer 27 at 550 ° C.
It is composed of a second glass layer 28 at 580 ° C. and an end face electrode layer 23 that overlaps a part of the upper face electrode layer 21, and a Ni plating layer 25 is formed on the exposed electrode face in order to secure solderability.
And the solder plating layer 26 are formed by electrolytic plating.
【0005】また、この角形チップ抵抗器の製造方法は
図9に示すフローで行われていた。The manufacturing method of this rectangular chip resistor has been performed according to the flow shown in FIG.
【0006】[0006]
【発明が解決しようとする課題】しかし、従来の角形チ
ップ抵抗器は先に述べた一括マウントを行う場合、部品
が実装されるとき、図6のように角形チップ抵抗器30
が基板の主面ではなく側面側で実装される可能性があ
り、このように実装されるとプリント基板と接触する電
極部分29の面積が小さく、はんだ付けされる面積が減
るため、十分な固着強度が得られないという欠点を有し
ていた。However, in the conventional rectangular chip resistor, when the above-mentioned collective mounting is performed, when the components are mounted, the rectangular chip resistor 30 as shown in FIG.
May be mounted not on the main surface of the board but on the side surface side. If mounted in this way, the area of the electrode portion 29 that comes into contact with the printed board is small, and the area to be soldered is reduced, so that sufficient fixation is achieved. It had a defect that strength could not be obtained.
【0007】また、従来の角形チップ抵抗器は第1保護
層と、第2保護層に同程度の軟化点(550℃〜580
℃)を有するガラスを用いているため、ガラス焼成時に
は図7のように、また端面電極焼成時には図8のよう
に、製造品52を治具53にのせて焼成炉の搬送ベルト
51より浮かせて焼成しなければならず、よって角形チ
ップ抵抗器の構造工程が図9に示すように煩雑になり
(特に図8の短冊状の製造品52のセットに工数が必要
となる。)、生産コストがアップするという課題を有し
ていた。Further, in the conventional rectangular chip resistor, the softening point (550 ° C. to 580 ° C.) of the same degree is applied to the first protective layer and the second protective layer.
Since the glass having a temperature of (.degree. C.) is used, the manufactured product 52 is placed on the jig 53 and floated from the conveyor belt 51 of the baking furnace as shown in FIG. 7 when baking the glass and as shown in FIG. 8 when baking the end face electrodes. Since it has to be fired, the construction process of the rectangular chip resistor becomes complicated as shown in FIG. 9 (especially, a man-hour is required to set the strip-shaped product 52 of FIG. 8), and the production cost is high. There was a problem of up.
【0008】本発明は、このような課題を一挙に解決す
るもので、角形チップ抵抗器が側面で実装されても十分
な固着強度が得られ、かつ製造工程の簡略な角形チップ
抵抗器を提供することを目的とする。The present invention solves all such problems at once, and provides a rectangular chip resistor having a sufficient fixing strength even if the rectangular chip resistor is mounted on the side surface and having a simple manufacturing process. The purpose is to do.
【0009】[0009]
【課題を解決するための手段】上記目的を達成するため
に、本発明は、厚み方向の長さが幅方向の長さの80%
〜120%の長さの角板形の絶縁性の焼結基板と、この
焼結基板の一方の主面上に形成された一対の上面電極層
と、この一対の上面電極層の一部に重なる抵抗層と、こ
の抵抗層を完全に覆う軟化点が550℃〜580℃の第
1ガラス層と、前記焼結基板の他方の主面上の一対の裏
面電極層と、前記裏面電極層の一部に重なる軟化点が6
30℃〜850℃の第2ガラス層と、前記一対の上面電
極層と一対の裏面電極層とを電気的に接続する一対の端
面電極層と、2つの側面上で前記上面電極層および前記
端面電極層とを電気的に接続する二対の第1側面電極層
と、同じく2つの側面上で前記裏面電極層と前記端面電
極層とを電気的に接続する二対の第2側面電極層から構
成される。In order to achieve the above object, the present invention has a length in the thickness direction of 80% of the length in the width direction.
A rectangular plate-shaped insulating sintered substrate having a length of 120%, a pair of upper surface electrode layers formed on one main surface of the sintered substrate, and a part of the pair of upper surface electrode layers. The overlapping resistive layer, the first glass layer having a softening point of 550 ° C. to 580 ° C. that completely covers the resistive layer, the pair of back surface electrode layers on the other main surface of the sintered substrate, and the back surface electrode layer. 6 softening points
A second glass layer at 30 ° C. to 850 ° C., a pair of end face electrode layers electrically connecting the pair of upper face electrode layers and a pair of back face electrode layers, and the upper face electrode layer and the end face on two side faces From two pairs of first side surface electrode layers that electrically connect to the electrode layers, and two pairs of second side surface electrode layers that also electrically connect the back surface electrode layer and the end surface electrode layer on two side surfaces. Composed.
【0010】またその製造方法としては第2ガラス層を
700℃〜950℃の温度にて焼成することで形成し、
この第2ガラス層焼成以後に、第1ガラス層を550℃
〜660℃の温度にて焼成することで形成し、更に第1
ガラス層焼成以後に一対の端面電極層と二対の第1側面
電極層と二対の第2側面電極層とを550℃〜660℃
の温度にて焼成するものである。As a manufacturing method thereof, the second glass layer is formed by firing at a temperature of 700 ° C. to 950 ° C.,
After firing the second glass layer, the first glass layer is heated to 550 ° C.
It is formed by firing at a temperature of ~ 660 ° C, and the first
After firing the glass layer, a pair of end surface electrode layers, two pairs of first side surface electrode layers and two pairs of second side surface electrode layers were formed at 550 ° C to 660 ° C.
It is baked at the temperature of.
【0011】[0011]
【作用】本発明によれば、角形チップ抵抗器が側面で実
装されても側面部分に第1側面電極層および第2側面電
極層にはんだ付けされるので、プリント基板と接触する
電極部分の面積が大きくなり十分な固着強度を得ること
ができる。According to the present invention, even if the rectangular chip resistor is mounted on the side surface, it is soldered to the first side surface electrode layer and the second side surface electrode layer on the side surface portion. Therefore, the area of the electrode portion contacting the printed circuit board is reduced. Becomes large, and sufficient fixing strength can be obtained.
【0012】また、軟化点が630℃〜850℃の第2
ガラス層を700℃〜950℃の温度にて焼成し、それ
以後に第2ガラス層を搬送ベルトに接するようにして第
2ガラス層の軟化点以下の550℃〜620℃の温度に
て、第1ガラス層を焼成し、更に第1ガラス層焼成以後
に同様に第2ガラス層の軟化点以下の550℃〜660
℃の温度にて、端面電極層を焼成することによって、ガ
ラス焼成および端面電極層の焼成時には製造品を焼成炉
の搬送ベルトより浮かせて焼成する必要がなくなり、角
形チップ抵抗器の製造工程が簡略されるものである。The second softening point of 630 ° C to 850 ° C
The glass layer is fired at a temperature of 700 ° C. to 950 ° C., and thereafter, the second glass layer is brought into contact with the conveyor belt so that the second glass layer is heated to a temperature of 550 ° C. to 620 ° C. which is lower than the softening point of the second glass layer. One glass layer is fired, and after the first glass layer is fired, the softening point of the second glass layer is 550 ° C. to 660 in the same manner.
By baking the end face electrode layer at a temperature of ℃, it is not necessary to float the manufactured product above the conveyor belt of the baking furnace when baking glass and end face electrode layers, and the manufacturing process of the rectangular chip resistor is simplified. Is done.
【0013】[0013]
【実施例】以下、本発明の一実施例の角形チップ抵抗器
およびその製造方法について、図面を用いて説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A rectangular chip resistor according to an embodiment of the present invention and a method of manufacturing the same will be described below with reference to the drawings.
【0014】図1(a),(b)は本実施例を示す斜視
図および断面図である。図1において、本実施例の角形
チップ抵抗器は、厚み方向の長さが幅方向の長さの80
%〜120%の長さの角板形の絶縁性の96アルミナ基
板1と、この96アルミナ基板1の一方の主面上の銀系
厚膜の一対の上面電極層2と、前記96アルミナ基板の
他方の主面上の裏面電極層3と、前記上面電極層2の一
部に重なるルテニウム系厚膜の抵抗層4と、前記抵抗層
4を完全に覆う軟化点が560±5℃の第1ガラス層5
と、前記裏面電極層3の一部に重なる軟化点が680±
5℃の第2ガラス層6と、前記上面電極層2と前記裏面
電極層3の一部に重なる銀系厚膜の端面電極層7と、上
面電極層2と端面電極層7に接続する第1側面電極層1
0と、裏面電極層3と端面電極層8に接続する第2側面
電極層11とから構成される。なお、露出電極面にはは
んだ付け性を向上させるために、Niめっき層8とSn
−Pbめっき層9を電解めっきにより施している。FIGS. 1A and 1B are a perspective view and a sectional view showing the present embodiment. In FIG. 1, the rectangular chip resistor according to the present embodiment has a length in the thickness direction of 80 in the width direction.
% To 120% of a rectangular plate-shaped insulating 96 alumina substrate 1, a pair of silver-based thick film upper surface electrode layers 2 on one main surface of the 96 alumina substrate 1, and the 96 alumina substrate. Of the back surface electrode layer 3 on the other main surface, a resistance layer 4 of a ruthenium-based thick film that overlaps a part of the top surface electrode layer 2, and a softening point that completely covers the resistance layer 4 is 560 ± 5 ° C. 1 glass layer 5
And the softening point overlapping a part of the back electrode layer 3 is 680 ±
A second glass layer 6 at 5 ° C., an end face electrode layer 7 of a silver-based thick film that partially overlaps the top face electrode layer 2 and the back face electrode layer 3, and a top face electrode layer 2 and an end face electrode layer 7. 1 side electrode layer 1
0, and the second side surface electrode layer 11 connected to the back surface electrode layer 3 and the end surface electrode layer 8. In order to improve solderability on the exposed electrode surface, the Ni plating layer 8 and Sn were used.
-Pb plating layer 9 is applied by electrolytic plating.
【0015】次に、図1に示した本実施例の角形チップ
抵抗器の製造方法について図2にて説明する。まず、耐
熱性および絶縁性に優れた96アルミナ基板1を受け入
れる。この96アルミナ基板1には短冊状、および個片
状に分割するために、分割のための溝(グリーンシート
時に金型成形)が形成されている(基板の厚みは0.6
35mmで、分割のための溝は1.5mmおよび0.8mmピ
ッチで形成されている。)。次に、前記96アルミナ基
板1の表面に厚膜銀ペーストをスクリーン印刷・乾燥
し、更に、前記96アルミナ基板1の裏面に厚膜銀ペー
ストをスクリーン印刷・乾燥し、ベルト式連続焼成炉に
よって850℃の温度で、ピーク時間6分、IN−OU
T時間45分のプロファイルによって焼成し、上面電極
層2および裏面電極層3を同時に形成する。次に前記裏
面電極層3の一部に重なるようにホウケイ酸鉛系ガラス
ペースト(白色)をスクリーン印刷・乾燥し、ベルト式
連続焼成炉によって(上面電極層2を搬送ベルトに接す
るようにする)850℃の温度で、ピーク時間6分、I
N−OUT50分の焼成プロファイルによって焼成し、
第2ガラス層6を形成する。次に、上面電極層2の一部
に重なるように、RuO2を主成分とする厚膜抵抗ペー
ストをスクリーン印刷・乾燥し、ベルト式連続焼成炉
(搬送ベルトから浮かせるようにする)により850℃
の温度でピーク時間6分、IN−OUT時間45分のプ
ロファイルによって焼成し、抵抗層4を形成する。次
に、前記上面電極層2間の前記抵抗層4の抵抗値を揃え
るために、レーザー光によって、前記抵抗層4の一部を
破壊し抵抗値修正(Lカット、100mm/秒、12kH
z、5W)を行う。続いて、前記抵抗層4を完全に覆う
ように、ホウケイ酸鉛系ガラスペースト(黒色)をスク
リーン印刷・乾燥し、ベルト式連続焼成炉(第2ガラス
層6を搬送ベルトに接するようにする)によって590
℃の温度で、ピーク時間6分、IN−OUT50分の焼
成プロファイルによって焼成し、第1ガラス層5を形成
する。次に、端面電極を形成するための準備工程とし
て、端面電極を露出させるために、アルミナ基板1を短
冊状に分割(1.5mmのピッチ側を分割)し、短冊状ア
ルミナ基板を得る。前記短冊状アルミナ基板の側面に、
前記上面電極層2および前記裏面電極層3の一部に重な
るように厚膜銀ペーストをローラーによって塗布し、ベ
ルト式連続焼成炉(第2ガラス層6を搬送ベルトに接す
るようにする)によって600℃の温度で、ピーク時間
6分、IN−OUT45分の焼成プロファイルによって
焼成し端面電極層7を形成する(このとき、短冊状アル
ミナ基板を端面電極側から見ると、図3のように表さ
れ、銀ペーストを塗布時に分割溝中にペーストが染み込
む(図4)。このため、端面電極層7と同時に第1側面
電極層10と第2側面電極層11は形成される。)。次
に、電極めっきの準備工程として、前記端面電極層7を
形成済みの短冊状アルミナ基板を個片に分割(0.8mm
ピッチ側を分割)し、個片状アルミナ基板を得た。そし
て最後に、露出している上面電極層2と裏面電極層3と
端面電極層7のはんだ付け時の電極喰われの防止および
はんだ付けの信頼性の確保のため、電解めっきによって
Niめっき層8とSn−Pbめっき層9を形成する。Next, a method of manufacturing the rectangular chip resistor of this embodiment shown in FIG. 1 will be described with reference to FIG. First, the 96 alumina substrate 1 having excellent heat resistance and insulating properties is received. In order to divide the 96 alumina substrate 1 into strips and individual pieces, a dividing groove (molding at the time of green sheet) is formed (the thickness of the substrate is 0.6).
35 mm, the grooves for division are formed with a pitch of 1.5 mm and 0.8 mm. ). Next, the thick film silver paste is screen-printed and dried on the surface of the 96 alumina substrate 1, the thick film silver paste is screen-printed and dried on the back surface of the 96 alumina substrate 1, and 850 by a belt-type continuous firing furnace. 6 minutes, peak temperature, IN-OU at temperature of ℃
The upper surface electrode layer 2 and the back surface electrode layer 3 are simultaneously formed by firing according to a profile of T time 45 minutes. Next, a lead borosilicate glass paste (white) is screen-printed and dried so as to overlap a part of the back electrode layer 3, and the belt type continuous firing furnace is used (the top electrode layer 2 is brought into contact with the conveyor belt). At a temperature of 850 ° C., a peak time of 6 minutes, I
Fired according to the firing profile of N-OUT 50 minutes,
The second glass layer 6 is formed. Next, a thick film resistance paste containing RuO 2 as a main component is screen-printed and dried so as to overlap a part of the upper surface electrode layer 2, and the temperature is set to 850 ° C. by a belt-type continuous firing furnace (so as to be floated from a conveyor belt).
The resistance layer 4 is formed by baking at a temperature of 6 minutes and a profile of IN-OUT time of 45 minutes. Next, in order to make the resistance value of the resistance layer 4 between the upper electrode layers 2 uniform, a part of the resistance layer 4 is destroyed by laser light and the resistance value is corrected (L cut, 100 mm / sec, 12 kHz).
z, 5W). Subsequently, a lead borosilicate glass paste (black) is screen-printed and dried so as to completely cover the resistance layer 4, and a belt-type continuous firing furnace (the second glass layer 6 is brought into contact with the conveyor belt). By 590
The first glass layer 5 is formed by firing at a temperature of ℃, according to a firing profile of peak time 6 minutes, IN-OUT 50 minutes. Next, as a preparation step for forming the end face electrodes, the alumina substrate 1 is divided into strips (the pitch side of 1.5 mm is divided) to expose the end face electrodes, and strip-shaped alumina substrates are obtained. On the side surface of the strip-shaped alumina substrate,
A thick film silver paste is applied by a roller so as to overlap a part of the upper surface electrode layer 2 and the rear surface electrode layer 3, and 600 by a belt type continuous firing furnace (so that the second glass layer 6 is in contact with a conveyor belt). The end face electrode layer 7 is formed by firing at a temperature of ℃ for a peak time of 6 minutes and IN-OUT 45 minutes (at this time, when the strip-shaped alumina substrate is viewed from the end face electrode side, it is expressed as shown in FIG. 3). , The paste permeates into the dividing grooves when the silver paste is applied (FIG. 4), so that the first side electrode layer 10 and the second side electrode layer 11 are formed simultaneously with the end face electrode layer 7.). Next, as a preparatory step for electrode plating, the strip-shaped alumina substrate on which the end face electrode layer 7 has been formed is divided into individual pieces (0.8 mm
The pitch side was divided) to obtain individual alumina substrates. And finally, in order to prevent electrode erosion during soldering of the exposed upper surface electrode layer 2, the rear surface electrode layer 3, and the end surface electrode layer 7 and to secure reliability of soldering, the Ni plating layer 8 is formed by electrolytic plating. And Sn—Pb plating layer 9 are formed.
【0016】以上の工程により、本実施例による角形チ
ップ抵抗器を試作した(完成品の寸法は、長さが1.6
mm、幅が0.8mm、厚さが0.74mmとなり、厚み方向
の寸法は幅方向の寸法の92.5%となった)。Through the above steps, a square chip resistor according to the present embodiment was prototyped (the finished product has a length of 1.6 mm).
mm, width 0.8 mm, thickness 0.74 mm, and the dimension in the thickness direction was 92.5% of the dimension in the width direction).
【0017】本実施例によれば、従来例の製造方法に比
べガラス焼成時および端面電極焼成時に製造品を焼成炉
の搬送ベルトから浮かせる必要がないので、工程が簡略
化(特に端面電極焼成前に、短冊状の製造品をセットす
る必要が無くなる。)できることが分かる。According to the present embodiment, since it is not necessary to float the manufactured product from the conveyor belt of the baking furnace during the glass baking and the end face electrode baking, the process is simplified (especially before the end face electrode baking). Therefore, it is not necessary to set a strip-shaped manufactured product.)
【0018】また、本実施例の角形チップ抵抗器は、従
来の円筒チップ抵抗器の一括実装機により実装される角
形チップ抵抗器と同様に、図5のように基板の側面で実
装したときでも側面部に電極層が形成されているので、
固着強度(角形チップ抵抗器のプリント基板と平行方向
からの限界加重)は、基板の主面で実装したときとほぼ
同様となった(この場合、側面実装では約8kg、表面実
装は約10kgであり、従来例の側面実装は約3kgであっ
た。)。Further, the rectangular chip resistor of this embodiment, even when mounted on the side surface of the substrate as shown in FIG. 5, is similar to the rectangular chip resistor mounted by the conventional collective mounting machine of the cylindrical chip resistors. Since the electrode layer is formed on the side surface,
The adhesion strength (the limit load from the direction parallel to the printed board of the rectangular chip resistor) was almost the same as when it was mounted on the main surface of the board (in this case, about 8 kg for side mounting and about 10 kg for surface mounting). Yes, the side mounting of the conventional example was about 3 kg.)
【0019】なお、本実施例では第1ガラス層に軟化点
が560±5℃のガラスと、第2ガラス層に軟化点が6
80±5℃ガラスを用いたが、それぞれ軟化点が520
℃〜580℃、630℃〜850℃であるガラスであれ
ば同様の効果を発揮することは言うまでもない(但し、
この実施例の軟化点がガラス組成としては最も安定して
いるため角形チップ抵抗器の抵抗性能が最良とな
る。)。また、それぞれのガラス層の焼成温度は550
℃〜620℃、700℃〜950℃の範囲で適宜選択す
ればよい。また端面電極層7の焼成温度は第2ガラス層
6の軟化点より低い範囲で選択する。In this embodiment, the glass having a softening point of 560 ± 5 ° C. is used for the first glass layer and the softening point is 6 for the second glass layer.
80 ± 5 ℃ glass was used, but the softening point was 520
Needless to say, similar effects are exhibited if the glass has a temperature of from ℃ to 580 ℃, 630 ℃ to 850 ℃ (however,
Since the softening point of this example is the most stable for the glass composition, the rectangular chip resistor has the best resistance performance. ). The firing temperature of each glass layer is 550.
It may be appropriately selected in the range of ℃ to 620 ℃, 700 ℃ to 950 ℃. The firing temperature of the end face electrode layer 7 is selected in the range lower than the softening point of the second glass layer 6.
【0020】[0020]
【発明の効果】以上の説明より明らかなように、本発明
の角形チップ抵抗器によれば、側面部に電極層を形成し
ているので、角形チップ抵抗器が側面で実装されても十
分な固着強度が得られるといった優れた効果を有する。
また、本発明の製造方法では端面部電極と同時に側面部
電極を形成しているので工数は全く悪化させないで製造
できるという効果も得られる。As is apparent from the above description, according to the rectangular chip resistor of the present invention, since the electrode layer is formed on the side surface, it is sufficient even if the rectangular chip resistor is mounted on the side surface. It has an excellent effect of obtaining a fixing strength.
Further, in the manufacturing method of the present invention, since the side surface electrodes are formed at the same time as the end surface electrodes, there is an effect that the manufacturing can be performed without deteriorating the man-hours at all.
【0021】また、本発明の角形チップ抵抗器はまず軟
化点が630℃〜850℃の第2ガラス層を700℃〜
950℃の温度にて焼成し、それ以後に第2ガラス層を
搬送ベルトに接するようにして第2ガラス層の軟化点以
下の550℃〜620℃の温度にて、第1ガラス層を焼
成し、更に第1ガラス層焼成以後に同様に第2ガラス層
の軟化点以下の550℃〜660℃の温度にて、端面電
極層を焼成することによりガラス焼成および端面電極層
の焼成時には製造品を焼成炉の搬送ベルトより浮かせて
焼成する必要がなくなり、角形チップ抵抗器の製造工程
が簡略されるといった優れた効果を有する。In the rectangular chip resistor of the present invention, first, the second glass layer having a softening point of 630 ° C to 850 ° C is formed at 700 ° C to
Firing at a temperature of 950 ° C., and then firing the first glass layer at a temperature of 550 ° C. to 620 ° C. below the softening point of the second glass layer so that the second glass layer is in contact with the conveyor belt. Further, after the first glass layer is fired, the end face electrode layer is fired at a temperature of 550 ° C. to 660 ° C., which is lower than the softening point of the second glass layer. It is not necessary to float the firing belt from the conveyor belt of the firing furnace, and the firing process is simplified, so that the manufacturing process of the rectangular chip resistor is simplified.
【図1】(a),(b)はそれぞれ本発明の一実施例の
角形チップ抵抗器の構造を示す斜視図および断面図1A and 1B are a perspective view and a sectional view, respectively, showing the structure of a rectangular chip resistor according to an embodiment of the present invention.
【図2】本発明の一実施例の角形チップ抵抗器の製造方
法の一例を示す説明図FIG. 2 is an explanatory diagram showing an example of a method for manufacturing a rectangular chip resistor according to an embodiment of the present invention.
【図3】本発明の一実施例の角形チップ抵抗器の製造途
中の短冊状アルミナ基板の説明図FIG. 3 is an explanatory diagram of a strip-shaped alumina substrate in the process of manufacturing a rectangular chip resistor according to an embodiment of the present invention.
【図4】同実施例の端面電極層、側面電極層塗布状態の
説明図FIG. 4 is an explanatory diagram of a coated state of an end face electrode layer and a side face electrode layer in the same example.
【図5】従来の角形チップ抵抗器の構造を示す断面図FIG. 5 is a sectional view showing the structure of a conventional rectangular chip resistor.
【図6】従来の角形チップ抵抗器が側面で実装された状
態を示す説明図FIG. 6 is an explanatory view showing a state in which a conventional rectangular chip resistor is mounted on a side surface.
【図7】従来の角形チップ抵抗器のガラス焼成用治具の
説明図FIG. 7 is an explanatory diagram of a conventional glass firing jig for a rectangular chip resistor.
【図8】従来の角形チップ抵抗器の端面電極焼成用治具
の説明図FIG. 8 is an explanatory view of a jig for firing an end face electrode of a conventional rectangular chip resistor.
【図9】従来の角形チップ抵抗器の製造方法の一例を示
す説明図FIG. 9 is an explanatory view showing an example of a conventional method for manufacturing a rectangular chip resistor.
1 96アルミナ基板 2 上面電極層 3 裏面電極層 4 抵抗層 5 第1ガラス層 6 第2ガラス層 7 端面電極層 8 Niめっき層 9 Sn−Pbめっき層 10 第1側面電極層 11 第2側面電極層 1 96 Alumina Substrate 2 Top Electrode Layer 3 Back Electrode Layer 4 Resistance Layer 5 First Glass Layer 6 Second Glass Layer 7 End Face Electrode Layer 8 Ni Plating Layer 9 Sn-Pb Plating Layer 10 First Side Electrode Layer 11 Second Side Electrode layer
Claims (2)
120%の長さの角板形の絶縁性の焼結基板と、この前
記焼結基板の一方の主面上に形成された一対の上面電極
層と、この一対の上面電極層の一部に重なる抵抗層と、
この抵抗層を完全に覆う第1ガラス層と、前記焼結基板
の他方の主面上の一対の裏面電極層と、前記裏面電極層
の一部に重なる第2ガラス層と、前記一対の上面電極層
と一対の裏面電極層とを電気的に接続する一対の端面電
極層と、2つの側面上で前記上面電極層および前記端面
電極層とを電気的に接続する二対の第1側面電極層と、
同じく2つの側面上で前記裏面電極層と前記端面電極層
とを電気的に接続する二対の第2側面電極層から構成さ
れることを特徴とする角形チップ抵抗器。1. The length in the thickness direction is 80% to the length in the width direction.
A rectangular plate-shaped insulating sintered substrate having a length of 120%, a pair of upper surface electrode layers formed on one main surface of the sintered substrate, and a part of the pair of upper surface electrode layers. Overlapping resistive layers,
A first glass layer that completely covers the resistance layer, a pair of back surface electrode layers on the other main surface of the sintered substrate, a second glass layer that partially overlaps the back surface electrode layer, and the pair of upper surfaces. A pair of end surface electrode layers electrically connecting the electrode layer and the pair of back surface electrode layers, and two pairs of first side surface electrodes electrically connecting the top surface electrode layer and the end surface electrode layer on two side surfaces. Layers and
A rectangular chip resistor, which is also composed of two pairs of second side surface electrode layers that electrically connect the back surface electrode layer and the end surface electrode layer on two side surfaces.
にて焼成することで形成し、この第2ガラス層焼成以後
に第1ガラス層を550℃〜620℃の温度にて焼成す
ることで形成し、更に第1ガラス層焼成以後に一対の端
面電極層と二対の第1側面電極層と二対の第2側面電極
層とを550℃〜660℃の温度にて焼成することを特
徴とする請求項1記載の角形チップ抵抗器の製造方法。2. The second glass layer is formed by firing at a temperature of 700 ° C. to 950 ° C., and the first glass layer is fired at a temperature of 550 ° C. to 620 ° C. after the firing of the second glass layer. And baking the pair of end surface electrode layers, the pair of first side surface electrode layers and the pair of second side surface electrode layers at a temperature of 550 ° C. to 660 ° C. after baking the first glass layer. The method for manufacturing a rectangular chip resistor according to claim 1, wherein.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30011791A JP3231370B2 (en) | 1991-11-15 | 1991-11-15 | Manufacturing method of square chip resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30011791A JP3231370B2 (en) | 1991-11-15 | 1991-11-15 | Manufacturing method of square chip resistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05135902A true JPH05135902A (en) | 1993-06-01 |
| JP3231370B2 JP3231370B2 (en) | 2001-11-19 |
Family
ID=17880929
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30011791A Expired - Fee Related JP3231370B2 (en) | 1991-11-15 | 1991-11-15 | Manufacturing method of square chip resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3231370B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0629102A (en) * | 1992-07-10 | 1994-02-04 | Alps Electric Co Ltd | Chip resistor and its manufacturing method |
| JP2002280205A (en) * | 2001-03-21 | 2002-09-27 | Kamaya Denki Kk | Chip-shaped resistor and its manufacturing method |
| WO2006022055A1 (en) * | 2004-08-26 | 2006-03-02 | Rohm Co., Ltd. | Chip type component and its manufacturing process |
| JP2018139248A (en) * | 2017-02-24 | 2018-09-06 | パナソニックIpマネジメント株式会社 | Chip resistor mounting structure |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11110434A (en) | 1997-10-07 | 1999-04-23 | Fujitsu Ltd | Printed circuit board pattern design equipment |
-
1991
- 1991-11-15 JP JP30011791A patent/JP3231370B2/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0629102A (en) * | 1992-07-10 | 1994-02-04 | Alps Electric Co Ltd | Chip resistor and its manufacturing method |
| JP2002280205A (en) * | 2001-03-21 | 2002-09-27 | Kamaya Denki Kk | Chip-shaped resistor and its manufacturing method |
| WO2006022055A1 (en) * | 2004-08-26 | 2006-03-02 | Rohm Co., Ltd. | Chip type component and its manufacturing process |
| US7629872B2 (en) | 2004-08-26 | 2009-12-08 | Rohm Co., Ltd. | Chip type component and its manufacturing process |
| JP2018139248A (en) * | 2017-02-24 | 2018-09-06 | パナソニックIpマネジメント株式会社 | Chip resistor mounting structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3231370B2 (en) | 2001-11-19 |
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