JPH0515085B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a superconducting logic circuit having a Josephson superconducting logic circuit including a Josephson element.

Prior Art In a superconducting logic circuit having a Josephson superconducting logic circuit including Josephson elements, the Josephson superconducting logic circuit is latched in order to sequentially operate the Josephson superconducting logic circuit in a latching mode. It has been proposed that the Josephson superconducting logic circuit must be reset to an initial state after each logic operation in the mode.

In the case of such a superconducting logic circuit that requires resetting the Josephson superconducting logic circuit, in order to reset the Josephson superconducting logic circuit to its initial state, the bias current of the Josephson superconducting logic circuit must be reduced to zero or zero. It is necessary to set the value close to .

In the conventional superconducting logic circuit that needs to be reset as described above, the bias current path of the Josephson superconducting logic circuit is connected to an AC bias power supply, and the AC bias current from the AC bias power supply is connected to the bias current path of the Josephson superconducting logic circuit. The Josephson superconducting logic circuit is usually configured to be reset to its initial state by taking advantage of the fact that the value always takes a value of zero or close to zero.

However, conventional superconducting logic circuits having such a configuration require an AC bias power source, resulting in a complicated configuration and an increase in the size of the superconducting logic circuit.

In addition, in the case of a conventional superconducting logic circuit having the above-mentioned configuration, the Josephson superconducting logic circuit is
Josephson superconducting logic circuits have a drawback in that they tend to malfunction due to punch-through when reset to the initial state using an alternating current bias current.

OBJECTS OF THE INVENTION Therefore, the present invention aims to propose a superconducting logic circuit having a Josephson superconducting logic circuit including a novel Josephson element that does not have the above-mentioned drawbacks, and which will be described in detail below. It will become clear.

Structure and operation of the present invention The structure and operation of the present invention will be explained in detail below based on Examples.

FIG. 1 shows an embodiment of the present invention, which has the following configuration.

That is, the circuit of FIG. 1 has a control line 2 connected to a logic signal source 1 and an output line 4 connected to a load 3.
and a bias current path 5, a Josephson superconducting logic circuit 6, which may be of various types known per se, is constructed including Josephson elements.

Thus, the bias current path 5 of the Josephson superconducting logic circuit 6 can be implemented using various types of Josephson elements known per se, including a Josephson element having a control line 8 connected to a reset signal source 7. It is connected to a DC bias power supply 10 through a gate 9 (for example, a SQUID, etc., which is not particularly selected). In this case, it is possible to insert a mutual interference prevention resistor 11 between the bias current path 5 of the Josephson superconducting logic circuit 6 and the Josephson gate 9.

Further, a series body of an inductor 12 and a resistor 13 is connected in parallel with the Josephson gate 9 described above, and 13 causes 9 itself to self-reset when 9 undergoes a voltage transition (transition to an OFF state). It has a very small value (0.3-0.4Ω as one example).

Further, a bypass resistor 14 is connected in parallel with the series circuit of the bias current path 5 of the Josephson superconducting logic circuit 6 and the Josephson gate 9 described above.

The configuration of the embodiment of the superconducting logic circuit according to the present invention has been roughly clarified above, and the configuration will be further described along with its operation.

According to the superconducting logic circuit according to the present invention shown in FIG. 9 is flowing through the Josephson superconducting logic circuit 6, but no output current is being supplied to the output line 4 of the Josephson superconducting logic circuit 6 which leads to the load 3 (this is called the initial state). , if the logic signal from the logic signal source 1 is supplied, the Josephson superconducting logic circuit 6
operates logically, and the bias current that has been flowing in the bias current path 5 of the Josephson superconducting logic circuit 6 passes through the input side of the bias current path 5 and then flows to the load 3 through the output line 4. A load 3 is connected to the output line 4 of the conduction logic circuit 6.
Provides an output current that passes through the Therefore, Josephson superconducting logic circuit 6 operates in a latching mode.

On the other hand, if logic operation is performed in such a latching mode, Josephson superconducting logic circuit 6
The bias current that has been flowing until now no longer flows through the bias current path 5. Therefore, after the logic operation in the latching mode described above has been performed, in order to perform the logic operation in the next latching mode similar to that described above, the Josephson superconducting logic circuit must be It is necessary to reset the state.

According to the superconducting logic circuit according to the present invention shown in FIG. 1, Josephson superconducting logic circuit 6 can be brought into the above-mentioned initial state as follows. That is, first, a reset signal from the reset signal source 7 is supplied to the control line 8 of the Josephson gate 9.

When this happens, the Josephson gate 9 transitions to the OFF state (voltage transition), and as a result, the direct current that has been flowing through the Josephson gate 9 to the input side of the bias current path 5 of the Josephson superconducting logic circuit 6 The bias current stops flowing, and the DC bias current that was flowing to the input side of the Josephson superconducting logic circuit 6 becomes zero or a value close to zero, so the Josephson superconducting logic circuit 6 is reset, and the Josephson superconducting logic circuit 6 is reset. A state is reached in which a DC bias current can flow through the bias current path 5 of the circuit 6.

Now, assume that the DC bias current that has been flowing through the Josefson gate 9 until now flows to the input side of the bias current path 5 of the Josephson superconducting logic circuit 6 via the series body of the inductor 12 and resistor 13. , for the inductor 12, first the DC power supply 1
Almost all of the DC bias current from 0 flows to the bypass resistor 14, and then the bypass resistor 14
In such a manner that the value of the DC bias current flowing to the The current flows through current path 5. At this point, the reset signal from the reset signal source 7 to the control line 8 disappears. In this state, if the value of the resistor 13 is selected to be a sufficiently small value, the current flowing through the series body of the inductor 12 and the resistor 13 will be large, and the current flowing through the Josephson gate 9 in parallel with this will be the same as that of the Josephson gate 9. Since the current becomes smaller than the minimum sustaining current of the voltage state of the Josephson element in the gate 9, the Josephson gate 9 is reset and turned on (zero voltage state), and as a result, the current flowing through the series body of the inductor 12 and the resistor 13 is restarted. It will now flow through Jiyosephson Gate 9.

In this case, of course, the reset signal from the reset signal source 7 to the control line 8 has disappeared by then.

As described above, the Josephson superconducting logic circuit 6 is reset to the above-mentioned initial state, and the value of the resistor 13 in the series circuit of the inductor 12 and the resistor 13 is reduced to a minute value (Josephson gate 9
Josephson gate 9 is also reset by setting the value to a value capable of self-resetting.

Effects of the Invention As described above, according to the superconducting logic circuit according to the present invention shown in FIG. 1, the Josephson superconducting logic circuit 6 can be reset to the above-mentioned initial state. The logic can be operated in sequential latching mode.

In this way, resetting the Josephson superconducting logic circuit 6 to the above-mentioned initial state is achieved by using the DC bias power supply 10 without using an AC bias power supply, as in the case of the conventional superconducting logic circuit described at the beginning. It has the great advantage of being simple in construction and free of the drawbacks associated with conventional superconducting logic circuits mentioned above at the outset.

[Brief explanation of the drawing]

FIG. 1 is a connection diagram showing an embodiment of a superconducting logic circuit according to the present invention. 1...Logic signal source, 2...Control line, 3...Load, 4...Output line, 5...Bias current path, 6...
... Josephson superconducting logic circuit, 7 ... Reset signal source, 8 ... Control line, 9 ... Josephson gate, 10 ... DC bias power supply, 11 ... Resistor,
12...Inductor, 13...Resistor, 14...
Side road resistance.

Claims (1)

[Claims] 1. A Josephson superconducting logic circuit that includes a Josephson element and operates in a latching mode, and a resistive load circuit is connected as an output circuit to the Josephson superconducting logic circuit, and the The bias current path is connected to a DC bias power supply through a Josephson gate including a Josephson element, and a series circuit of an inductor and a resistor is connected in parallel with the Josephson gate, and the resistor is connected to the Josephson gate. The voltage is set to a value that allows the Josephson gate to self-reset when the voltage transition occurs in the Josephson gate, and a bypass resistor is provided in parallel with the series circuit of the bias current path of the Josephson superconducting logic circuit and the Josephson gate. A superconducting logic circuit characterized by being connected.