JPH05199095A - Switching circuit driving method - Google Patents

Abstract

(57) [Summary] [Structure] The switch circuit FET 106 is driven by a phototransistor and a light emitting diode coupled thereto. Further, instead of the phototransistor, a photodiode or a transformer is used for driving. [Effect] A driving method that consumes significantly less power than the conventional switch circuit driving power is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switch circuit for controlling application of positive and negative high voltage pulses to a load, and more particularly to a method for driving the switch circuit realizing low power consumption.

[0002]

2. Description of the Related Art Conventionally, a switch circuit for a high voltage pulse signal is described in Japanese Patent Application No. 63-245446.

In order to control application of high-voltage positive and negative pulses to a load (capacitive load), a switching circuit of FET is provided and the gate of the FET is driven by using a high-voltage current source. The high voltage input pulse is turned on and off. An example thereof will be described with reference to FIGS. 14 and 15.

FIG. 14 is a switch circuit diagram for controlling application of a high voltage negative pulse to a load. N-type FET1
The negative high voltage pulse is input to the source of 06, and the load is connected to the drain. A Zener diode 104 is connected between the gate and source of the FET 106 to prevent voltage breakdown, and this diode also serves to supply charge to the gate when the source becomes high potential. FET 106
FET14 is a switch circuit to the ground potential
Connected to 01 drain.

Now, when turning on the FET 106, the switch circuit FET 1401 is turned off. In that case, as the high-voltage input pulse falls, the source of the FET 106 drops to a low potential, and the Zener diode 104 causes a potential difference between the gate and the source of the FET 106.
The ET 106 turns on. Therefore, a negative high voltage pulse is applied to the load 108.

When turning off the FET 106, the FET 14
Turn 01 on. At the same time that the input pulse falls,
From the gate of the FET 106, the FET 1401 and the resistor 14
A current flows through 02, and the potential difference between the gate and source of the switch circuit FET 106 disappears. Therefore, the FET
106 turns off and no negative high voltage pulse is applied to the load 108. The diode 107 is a parasitic diode of the FET 106.

FIG. 15 is a switch circuit diagram for controlling application of a positive high voltage pulse to a load. N-type FET 10
A positive high voltage pulse is input to the drain of 6, and the load 108 is connected to the source. Resistor 105 between gate and source
Is connected to the Zener diode 104, and the gate is connected to the drain of the switch circuit FET 1501 which is a current supply source from a high potential.

When the switch circuit FET 106 is turned on, the FET 1501 is turned on, a current is supplied from a high potential (VH), a potential difference is applied between the gate and source of the FET 106 by the resistor 105, and the FET 106 is turned on.

When turning off the FET 106, the FET 15
01 is turned off and no current flows through the resistor 105.
The gate and source of T106 have the same potential, and FET1
06 turns off.

[0010]

In the conventional circuit example described above, a current is passed from the high potential to the ground potential in order to drive the gate of the FET 106. Therefore, the drive power of the switch circuit becomes Cgs (VH) ² (VH is the voltage amplitude of the high voltage pulse), which is an extremely large value, when the input capacitance of the gate is Cgs. This is the switch circuit FE
This is because the potential of the source of T106 fluctuates according to the input pulse, and the gate of the FET 106 must also be controlled so as to follow the potential of this source.

An object of the present invention is to provide a switch circuit F at a low voltage.
It is an object of the present invention to provide a novel driving method and a device thereof, in which a potential difference is applied between the gate and the source of ET to drastically reduce the driving power of the switch circuit.

[0012]

The above-mentioned object is to drive a gate-source of a FET for switching a high voltage pulse,
It is achieved by driving by coupling a phototransistor or a photodiode with a light emitting diode. In this case, the source potential varies depending on the high-voltage pulse input signal, but since the potential difference applied is converted into the potential difference between the gate and the source, the source potential can be driven at a low voltage.

The switching circuit driving power at this time is Cgs (VL) ² /, where η is the conversion efficiency of the photocoupling.
η (VL is a light emitting diode drive voltage), which is an extremely small value. For example, VH = 300V, VL = 5V, η
= 50%, the switch circuit drive power of the present invention is 1800 times lower than the drive power of the conventional circuit.

The above object can also be achieved by using a transformer to drive the gate and source of the switch circuit FET. In the case of the phototransistor, since the electric charge cannot be supplied, the circuit configuration of the switch circuit is limited, whereas in the case of the transformer drive, the electric charge can be supplied, so that the range of the circuit configuration of the switch circuit is widened.

[0015]

In the gate driving of the switch circuit by the optical coupling between the phototransistor and the photodiode and the light emitting diode, the response speed of the optical coupling becomes a problem. With these low-cost photocouplers available today,
Although 10 kbit / sec is generally used, an element such as GaAs may be used for higher speed.

Although the driving method using the transformer is low in price, it is difficult to form an IC and the volume is large. However, since it is driven at a low voltage, it can be made quite small depending on the manufacturing method.

[0017]

Embodiments of the present invention will be described below with reference to FIGS. 1 to 13.

In FIG. 1, a negative high voltage pulse is input to the source of the switch circuit N-type FET 106, and a load 10 is applied to the drain.
8 is a circuit diagram in which a resistor 105, a Zener diode 104, and a phototransistor 103 are connected in parallel between the gate and the source of the switch circuit FET 106 by connecting 8 of FIG.

Here, the negative pulse means that when the switch circuit is turned off, a high voltage of direct current (or close thereto) is applied to the load, and when the switch circuit is turned on, a pulse that drops to a low potential is applied. I mean that.

In FIG. 1, the diode 107 is a parasitic diode of the switch circuit FET 106, the phototransistor 103 is photocoupled with the light emitting diode 102, and the ON / OFF control of the switch circuit FET 106 is performed by the control signal input terminal 101. It is performed by inputting a low voltage pulse signal.

FIG. 2 shows an input voltage waveform, a control signal voltage waveform, and an output signal (signal applied to the load) voltage waveform of the switch circuit of FIG. The operation of the switch circuit shown in FIG. 1 will be described below with reference to FIG.

The input signal (negative high voltage pulse) of FIG. 2 is applied to the input signal terminal 109 of FIG. Switch circuit F
When turning off the ET 106, the control signal input terminal of FIG.
A low voltage pulse is applied to 101. At that time, the phototransistor 103 is turned on because it is coupled with the light emitting diode 102. When the phototransistor 103 turns on, the potential difference between the gate and the source of the switch circuit FET 106 disappears, so the switch circuit FET 106 turns off, and the negative high voltage pulse is not applied to the load 108.

Here, with the control signal pulse of FIG.
When 08 is a capacitive load, the pulse of the control signal may be the pulse of the falling time width of the input signal. In the output signal of FIG. 2, a small pulse is shown in the output signal when the FET 106 is off.
It is shown that there is a leakage of the pulse voltage by the impedance division ratio between the impedance of 1 and the output capacitance of the FET 106.

When the switch circuit FET 106 is turned on, no pulse is applied to the control signal input terminal 101 of FIG. At this time, the light emitting diode 102 does not emit light, and the phototransistor 103 is turned off. In that case, when the high voltage pulse of the input signal falls, the switch circuit FET
Source follows the high voltage pulse of the input and falls,
By the resistor 105 and the Zener diode 104,
A potential difference automatically occurs between the gate and source of the switch circuit FET 106, and the switch circuit FET 106 turns on. Therefore, at this time, a negative high voltage pulse is applied to the load 108.

Here, the power consumption of this switch circuit is
The power of the pulse applied to the control signal input terminal 101, and the input signal voltage thereof is usually 5V. Now, when the input capacitance of the gate of the switch circuit FET 106 is Cgs,
When the conversion efficiency of the photocoupler is η, the switch circuit driving power is Cgs (5) ² / η, which is an extremely small value.

Although both the resistor 105 and the Zener diode 104 are connected between the gate and the source of the switch circuit FET 106 in FIG. 1, only one of the resistor and the Zener diode may be connected. This also applies to the circuit diagrams of FIGS. 1 to 13.

FIG. 3 shows a switching circuit FET 106 with a photodiode instead of the phototransistor 301 of FIG.
It is a circuit diagram in the case of driving the.

Although only one photodiode 301 is shown in FIG. 3, generally several photodiodes are connected in series in order to drive the FET. Although only one photodiode 301 is shown in FIG. 3 for simplification of the drawing, this means, of course, more than one photodiode.

A method of driving the switch circuit of FIG. 3 will be described with reference to the time chart of FIG. First, when the switch circuit FET 106 of FIG. 3 is turned on, a low voltage pulse is input to the control signal input terminal 101. At this time, the light emitting diode 102 emits light, a potential difference is generated across the photodiode 301 (that is, between the gate and source of the switch circuit 106), and the switch circuit FET 106 is turned on. Therefore, a negative high voltage pulse is applied to the load 108.

Next, when the switch circuit FET 106 is turned off, no pulse is applied to the control signal input terminal 101. At this time, the light emitting diode 102 does not emit light, no potential difference occurs between the two terminals of the photodiode 301, and the switch circuit FET 106 is turned off. Therefore, the negative high voltage pulse is not applied to the load 108.

In FIG. 5, a positive high voltage pulse is input to the source of the switch circuit P-type FET 501 and the drain 10 is loaded.
8, the resistor 105, the Zener diode 104, and the phototransistor 103 are connected between the gate and the source of the switch circuit FET 501, and the phototransistor 10 is connected.
3 is a circuit diagram in the case of driving a switch circuit FET 501 with the light emitting diode 102 coupled with No. 3; FIG. Here, a positive high-voltage pulse means that a low DC voltage (or a voltage close to it) is applied to the load when the switch circuit is turned off, and a high-voltage pulse is applied to the load when the switch circuit is turned on. Say that.

The circuit operation of FIG. 5 will be described with reference to the time chart of FIG. When turning off the switch circuit FET 501 in FIG. 5, a low voltage pulse is input to the control signal input terminal 101. At that time, the light emitting diode 102 emits light,
The phototransistor 103 is turned on. Therefore, since there is no potential difference between the gate and source of the switch circuit FET501, the switch circuit FET501 is turned off.

Although some leakage voltage pulses are shown in the output waveform diagram of FIG. 6, this shows a leakage voltage due to impedance division between the impedance of the load 108 and the output capacitance of the switch circuit FET 501.

Here, when the load 108 is a capacitive load, the pulse of the control signal may have a pulse width only for the rising time of the high voltage pulse of the input signal.

Next, when turning off the switch circuit FET 501, no pulse is applied to the control signal input terminal 101. At that time, since the light emitting diode does not emit light, the phototransistor is turned off. When the positive high voltage pulse of the input signal rises, the source of the switch circuit FET 501 is pulled to a high voltage, so the resistor 105 and the Zener diode 104 cause the switch circuit FET 501 to operate.
Potential difference between the gate and source of the switch circuit FE
T501 turns on. Therefore, a high voltage positive pulse is applied to the load 108.

FIG. 7 shows a switching circuit FET 501 using a photodiode instead of the phototransistor of FIG.
FIG. 8 is a circuit diagram for driving a switch, and FIG. 8 shows a switch circuit FE.
It is a time chart which shows an ON / OFF state of T501.

First, when the switch circuit FET 501 is turned on, a low voltage pulse is applied to the control signal input terminal 101. At that time, a potential difference is generated across the photodiode 301 (between the gate and source of the switch circuit FET 501), the switch circuit FET 501 is turned on, and a high-voltage positive pulse is applied to the load 108.

When the switch circuit FET 501 is turned off, no pulse is applied to the control signal input terminal 101.
At that time, since there is no potential difference between both ends of the photodiode 301, there is no potential difference between the gate and source of the switch circuit FET 501.
Turns off and no high voltage pulse is applied to the load 108.

In FIG. 9, a positive high voltage pulse is applied to the drain of the switch circuit N-type FET 106, and the load 10 is applied to the source.
8 is connected, the resistor 105, the Zener diode 104, and the photodiode 301 are connected between the gate and source of the switch circuit FET 106, and the switch circuit FET 106 is driven by the light emitting diode 102 coupled with the photodiode 301. is there.

A time chart showing this circuit operation is shown in FIG.
Is the same as. When a low voltage pulse is input to the control signal input terminal 101, a potential difference is generated across the photodiode 301 (between the gate and the source of the switch circuit FET 106) and the switch circuit FET 106 is turned on.

When the switch circuit FET 106 is turned off, no pulse is applied to the control signal input terminal 101.
At that time, no potential difference is generated across the photodiode 301, and the switch circuit FET 106 is turned off.

FIG. 10 shows a switch circuit FET1 using a transformer 1001 instead of the light emitting diode 102 and the phototransistor 103 coupled thereto in FIG.
It is a circuit diagram at the time of driving 06.

The operation is the same as the time chart of FIG. When the switch circuit FET 106 is turned on, a low voltage pulse is applied to the control signal input terminal 101. At that time, a potential difference is generated in the coil on the secondary side, and the switch circuit FE
A potential difference is generated between the gate and source of T106, and the switch circuit FET106 is turned on.

When the switch circuit FET 106 is turned off, no pulse is applied to the control signal input terminal 101. At that time, no potential difference occurs in the coil on the secondary side, and the switch circuit
Since there is no potential difference between the gate and source of the FET 106, the switch circuit FET 106 is turned off.

FIG. 11 shows a switch circuit FET10 using a transformer 1001 instead of the light emitting diode 102 and the photodiode 301 coupled thereto in FIG.
6 is a circuit diagram when driving 6 of FIG. The operation is the same as the time chart of FIG.

FIG. 12 shows a switch circuit FET50 in which a transformer 1001 is used in place of the light emitting diode 102 and the photodiode 301 coupled thereto in FIG.
2 is a circuit diagram when 1 is driven. FIG. The operation is the same as the time chart of FIG.

FIG. 13 shows a switch circuit P-type FET 501.
Input a high voltage negative pulse to the drain of, connect the addition 108 to the source, and connect the gate of the switch circuit FET501.
FIG. 6 is a circuit diagram in the case where a resistor 105 and a Zener diode 104 are connected between sources and a gate and a source of a switch circuit FET 501 are driven by a transformer 1001. Operation is Figure 4
It is the same as the time chart of.

[0048]

According to the present invention, a switch circuit for controlling application of a high voltage pulse to a load is provided.
Drive between ET gate and source is a phototransistor,
By using a photodiode or a transformer, the driving power is significantly reduced as compared with the conventional current source driving.

For example, when the voltage of the high voltage pulse is VH, the gate-source capacitance of the switch circuit is Cgs, the drive voltage of the light emitting diode is VL, and the conversion efficiency between the light emitting diode and the phototransistor (or photodiode) is η. , Conventional switch circuit drive power is Cgs (VH) ²
However, in the present invention, it becomes Cgs (VL) ² / η. For example, VH = 300V, VL = 5V, η = 50%
Assuming that, the drive power of the switch circuit of the present invention is 1/1800 of the drive power of the conventional switch circuit.

In particular, when this switch circuit is applied to a matrix display element and the pulse generating circuit is used as a power recovery circuit, the number of terminals of the matrix display element is large. It is clear that this will be a significant improvement.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a switch using a phototransistor of the present invention.

FIG. 2 is a time chart showing the circuit operation of FIG.

FIG. 3 is a switch circuit diagram using the photodiode of the present invention.

FIG. 4 is a time chart showing the circuit operation of FIG.

FIG. 5 is another switch circuit diagram using the phototransistor of the present invention.

FIG. 6 is a time chart showing the circuit operation of FIG.

FIG. 7 is another switch circuit diagram using the photodiode of the present invention.

FIG. 8 is a time chart showing the circuit operation of FIG.

FIG. 9 is another switch circuit diagram using a photodiode.

FIG. 10 is a switch circuit diagram using a transformer.

FIG. 11 is another switch circuit diagram using a transformer.

FIG. 12 is another switch circuit diagram using a transformer.

FIG. 13 is another switch circuit diagram using a transformer.

FIG. 14 is a conventional switch circuit diagram.

FIG. 15 is another conventional switch circuit diagram.

[Explanation of symbols]

102 ... Light emitting diode, 103 ... Phototransistor, 106 ... N-type FET, 301 ... Photodiode,
501 ... P-type FET, 1001 ... Transformer.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Tadashi Narisei 1-280 Higashi Koikeku, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Kuni Kitagawa, 3681 Hayano, Mobara-shi, Chiba Hitachi Device Engineering Co., Ltd. Within

Claims (9)

[Claims] 1. A negative high voltage pulse is input to the source of the N-type FET, a load is connected to the drain of the N-type FET, and at least one of a resistor or a Zener diode is connected between the gate and the source of the N-type FET, or In a switch circuit connecting both of them to control application of a negative high voltage pulse to a load, a phototransistor is connected between a gate and a source of the N-type FET, and a light emitting diode coupled with the phototransistor is provided. Then, a method for driving a switch circuit, characterized in that the N-type FET is driven. 2. A negative high voltage pulse is input to the source of the N-type FET, a load is connected to the drain of the N-type FET, and at least one of a resistor or a Zener diode is connected between the gate and the source of the N-type FET, or In a switch circuit connecting both of them to control application of a negative high voltage pulse to a load, a photodiode is connected between a gate and a source of the N-type FET, and a light-emitting diode coupled with the photodiode is provided. A method for driving a switch circuit, characterized in that the N-type FET is driven by. 3. A positive high voltage pulse is input to the source of the P-type FET, a load is connected to the drain of the P-type FET, and at least one of a resistor or a Zener diode is connected between the gate and the source of the P-type FET, or In a switch circuit that controls the application of a positive high-voltage pulse to a load by connecting both of them, a phototransistor is connected between the gate and source of the P-type FET, and the phototransistor and a light-emitting diode coupled thereto are used. A driving method of a switch circuit, characterized in that the P-type FET is driven. 4. A positive high voltage pulse is input to the source of the P-type FET, a load is connected to the drain of the P-type FET, and at least one of a resistor or a Zener diode is connected between the gate and the source of the P-type FET, or In a switch circuit for controlling the application of a positive high voltage pulse to a load by connecting both, a photodiode is connected between the gate and source of the P-type FET, and a light emitting diode coupled with the photodiode is provided. A method for driving a switch circuit, wherein the P-type FET is driven by the method. 5. A high positive voltage pulse is input to the drain of the N-type FET, a load is connected to the source of the N-type FET, and at least one of a resistor and a Zener diode is connected between the gate and the source of the N-type FET, or In a switch circuit for connecting both to control application of a positive high voltage pulse to a load, a photodiode is connected between the gate and source of the N-type FET, and the photodiode is coupled with the light emitting diode. A driving method of a switch circuit, characterized in that the N-type FET is driven. 6. A negative high voltage pulse is input to the source of the N-type FET, a load is connected to the drain of the N-type FET, and at least one of a resistor and a Zener diode is connected between the gate and the source of the N-type FET, or A method of driving a switch circuit, characterized in that, in a switch circuit that connects both of them and controls application of a negative high voltage pulse to a load, a gate and source of the N-type FET are driven by a transformer. 7. A positive high voltage pulse is input to the drain of the N-type FET, a load is connected to the source of the N-type FET, and at least one of a resistor and a Zener diode is connected between the gate and the source of the N-type FET, or A method of driving a switch circuit, characterized in that, in a switch circuit that connects both of them and controls application of a positive high-voltage pulse to a load, a transformer is driven between the gate and the source of the N-type FET. 8. A positive high voltage pulse is input to the source of the P-type FET, a load is connected to the drain of the P-type FET, and at least one of a resistor or a Zener diode is connected between the gate and the source of the P-type FET, or In a switch circuit for controlling the application of a positive high-voltage pulse to a load by connecting both of them, a method for driving the switch circuit is characterized in that the gate and source of the P-type FET are driven by a transformer. 9. A negative high voltage pulse is input to the drain of a P-type FET, a load is connected to the source of the P-type FET, and at least one of a resistor or a Zener diode is connected between the gate and the source of the P-type FET, or A switch circuit for controlling the application of a negative high-voltage pulse to a load by connecting both of them, and driving a switch circuit between the gate and source of the P-type FET.