JPH05199428A - Dynamic focus circuit - Google Patents

Dynamic focus circuit

Info

Publication number
JPH05199428A
JPH05199428A JP4008196A JP819692A JPH05199428A JP H05199428 A JPH05199428 A JP H05199428A JP 4008196 A JP4008196 A JP 4008196A JP 819692 A JP819692 A JP 819692A JP H05199428 A JPH05199428 A JP H05199428A
Authority
JP
Japan
Prior art keywords
voltage
focus voltage
horizontal
focus
multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4008196A
Other languages
Japanese (ja)
Inventor
Kazuo Sato
佐藤  一雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Industry and Control Solutions Co Ltd
Original Assignee
Hitachi Image Information Systems Inc
Hitachi Ltd
Hitachi Video and Information System Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Image Information Systems Inc, Hitachi Ltd, Hitachi Video and Information System Inc filed Critical Hitachi Image Information Systems Inc
Priority to JP4008196A priority Critical patent/JPH05199428A/en
Publication of JPH05199428A publication Critical patent/JPH05199428A/en
Pending legal-status Critical Current

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  • Details Of Television Scanning (AREA)

Abstract

PURPOSE:To obtain an optimum focus even on a cathode-ray tube having a high curvature by using a multiplier to set the horizontal parabolic focus voltage amplitude in the central part and the peripheral part of a picture to an arbitrary value. CONSTITUTION:The horizontal parabolic focus voltage is multiplied by vertical parabolic focus voltage in a multiplier 5 to set the horizontal parabolic focus voltage to an arbitrary amplitude in the peripheral part. The horizonal parabolic voltage has DC cut by a coupling capacitor 2 and is converted into a current by a resistance 4 and is inputted to the multiplier 5. At this time, the resistance value of the resistance 4 is varied to adjust the horizontal amplitude. The vertical parabolic focus voltage which controls the horizontal parabolic focus voltage has DC cut by a coupling capacitor 1 and is converted into a current by a resistance 3 having the variable resistance value to adjust the horizontal amplitude in the peripheral part. Thus, the voltage resulting from addition in an adder 9 of the output voltage of the multiplier 5 and the vertical parabolic focus voltage is used as a synthesized parabolic focus voltage.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はブラウン管にダイナミッ
クフォーカス電圧を供給するためのダイナミックフォー
カス回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dynamic focus circuit for supplying a dynamic focus voltage to a cathode ray tube.

【0002】[0002]

【従来の技術】従来装置は特開昭62−283779号
公報に記載の様にダイナミックフォーカス回路中にスラ
イスレベル回路を付加し、中心部付近の電圧をスライス
する。これにより見かけ上中心部のフォーカスを少し上
方にずらせることにより、そのずらせた分だけ周辺部の
ずれ量を補正している。
2. Description of the Related Art In a conventional device, a slice level circuit is added to a dynamic focus circuit as described in Japanese Patent Laid-Open No. 62-283779 to slice a voltage near the center. As a result, the focus of the central portion is apparently slightly shifted upward, and the shift amount of the peripheral portion is corrected by the amount of the shift.

【0003】[0003]

【発明が解決しようとする課題】上記従来技術では中心
部の波形をスライスするため、この部分でフォーカスが
劣化し画面全面において最適フォーカスを得ることが出
来ない。
In the above-mentioned prior art, since the waveform at the central portion is sliced, the focus is deteriorated at this portion and the optimum focus cannot be obtained on the entire screen.

【0004】本発明はフォーカス電圧波形をスライスす
ることなく周辺部においても最適フォーカス波形を得る
ため、フォーカス電圧を画面中心部と周辺部で任意の振
幅に調整できるようにした。これにより中心部のフォー
カスを劣化させることなく周辺部のフォーカスを最適と
することが出来る。
According to the present invention, the optimum focus waveform is obtained even in the peripheral portion without slicing the focus voltage waveform, so that the focus voltage can be adjusted to an arbitrary amplitude in the center portion and the peripheral portion of the screen. This makes it possible to optimize the focus of the peripheral portion without deteriorating the focus of the central portion.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するた
め、ダイナミックフォーカス回路に掛算器を用いて画面
中心部と周辺部で水平パラボラフォーカス電圧振幅を任
意の振幅に設定できる様にした。
In order to achieve the above object, a multiplier is used in the dynamic focus circuit so that the horizontal parabola focus voltage amplitude can be set to an arbitrary amplitude in the central portion and the peripheral portion of the screen.

【0006】掛算器では水平パラボラフォーカス電圧に
垂直パラボラフォーカス電圧を掛け、水平パラボラフォ
ーカス電圧振幅を制御している。従って、垂直パラボラ
フォーカス電圧の調整により水平パラボラフォーカス電
圧は周辺部で任意の振幅とすることが出来る。
The multiplier controls the horizontal parabola focus voltage amplitude by multiplying the horizontal parabola focus voltage by the vertical parabola focus voltage. Therefore, by adjusting the vertical parabola focus voltage, the horizontal parabola focus voltage can have an arbitrary amplitude in the peripheral portion.

【0007】[0007]

【作用】本発明は掛算器で水平パラボラフォーカス電圧
に垂直パラボラフォーカス電圧を掛け、画面周辺部にお
いて水平パラボラフォーカス電圧を制御している。
According to the present invention, the horizontal parabola focus voltage is multiplied by the vertical parabola focus voltage by the multiplier to control the horizontal parabola focus voltage in the peripheral portion of the screen.

【0008】よって垂直パラボラフォーカス電圧の調整
により周辺部における水平パラボラフォーカス電圧とし
て任意の電圧が得られる。更に水平パラボラフォーカス
電圧波形に垂直パラボラフォーカス電圧を加算し、この
波形を出力回路でアンプしてフォーカス電極に印加す
る。従って画面中心、水平、垂直、周辺部の調整が可能
となり、画面全面において最適なフォーカスが得られ
る。
Therefore, by adjusting the vertical parabola focus voltage, an arbitrary voltage can be obtained as the horizontal parabola focus voltage in the peripheral portion. Further, the vertical parabola focus voltage is added to the horizontal parabola focus voltage waveform, and this waveform is amplified by the output circuit and applied to the focus electrode. Therefore, the center, horizontal, vertical, and peripheral portions of the screen can be adjusted, and optimum focus can be obtained on the entire screen.

【0009】[0009]

【実施例】以下、本発明の1実施例を図1により説明す
る。図1の回路は大きく分け、掛算器、加算器、出力部
の3つに分けられる。以下の説明はこの3つのブロック
に分け説明を行う。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. The circuit of FIG. 1 is roughly divided into three parts: a multiplier, an adder, and an output part. The following description will be divided into these three blocks.

【0010】掛算器5は水平パラボラフォーカス電圧に
垂直パラボラフォーカス電圧を掛け、周辺部において水
平パラボラフォーカス電圧を任意の振幅が得られるよう
に制御している。水平パラボラフォーカス電圧は結合コ
ンデンサ2でDCカットされ、抵抗4で電流変換されて
掛算器5に入力される。この時、抵抗4をVRとするこ
とで水平振幅を調整している。水平パラボラフォーカス
電圧を制御する垂直パラボラフォーカス電圧も結合コン
デンサ1にてDCカット、抵抗3にて電流変換される。
この時、抵抗3の可変により、周辺部における水平パラ
ボラフォーカス電圧の振幅を調整する。
The multiplier 5 multiplies the horizontal parabola focus voltage by the vertical parabola focus voltage and controls the horizontal parabola focus voltage so that an arbitrary amplitude can be obtained in the peripheral portion. The horizontal parabola focus voltage is DC-cut by the coupling capacitor 2, converted into a current by the resistor 4, and input to the multiplier 5. At this time, the horizontal amplitude is adjusted by setting the resistance 4 to VR. The vertical parabola focus voltage that controls the horizontal parabola focus voltage is also DC-cut by the coupling capacitor 1 and converted into a current by the resistor 3.
At this time, the amplitude of the horizontal parabola focus voltage in the peripheral portion is adjusted by changing the resistance 3.

【0011】この掛算器5の出力電圧と垂直パラボラフ
ォーカス電圧を加算器9にて加算したものが合成パラボ
ラフォーカス電圧となる。掛算器5の出力電圧は入力抵
抗7を通りオペアンプ9に入力される。垂直パラボラフ
ォーカス電圧はコンデンサ1にてDCカットされ入力抵
抗6を通りオペアンプ9に入力される。入力抵抗6を可
変することにより垂直パラボラフォーカス電圧の重畳量
を変えることが出来る。抵抗8は帰還抵抗で入力抵抗
6、7との比で出力ゲインを決める。
The sum of the output voltage of the multiplier 5 and the vertical parabola focus voltage by the adder 9 becomes the combined parabola focus voltage. The output voltage of the multiplier 5 is input to the operational amplifier 9 through the input resistor 7. The vertical parabola focus voltage is DC cut by the capacitor 1 and is input to the operational amplifier 9 through the input resistor 6. By changing the input resistance 6, the amount of superposition of the vertical parabola focus voltage can be changed. The resistor 8 is a feedback resistor and determines the output gain by the ratio with the input resistors 6 and 7.

【0012】加算器の出力電圧は出力回路のトランジス
タ12にて増幅されフォーカス電極に印加される。出力
回路のゲインはエミッタ抵抗10とコレクタ抵抗11に
よって決まる。トランジスタ12にコレクタ電圧波形を
結合コンデンサ13にてDCカットし、抵抗14にてバ
イアスを与えフォーカス電極に印加する。このバイアス
を可変し中心部のフォーカスを調整する。
The output voltage of the adder is amplified by the transistor 12 of the output circuit and applied to the focus electrode. The gain of the output circuit is determined by the emitter resistance 10 and the collector resistance 11. The collector voltage waveform of the transistor 12 is DC-cut by the coupling capacitor 13, the bias is given by the resistor 14, and the bias voltage is applied to the focus electrode. This bias is varied to adjust the focus of the central part.

【0013】[0013]

【発明の効果】本発明によれば、今後更に曲率が大きく
なってゆくと考えられるブラウン管にも最適なフォーカ
ス電圧を与えることが出来る。
According to the present invention, an optimum focus voltage can be applied to a cathode ray tube whose curvature is expected to increase in the future.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の1実施例であるダイナミックフォーカ
ス回路図である。
FIG. 1 is a diagram of a dynamic focus circuit that is an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1,2…結合コンデンサ 3…周辺部フォ−カスVR 4…水平フォ−カスVR 5…掛算器 6…垂直フォ−カスVR 7,8…加算抵抗 9…オペアンプ 10…エミッタ抵抗 11…コレクタ抵抗 12…出力トランジスタ 13…結合コンデンサ 14…ダイナミックフォ−カスVR 1, 2 ... Coupling capacitor 3 ... Peripheral focus VR 4 ... Horizontal focus VR 5 ... Multiplier 6 ... Vertical focus VR 7, 8 ... Summing resistor 9 ... Operational amplifier 10 ... Emitter resistor 11 ... Collector resistor 12 Output transistor 13 Coupling capacitor 14 Dynamic focus VR

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】ブラウン管のフォーカス電極にパラボラフ
ォーカス電圧波形を印加するダイナミックフォーカス回
路中のパラボラフォーカス電圧合成部において、水平パ
ラボラフォーカス電圧振幅を垂直パラボラフォーカス電
圧にて制御し、画面中心部と周辺部で水平パラボラフォ
ーカス電圧を任意の振幅に設定できる回路を設けたこと
を特徴とするダイナミックフォーカス回路。
1. A parabola focus voltage combining section in a dynamic focus circuit for applying a parabola focus voltage waveform to a focus electrode of a cathode ray tube, in which a horizontal parabola focus voltage amplitude is controlled by a vertical parabola focus voltage, and a central portion and a peripheral portion of the screen are controlled. The dynamic focus circuit is characterized in that a circuit that can set the horizontal parabola focus voltage to any amplitude is provided.
JP4008196A 1992-01-21 1992-01-21 Dynamic focus circuit Pending JPH05199428A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4008196A JPH05199428A (en) 1992-01-21 1992-01-21 Dynamic focus circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4008196A JPH05199428A (en) 1992-01-21 1992-01-21 Dynamic focus circuit

Publications (1)

Publication Number Publication Date
JPH05199428A true JPH05199428A (en) 1993-08-06

Family

ID=11686522

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4008196A Pending JPH05199428A (en) 1992-01-21 1992-01-21 Dynamic focus circuit

Country Status (1)

Country Link
JP (1) JPH05199428A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0866605A1 (en) * 1997-03-19 1998-09-23 Matsushita Electric Industrial Co., Ltd. Dynamic focus circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0866605A1 (en) * 1997-03-19 1998-09-23 Matsushita Electric Industrial Co., Ltd. Dynamic focus circuit
US6072414A (en) * 1997-03-19 2000-06-06 Matsushita Electric Industrial Dynamic focus circuit

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