JPH052095B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention converts the peak value of a particle detection signal indicating the particle size into a digital value as a preprocessing for particle analysis to measure the particle size of particles such as blood cells. The present invention relates to a particle detection signal processing device that performs processing such as processing.

[Prior art] As a device for measuring the particle size of particles such as blood cells,
There is a conductive particle detection device. In the conductive particle detection device, particles are detected as follows. A suspension is created by suspending measurement particles in a thin electrolyte solution with a salt concentration of about 0.8%, and a pair of electrodes separated by an insulating wall with micropores is immersed in the suspension. Then, a potential difference is applied between the pair of electrodes so that radio waves flow between the electrodes only through the micropores, and a water pressure difference is applied between the liquid separated by the insulating wall, causing particles to flow together with the liquid through the micropores. At this time, if the micropore diameter is appropriately selected relative to the particle diameter, a current change proportional to the volume of the flowing particles will occur between the electrodes. The particle size of the measurement particles is determined from the particle detection signal indicating the current change.

The particle detection signal obtained as described above is A/D (analog/digital) converted in the particle detection signal processing device according to the present invention, and is input to the analysis device as analysis data. In the analyzer, the analysis data is processed by a microcomputer or the like, and the processing results, such as particle size distribution information, are output to a particle size recording device or the like.

Information processing in which multiple analog signals such as pressure and temperature are subjected to analog multiplex processing, the processed signals are A/D converted, and the data is input into a computer is well known. Such processing of a plurality of high-frequency analog signals has not yet been generally performed. Physical quantities such as pressure, temperature, and light used to monitor the operating status of a device or facility or the surrounding environment generally do not change rapidly on a second-by-second basis. Therefore, the computer calculates the physical quantity A/
D conversion can be commanded and the data can be imported into a computer. However, when attempting to obtain, for example, particle size distribution information from a particle detection signal, it is necessary to detect the peak of the particle detection signal in real time, hold the peak value, and perform A/D conversion. The timing for A/D converting the particle detection signal is the time when its peak is detected, and cannot be set at an arbitrary time point like when analog signals such as pressure, temperature, and light are A/D converted.

For these reasons, it is difficult to time-divide and A/D convert multiple types of particle detection signals that are input simultaneously.

[Problem that the invention seeks to solve]

Therefore, when analyzing multiple types of particles, conventionally a high-speed A/D converter is individually provided for each input particle detection signal, and the converted data is individually sent to the analyzer. Store in the provided memory. Further, the converted data is given to the memory as an address, and each time the contents of the address are read, an increment process is performed to add +1 to obtain particle size distribution data on the memory. To perform such processing, multiple controllers are required to control access to each A/D converter and each memory.
PROM that stores the CPU and its processing programs
etc. are required. Therefore, as the number of types of particles to be treated increases, the number of components increases and the cost increases.

An object of the present invention is to provide a particle detection signal processing device that can input a plurality of types of particle detection signals and process them remotely with an inexpensive configuration.

[Means for solving problems]

The present invention provides a plurality of peak detection means for individually inputting a plurality of different types of particle detection signals having peaks corresponding to particle sizes and detecting the peaks; a plurality of peak value holding means each inputted individually and holding the peak value in response to a peak detection signal from the plurality of peak detection means; a plurality of analog/digital conversion means for converting the peak value into a digital value; and a conversion for deriving a selection signal for selectively processing the conversion output operation of the plurality of analog/digital conversion means in a predetermined priority order. The apparatus includes an output selection means, and an output selection means for sorting and outputting the conversion data of the analog/digital conversion means according to particle type based on the selection signal.

[Effect]

According to this invention, the peaks of a plurality of types of particle detection signals are individually detected by the plurality of peak detection means, and the peaks of the particles are detected by the peak value holding means to which each particle detection signal is individually applied. The peak value of the detection signal is held, and the peak value is converted into a digital value by an analog/digital conversion means provided individually in each peak value holding main stage, and converted in a predetermined priority order by a conversion output selection means. The conversion output operation of the analog/digital conversion means that has completed its operation is selected, the conversion data of the selected analog/digital conversion means is given to the output selection means, and the output selection means outputs the conversion data from the conversion output selection means. By distributing and outputting the selection signals according to particle type, even if the number of particle types to be processed increases, the increase in the number of constituent elements will be reduced compared to conventional methods, and processing can be performed further away. can.

〔Example〕

An embodiment of the present invention will be described based on FIGS. 1 and 2. FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a timing chart for explaining its operation.

Each particle detection signal S1, S2, S3 having a peak corresponding to the particle size is input to sample hold circuits 1, 2, 3, which are peak value holding means, respectively, and is also input to peak detection means 4, 5,
6 are also input respectively.

When a peak is detected by each peak detection means 4-6, peak detection signals HLD1-HLD3 are derived. The sample and hold circuits 1 to 3 to which the peak detection signals HLD1 to HLD3 are input hold the peak values of the particle detection signals S1 to S3. The held peak value signals SH1 to SH3 are given to A/D converters 7 to 9, and peak detection signals HLD1 to
A/D conversion is started by input to HLD3.

Each element constituting the conversion output selection means HS will be described below. When the A/D conversion of peak value signals SH1 to SH3 is completed, each A/D conversion is 7 to 9.
Conversion completion signals RDY1 to RDY indicating completion from
3 is output to each data ready flag 10-12. The conversion completion signals RDY1 to RDY3 are shown in Fig. 21.
As shown in 3, it is a high level signal.

Data ready flags 10 to 12 set data ready flags when conversion completion signals RDY1 to RDY3 are input, and output conversion operation prohibition signals A to C that prohibit the next conversion operation of A/D converters 7 to 9. is considered to be a high level. Conversion operation prohibition signals A to C are the second
4 to 6, and during its high level, the A/D
The next A/D conversion operation of converters 7-9 is prohibited.

On the other hand, the conversion operation inhibition signals A to C are also applied to the latch circuit 13. The output of this particle detection signal processing device is given to the analyzer AN, but since the memory that stores the analysis data is accessed using a dual port method, the CPU included in the analyzer AN is
Priority is given to access from When the access is given priority, the second
A memory access signal as shown in FIG. 7 is provided. During the low level period, memory is being accessed. The latch circuit 13 receives input conversion output inhibition signals A to C and a memory access signal.
Signals R0 to R3 indicating predetermined priorities are derived based on the CPU. In this embodiment, the signal R0 corresponding to the memory access signal is given first priority, the signal R1 corresponding to signal A is given second priority, and the signal R2 corresponding to signal B is given third priority. Signals R0-R3 are shown in FIGS. 8-11.

Priority encoder 1 to which signals R0 to R3 are input
4, identification codes CD0 to CD that identify particle detection signals S1 to S3 based on their input levels.
2 to the decoder 15. identification code signal
CD0-CD1 are shown in FIGS. 12 and 13. This identification code signal is converted by the decoder 15 into selection signals 1 to 3 shown in FIGS. 14 to 16.

In each of the A/D converters 7 to 9, when each input selection signal 1 to 3 becomes low level, the converted data is outputted to a data selector DS serving as an output selection means. The data selector DS converts the A/D converters 7 to 7 at each level of the input selection signals 1 to 3.
Select the conversion data given from 9 and distribute the output.

The selection signals 1 to 3 are also applied to the NAND gate 16 and inputted to the time flag circuit 17 as the signal E shown in FIG. 17. When the time flag circuit 17 receives the signal E, the time flag circuit 17 operates as shown in FIG.
As shown in FIG. 2, a signal G which becomes high level with a delay of one clock pulse is derived. The high level period of this signal G indicates the increment processing period of the analysis data stored in the memory of the analyzer AN. When this input signal G becomes high level, the data selector DS replaces the address from the CPU of the analyzer AN and outputs the A/D conversion data and particle identification code as a memory address.

The time flag circuit 18 to which the signal G is input is
At the rising edge of the signal G, a signal H as shown in FIG. 2 is output to the shift register 19. When the shift register 22 receives the signal H, it first outputs a read signal via the gate circuit 20.
In the spectrometer AN, the analysis data stored in the memory is read out in response to this readout signal. The shift register 19 outputs a write signal to the analyzer AN via the gate circuit 21 at the timing when the analysis data is read and the increment process ends. The readout signal is shown in FIG. 20,
The write signal is shown in FIG. 21. The shift register 19 also outputs a signal I shown in FIG. 22 for resetting the signal H to the time flag circuit 18, and outputs a reset signal RST when the increment process is completed in the analyzer AN.
As shown in FIG. 23, when this reset signal is input to the latch circuit 13, the holding operation is released.
Outputs A to C of data ready flags 10 to 12 again
sampling begins.

The reset signal is sent to the flag reset circuit 2.
2 is also given. The flag reset circuit 22
OR gates 22a to 22c and AND gate 22
It is composed of d to 22f. OR gate 22a
~22c has a reset signal RST and a selection signal E.
1 to E3 are given, AND gates 22d to 22
The outputs of the OR gates 22a to 22c and the measurement control signals C1 to C3 instructing the start/stop of particle counting from the analyzer AN are given to f. During the period when the output levels of the counting control signals C1 to C3 shown in FIGS. 24 to 26 are at a high level, conversion data is supplied from the particle detection signal processing device to the analyzer AN, and particles are counted. Counting control signal C
When counting is completed by setting 1 to C3 to low level,
The analysis data stored in the memory is accessed by the CPU in the analyzer AN. When particle counting is stopped and the increment process is completed, the flags of the peak detection flag circuits 10 to 12 are individually reset by the output signal of the flag set circuit 22, and the conversion operation inhibition signals A to C become low level.

The operation of the latch circuit 13 is based on the clock signal CLK shown in FIG. 27 outputted from the clock signal generator and the output signal G of the time flag circuit 17.
This is done in synchronization with the output signal CK of the AND gate 25 shown in FIG. 28 to which is input.

The data selector DS selects the applied converted data using selection signals 1 to 3, and provides the converted data as a lower address in the memory of the analyzer AN. Further, the particle identification code is given as an upper address of the memory, and the storage area of the memory is divided according to the type of particle according to the upper address. During the counting period, the analyzer AN accumulates analysis data for each type of particle based on the converted data from the particle detection signal processing device, and when counting is completed, creates a particle size distribution map based on the analysis data.

In the above embodiment, the data selector DS selects A/
The converted data output from the D converters 7 to 9 is sorted by type using the selection signals 1 to 3 and given as lower addresses to the memory of the analyzer AN. No memory required. Therefore, the analyzer
The AN configuration does not become complicated, making it small and inexpensive.

〔Effect of the invention〕

According to this invention, even if the number of types of particles to be processed increases, analog/digital conversion of multiple types of particle detection signals can be performed remotely with a simple configuration, and the converted data can be output for each type of particle. can do.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a timing chart for explaining the operation of the embodiment of the invention. 1-3...Sample hold circuit (peak value holding means), 4-6...Peak detection means, 7-9...
...A/D converter (analog/digital conversion means),
10-12...Data ready flag, 13...Latch circuit, 14...Priority encoder, 15...Decoder, DS...Data selector (output selection means), HS...Conversion output selection means, AN...Analyzer , S1 to S3...particle detection signals.

Claims (1)

[Claims] 1 A plurality of peak detection means for individually inputting a plurality of different types of particle detection signals having peaks corresponding to particle sizes and detecting the peaks; a plurality of peak value holding means for holding the peak values in response to peak detection signals from the plurality of peak detection means; A plurality of analog/digital conversion means for converting values into digital values, and a conversion output selection means for deriving a selection signal for selectively processing the conversion output operations of the plurality of analog/digital conversion means in a predetermined priority order. and output selection means for sorting and outputting the conversion data of the analog/digital conversion means according to particle type based on the selection signal.