JPH05211593A - Printer - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a printing device that efficiently outputs image data having a plurality of resolutions while maintaining quality by generating output images by pseudoly changing the resolution. With the goal. [Structure] A printing apparatus having a constant print dot density is provided with an image generation unit that pseudo-changes the resolution according to the resolution of print information to generate an output image.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printing apparatus for recording an image having a plurality of resolutions, particularly an image including a text or the like.

[0002]

2. Description of the Related Art Conventionally, the quality of an output image of a printing apparatus of this type is automatically determined by the printing dot density of the printing apparatus itself. Therefore, when outputting image data having a plurality of resolutions, the print dot density of the output image data must be the same. For example, when outputting an image including text data and image data such as binarization which requires gradation expression, text data and image data are output with the same print dot density.

[0003]

However, in a printing apparatus in which the printing dot density is suitable for text data output, the image quality is degraded in the image data area requiring high resolution. On the other hand, in a printing apparatus whose printing dot density is suitable for image data output, the processing time of text data increases due to the increase in the number of pixels due to high resolution, and a large-capacity font memory, bit map memory, etc. There was a drawback that it was necessary.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a printing apparatus which efficiently outputs image data having a plurality of resolutions while maintaining the quality.

[0005]

In order to achieve the above-mentioned object, a printing apparatus of the present invention is a printing apparatus having a constant printing dot density, and the printing apparatus according to the resolution of output printing information.
An image generation unit that generates an output image whose resolution is changed in a pseudo manner is provided.

Further, the printing apparatus of the present invention is a printing apparatus having a constant printing dot density, and means for dividing an output printing area of one page into a plurality of printing areas each having a different resolution, and the plurality of printing areas. Image generating means for generating an output image in which the resolution is pseudo-changed in accordance with the resolution for the print area, and control means for printing the image generated by the image generating means for each print area. Equipped with.

In the printing apparatus configured as described above, when printing a low-resolution image, for example, text data, the pixels are enlarged according to the resolution of only the low-resolution print output area, The print dot density is reduced artificially.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing a schematic configuration diagram of a printing apparatus of this embodiment. In the figure, 101 indicates the entire printing apparatus. Reference numeral 102 denotes a print control unit that generates a print image in the printing apparatus and controls a printing operation. Reference numeral 103 denotes a host computer interface that is connected to the host computer and receives a print control command and print code data.
A page buffer memory 4 stores the above command and code data and further edits the data for each page.
5 is a CGROM storing a character pattern, 106 and 107 are bit map memories for storing the generated image dot pattern, and 106 is a bit map memory A for storing text images such as characters, and 107 is an image image. This is a Bitmap memory B.

Reference numeral 108 denotes a printer interface, which performs processing such as transmission of print image data and commands for controlling printing operations to the printing section 113, reception of the status of the printing section 113, and the like. 109 is a CPU that controls the image generation operation of the print control unit 102, 110 is a RAM that is a work area of the CPU 109, 111 is a program ROM in which the program of the CPU 109 is stored, 112 is a CPU of 109 and 1
A system bus that connects the respective units 03 to 111, and a printing unit 113 that prints out.

FIG. 2 shows the text data in this embodiment.
1 is a schematic representation of one dot of a printing unit of data and image data. This printing unit corresponds to one bit in the bit map memory. In this way, the text data and the image data are different print units. FIG. 2 (a) shows 1 of the print unit of text data.
It shows the dots. When printing text data, one dot is composed of 4 pixels in the printing section. That is, the text data is printed with the dot density of the printing device being halved. FIG. 2B shows one dot of the printing unit of the image data. When printing image data, 1 dot is 1 in the printing section.
It is composed of pixels.

FIG. 3 shows the timing of the video signal (VIDEO signal) for realizing the print output as shown in FIG. 2. FIG. 3 (a) shows the text data output such as characters. 3B shows the output waveform of the image data such as an image. The data m-1 to m + 1 and the data n- in (a) and (b) of FIG.
Reference numerals 1 to n + 2 are a part of data for one scan of print data, and VIDEO CLKA and B are timing clocks for outputting the respective data.

VIDEO CLKA in FIG. 3 (a) is an image clock at the time of outputting text data such as characters, and is twice as long as the timing clock VIDEO CLKB at the time of outputting image data in FIG. 3 (b). Have. By setting the frequency of the image clock VIDEO CLKA to one half of the VIDEO CLKB at the time of outputting the image data, the width of the print pixel is set in the main scanning direction as shown in (a) of FIG. It can be doubled. Further, in FIG. 3A, the output data for each scanning is the data m-
1, data m-1, data m, data m, data m +
1, data m + 1 are output in this order. By scanning the same data twice each time, as shown in FIG.
As described above, the print pixel width in the sub-scanning direction is doubled.

In FIG. 3B, VIDEO CLK
In synchronization with B, different data, data n-1, data n, data n + 1, and data n + 2, are output for each scan. With such a timing configuration, it is possible to configure the printing unit as shown in FIG. 2 in each of the text image output and the image data output.

FIG. 4 is an explanatory diagram of a print area for one page, a low resolution area for printing text data and the like, and a high resolution area for printing image data. In the figure, 401 is an image print area, 402 is a high resolution area for printing at high resolution, 403 is a low resolution area for printing at low resolution, and 402.
The print area is other than the high resolution area. 404 is the start position of the high resolution area in the main scanning direction, 405 is the end position of the high resolution area in the main scanning direction, 406 is the start position of the high resolution area in the sub scanning direction, and 407 is the end of the high resolution area in the sub scanning direction. The position.

FIG. 5 is a circuit block diagram of the printer interface section of the present embodiment.
It corresponds to 08. In the figure, 501 is an address bus, 502
Is a data bus, and the address bus 501 and the data bus 502 configure the system bus 112 in FIG. 5
A DMA controller A 03 DMAs print data such as text from the bit map memory A 106 in FIG.
Controls the transfer. A DMA controller B 504 controls the DMA transfer of the image print data from the bit map memory B 107 in FIG. Fifty
A sequencer / timing controller 5 controls the timing of the printing operation in accordance with the printing sequence and controls each part of the printer interface. Fifty
Reference numeral 6 is an oscillation circuit for outputting a clock that is a base of a VIDEO clock or the like. Reference numeral 507 is a parallel-serial converter A and a data bus 502.
Holds parallel data DMA-transferred through
The serial data is output in synchronization with the clock A of 28. A parallel-serial converter B 508 holds the parallel data DMA-transferred through the data bus 502 and stores 529
The serial data is output in synchronization with the clock B.

Reference numeral 509 denotes a main scanning start register, which sets the start position 404 of the high resolution area in the main scanning direction to the data bus 502.
Receive and hold through. A main scanning end register 510 receives the end position 405 of the high resolution area in the main scanning direction through the data bus 502 and holds it. 511
A main scanning direction start comparator compares the value of the main scanning counter 513 with the value held in the main scanning start register 509, and outputs a signal when the latter is smaller than or equal to the former. Reference numeral 512 denotes a main scanning end comparator,
The value of the main scanning counter 13 is compared with the value held in the main scanning end register 510, and a signal is output when the latter is larger than the former. 513 is a main scanning counter,
It is counted by CLKB of 9 and holds the current position data in the main scanning direction, that is, the number of pixels output in the main scanning direction in one line. The number of pixels here is converted into the number of pixels in the high resolution region. When the main scanning counter 513 finishes counting the printing area, it stops counting and outputs the END signal to the sequencer / timing controller 505. With such a configuration, when the main scanning direction of the current position is in the main scanning direction of the high resolution area, a signal is output from the AND gate 521.

Reference numeral 514 is a sub-scanning start register, which sets the start position 406 of the high resolution area in the sub-scanning direction to the data bus 502.
Receive and hold through. A sub-scan end register 515 receives the end position 407 of the high resolution area in the sub-scan direction through the data bus 502 and holds it. 516
A sub-scanning direction start comparator compares the value of the sub-scanning counter 518 with the value held in the sub-scanning start register of 514, and outputs a signal when the latter is smaller than or equal to the former. Reference numeral 517 is a sub-scan end comparator, and
The value of the 18th sub-scanning counter is compared with the value held in the sub-scanning register 515, and a signal is output when the latter is larger than the former. A sub-scanning counter 518 is counted by the CLK signal output from the 505 for each scanning, and holds the current position data in the sub-scanning direction, that is, the number of output main scanning lines. The sub-scanning counter 518 stops counting when it finishes counting the printing area,
The D signal is output to the sequencer / timing controller 505. According to such a configuration, when the sub-scanning direction of the current position exists in the sub-scanning direction of the high resolution area,
A signal is output from the AND gate 522.

Therefore, the AND gate 521 and the AND gate
AND gate 523 which takes the logical product of the output signals of gate 522
Is output to the resolution selector 519 when the current position is within the high resolution area. 519
The resolution selector selects the DMA controllers A and B and the parallel-serial converters A and B based on the signal indicating the high resolution area input from the AND gate 523, and outputs select signals 530 to 533. That is, in the high resolution area, a signal for selecting the DMA controller B and the parallel-serial converter B is output.

Reference numeral 520 is an OR gate for ORing the low resolution video data and the high resolution video data output from the parallel-serial converters A and B of 507 and 508. 524
Is a horizontal synchronizing signal indicating the timing of sending the video data received from the printing unit 113 in FIG. 525 is 5
The video signal synthesized in step 20 is printed by the printing unit 1 in FIG.
It is sent to 13 and printed. Reference numerals 526 and 527 denote a DMA request signal A and a DMA request signal B, respectively, which send a DMA start request to the CPU 109 in FIG.

Reference numerals 528 and 529 denote VIDEO CLKA, respectively.
And VIDEO CLKB, and as described with reference to FIG. 3, VIDEO CLKB for high resolution printing has twice the frequency of VIDEO CLKA. The data subjected to the parallel-serial conversion by the parallel-serial converters A and B is output to the printing section in synchronization with the VIDEO CLK signal. 530 to 533 are select signals output from the resolution selector of 519, and 530 is 5
A signal for selecting the parallel-serial converter A of 07, 531 is 50
A signal for selecting the parallel-serial converter B of 8;
Signal for selecting the DMA controller B of 533 is 50
3 is a signal for selecting the DMA controller A.

An actual operation example of this embodiment will be described below with reference to FIGS. 1 and 5. First, when the host computer interface 103 receives print data from a host computer (not shown), the CPU 10
Reference numeral 9 controls the host computer interface 103 to transfer the received print data to the page buffer memory 104.
Transfer to and store. At this time, the control program of the CPU 109 is held in the ROM 111. This reception process is performed each time the host computer interface 103 receives data until one page of data is stored in the page buffer memory 104.

When one page of data is stored in the page buffer memory 104, the CPU 109 reads the stored data, interprets the control command in the data, and if it is text data such as characters. The print data for one page is edited on the page buffer memory 104 according to a predetermined format. At the same time, the CPU 109
Reads the edited print data of one page one after another, selects fonts from the CG ROM 105 based on the character code, the font style specified by the control command, the size of the character, etc., and outputs the bit map memory A 106. While the process of expanding the character as a dot pattern at the above predetermined position is performed, when the print data is judged to be the image data to be printed at high resolution in the interpretation of the control command, the data is 107. It is directly transferred to a predetermined position on the bit map memory B.

When the expansion for one page is completed, the CPU calculates the size of the high resolution area and sets the high resolution printing area in the printer interface unit 108.
That is, for the main scan start register 509, main scan end register 510, sub scan start register 514, and sub scan end register 515 in FIG.
Set the bottom, left, and right positions. These settings are made through the data bus 502 in the system bus 112.
Further, the CPU 109 sets the start address of the print data of the 106 bit map memory A in which the text data is expanded in the DMA controller A of 503 and the start address of the image data in the DMA controller B of 504. This setting is also carried out through the data bus 502.

After completion of these setting processes, the CPU 109
Issues a print start command to the sequencer / timing controller 505 through the data bus 502. Upon receiving the print start command, the sequencer / timing controller 505 sends a DMA enable signal DMAEN to the DMA controllers A and B of 503 and 504. Then, the resolution selector 5 of the two DMA controllers
The one selected by 19 is activated, and from the bit map memory A of 106 in the case of low resolution printing, from the bit map memory B of 107 in the case of high resolution printing, 507 by DMA transfer, respectively. , 508, the print data is loaded into the parallel-serial converters A and B.

Next, the sequencer / timing controller 505 sends the vertical synchronizing signal 53 to the printing unit 113.
Issue 4. Upon receiving the vertical synchronization signal 534, the printing unit 113 rotates the paper transport motor, and when the paper is fed to the print start position, outputs the horizontal synchronization signal 524 to the sequencer / timing controller 505. The sequencer / timing controller 505 displays the horizontal sync signal 52.
4 is received, the clock input from the oscillation circuit 506 is divided, and 528 and 529 VIDEO CLKA, VIDE
Generate O CLKB. The main scanning counter 513 is
Start counting based on VIDEO CLKB.

In the initial state, the DMA controller A 503 and the parallel-serial converter A 507 are selected by the resolution selector 519, except when the high-resolution printing area overlaps the beginning of the printing area. 528 VIDEO CLKA is input to the parallel-serial converter A, and DMA
The print data loaded in the parallel-serial converter A by the transfer is output in synchronization with the VIDEO CLKA signal. The output print data is sent to the printing unit 113 as a VIDEO signal 525 and printed by the OR gate 520. At this time, the other input of the OR gate 520, in other words, the output signal of the parallel-serial converter B508 cannot exist.

At the same time, the sequencer / timing controller 505 causes the DMAEN signal to be generated by an internal timing circuit. Then, the DMA controller selected by the resolution selector 519 issues the address of the necessary data to the address bus 501 and successively loads the corresponding parallel-serial converter with the data by DMA transfer.

On the other hand, the sequencer / timing controller 505 outputs the CLK signal to the sub-scanning counter 518 when the main scanning counter 513 detects the generation of the END signal indicating the end of one scanning. The sub-scanning counter 518 counts the number of scanning lines by this CLK signal, and when the predetermined count for the printing area is completed, outputs the END signal to the sequencer / timing controller 505.

In this embodiment, the values of the main scan counter 513 of the main scan start comparator 511 and the main scan end comparator 512 are the main scan start register 5 respectively.
When the value is equal to or larger than the value set in 09 or smaller than the value set in the main scanning end register 510, the signal is output. This signal is AND gate 5
21 and the AND gate 521 outputs a signal only when the above two conditions are simultaneously satisfied. That is, the AND gate 521 outputs a signal only when the current position is in the high-resolution printing state in the main scanning direction.

Similarly, the sub-scanning start comparator 5
16 and the sub-scanning end comparator 517 respectively output signals when the value of the sub-scanning counter 518 is greater than or equal to the value set in the sub-scanning start register 514 or less than the value set in the sub-scanning end register 515. ..
This signal is input to the AND gate 522, and the AND gate 522 outputs a signal only when the above two conditions are satisfied at the same time. That is, the AND gate 52 is provided only when the current position is in the high-resolution printing state in the sub-scanning direction.
2 outputs a signal. The outputs of the AND gate 521 and the AND gate 522 are connected to the AND gate 523, and when the high resolution printing state in the main scanning direction and the high resolution printing state in the sub scanning direction are also performed, AND
Gate 523 produces an output signal.

The resolution selector 519 has an AND gate 5
When a signal is input to the resolution selector 519 from 23,
The selection signal 531 of the parallel-serial converter B and the selection signal 532 of the DMA controller B are output. On the other hand, when no signal is input from the AND gate 523, the selection signal 530 of the parallel-serial converter A and the selection signal 533 of the DMA controller A are output. In this way, the switching process between low resolution printing and high resolution printing is performed.

When high resolution printing is selected by the resolution selector 519, the DMA controller B 504 and the parallel-serial converter B 508 are selected, and the DMA controller B 504 synchronizes with the DMAEN signal from the sequencer / timing controller 505. To the DMA request signal B527. At the same time, the address of the bit map memory B107 in which the print data is stored is output to the address bus 501, and the print data is output from the bit map memory B107 to the parallel-serial converter B50.
8 via DMA transfer. Then, the print data loaded in the parallel-serial converter B 508 is VIDE output from the sequencer / timing controller 505.
It is output in synchronization with the O CLKB signal.

The output print data is OR gate 520.
After that, it is sent to the printing unit 113 as a VIDEO signal 525 and printed. At this time, the other input of the OR gate 520, in other words, the output signal of the parallel-serial converter A507 cannot exist. At the same time, the sequencer / timing controller 505 outputs the DMAEN signal at an appropriate timing to activate the DMA controller B504, and successively performs a process of loading print data to the parallel-serial converter B508.

As described above, in the area outside the high resolution printing area, the data on the 106 bit map memory A is synchronized with the image clock of the double cycle by using the DMA controller A 503 and the parallel-serial converter A 507. To print. At this time, the DMA controller A 503 controls the address output so that the same data is transferred every two scans. On the other hand, in the high resolution print area, the DMA controller B504 and the parallel-serial converter B508 are used to
The data on the bit map memory B is printed in synchronization with the image clock of the normal cycle. Such a printing process is
When the END signal is input from the sub-scanning counter 518 to the sequencer / timing controller 505, the process ends.

FIG. 6 is a flow chart showing the flow of processing of the CPU in this embodiment. The CPU inputs the data from the host computer in step S1, analyzes the print command in the data in step S2, and branches to step S11 if the data is image data requiring high resolution printing. Then, the image data is transferred to the bit map memory B. On the other hand, if the image data is other than the image data, the process proceeds to step S4 to store the data in the page buffer memory. In step S5, it is determined whether or not the processing for one page has been completed, and if not completed, the processing returns to step S1 and the above processing is repeated.

On the other hand, if the processing for one page is completed, the data on the page buffer memory is page-edited in step S6, and the data is stored in the page buffer memory in step S7. The data for the page is dot-developed on the bit map memory A while referring to the CGROM.
When the transfer of characters is completed, the area data is set in the high resolution area start register and the high resolution area end register in step S8, and the DMA controller A,
The start addresses of the bit map memory A and bit map memory B of the respective data are set in the DMA controller B, and a command to start the sequencer / timing controller is issued in step S10 to start the data output process to the printing section. To do. The printing process for one page is executed based on such a series of sequences. The output processing of data to the printing unit is as described above.

<Second Embodiment> FIGS. 7 to 9 are views showing a second embodiment of the present invention. In the first embodiment, only one area can be set as the high resolution area, whereas in the second embodiment, a plurality of high resolution areas can be set.

FIG. 7 is a block diagram showing an area designation unit which is a constituent element of the second embodiment.
Is a data bus connected to the CPU 109, and 709 is a main scanning direction area start register n for setting the start position of the n-th designated area. A main scanning direction end register 710 sets an end position in the main scanning direction of the n-th designated area.
Reference numeral 711 is a comparator for detecting the start of the area in the main scanning direction, which compares the output of the main scanning counter 513 with the value set in the main scanning start register n709, and outputs a signal when the counter output is larger or equal. Reference numeral 712 denotes a main scanning direction area end comparator n, which is a main scanning counter 513.
Is compared with the value set in the main scanning area end register n710, and a signal is output when the counter output is smaller.

A sub-scanning direction region start register n 714 determines the start position of the n-th designated region. A sub-scanning direction area end register n 715 sets the ending position in the sub-scanning direction of the n-th designated area. A sub-scanning direction start comparator n 716 compares the output of the sub-scanning counter 518 with the value of the sub-scanning start register n714, and outputs a signal when the counter output is larger or equal. A sub-scanning direction end comparator n 717 compares the output of the sub-scanning counter 518 with the value set in the sub-scanning end register n715, and outputs a signal when the counter output is smaller.

Reference numerals 721 to 723 denote four comparators 71.
An AND gate which takes a logical product of 1, 712, 716 and 717, and 724 is an enable signal ENn input to the AND gate 723. According to such a configuration, the EN
A signal is output from the AND gate 723 only when the n signal 724 is input from the outside and the printing state of the printing device exists in the area designated by the area designation unit.

FIG. 8 shows an area selection block in the second embodiment. As shown in FIG. 8, the area selection block is composed of a plurality of area designation units. In the figure, 801 is an output signal from the main scanning counter 513, 802 is an output signal from the sub-scanning counter 518, and 8
Reference numerals 03 to 805 are the area designating units 1, 2, and n shown in FIG. 7, respectively. Reference numeral 806 is an OR gate that takes the logical sum of the output signals of the area designating units and is output to the resolution selector 519. 807 to 809 are enable signals EN1 for enabling the respective area designating units.
~ ENn.

In the second embodiment, the main scan start register 509, the main scan end register 510, the main scan start comparator 511 and the main scan end comparator 51 shown in FIG.
2, sub-scan start register 514, sub-scan end register 5
15, sub-scan start comparator 516, sub-scan end comparator 517, AND gates 521, 522, 523
The area designating circuit composed of is replaced by the area selecting block shown in FIG. Further, the enable signals of EN1 to ENn in FIGS. 807 to 809 shown in FIG.
The CPU 109 sets enable signals EN1 to ENn through the data bus 502.

With this structure, it is possible to set a plurality of areas in each area designating unit, and at the same time, select only some of the plurality of area designating units by setting the enable signal. It has the flexibility to be able to. That is, only the area designating unit to which the enable signal is output is set as the high resolution area. Further, when printing the inside of the area set by a plurality of area designation units, a signal is output from the area selection block of FIG. 8 to the resolution selector. The second embodiment operates similarly to the first embodiment except that a plurality of areas can be set.

FIG. 9 is an explanatory view showing a method of designating an area in the second embodiment. In the figure, reference numeral 901 denotes a print area of one page, and reference numerals 902 to 906 denote a plurality of set high resolution areas 1 to n. Also, 407, 408, 40
Reference numerals 9 and 410 respectively indicate a main scanning direction start position, a main scanning direction end position, a sub scanning direction start position, and a sub scanning direction end position for the region n. These area positions are set for each area.

According to the second embodiment as described above, a plurality of high resolution areas can be set in the printing area, and a configuration in which these areas overlap each other is also possible. Also, by combining a plurality of designated areas, it is possible to realize printing of areas having irregular shapes at different resolutions. In the second embodiment, the structure having the enable signal for the purpose of providing flexibility is explained, but the enable signal may be omitted for the purpose of a simpler structure. ..

Furthermore, in both the first and second embodiments, the structure in which the high resolution region is embedded in the low resolution region has been described, but the present invention is limited to such a structure. However, it is possible to deal with any configuration including a low resolution area and a high resolution area.

[0047]

According to the present invention, it is possible to provide a printing apparatus that efficiently outputs image data having a plurality of resolutions. That is, by forming image data having a plurality of resolutions at different resolutions in a pseudo manner and printing the image data, it is possible to print data such as text data such as text documents, which does not originally require extremely high-definition printing, and photographs. Data that requires high-definition printing, such as binary data, can be efficiently printed at an appropriate resolution.

Therefore, it is possible to perform high-quality printing as compared with the case of using a low-resolution printing apparatus, while it is possible to process image data at a higher speed than a high-resolution printing apparatus, and at the same time, to use a font memory or a bit map memory. It is possible to reduce the capacity.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration diagram of a printing apparatus according to this embodiment,

FIG. 2 is a schematic diagram illustrating one dot of a printing unit according to the present embodiment,

FIG. 3 is a diagram showing timings of a VIDEO signal and a VIDEO CLK signal of this embodiment,

FIG. 4 is an explanatory diagram illustrating a print area, a low resolution area, and a high resolution area;

FIG. 5 is a circuit block diagram of a printer interface unit according to the present embodiment,

FIG. 6 is a flow chart showing a processing flow of the CPU of the present embodiment,

FIG. 7 is a block diagram showing an area designating unit which is a component of the second embodiment;

FIG. 8 is a block diagram showing a region selection block of the second embodiment,

FIG. 9 is an explanatory diagram illustrating a print area, a low resolution area, and a high resolution area according to the second embodiment.

[Explanation of symbols]

 101 ... Printing device 102 ... Print control device 103 ... Host interface 104 ... Page buffer memory 105 ... CGROM 106 ... Bitmap memory A 107 ... Bitmap memory B 108 ... Printer interface 109 ... CPU 110 ... RAM 111 ... Program ROM 112 ... System bus 113 ... Printing section

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical display location B41J 2/485 G06F 3/12 L 8323-5B G06K 15/00 8804-2C B41J 3/12 G

Claims (2)

[Claims] 1. A printing apparatus having a constant printing dot density, comprising: an image generation unit that pseudo-changes the resolution according to the resolution of print information to generate an output image. 2. A printing apparatus having a constant printing dot density, a unit for dividing an output printing area of one page into a plurality of printing areas having different resolutions, and a resolution for each of the plurality of printing areas. A printing apparatus comprising: an image generation unit that generates an output image whose resolution is changed in a pseudo manner; and a control unit that prints the image generated by the image generation unit for each of the print areas. ..