JPH0521509A - Semiconductor device, mounting body thereof, and mounting method - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device for wireless bonding which can be tested by using a probe even after bonding is performed. CONSTITUTION:A hole for forming a bonding pad is opened through a substrate 2 and a metallic layer 8 is buried in the hole through an interlayer insulating film 6. Metallic wiring 12 connects an element on the substrate 2 with the metallic layer 8 buried in the hole. The metallic wiring 12 is exposed on the surface side of the substrate 2 and a bump 20 is formed on the metallic layer 8 on the rear side. The wiring 12 is directly connected to leads through the bump 20.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting body on which a semiconductor device chip having an integrated circuit device is mounted by a wireless bonding method, a semiconductor device chip suitable for the mounting body, and a mounting method.

[0002]

2. Description of the Related Art As a wireless bonding method, a flip chip method, a beam lead method and a tape carrier method are known. These are all face-down bonding methods, and it is not possible to test only the semiconductor device chip after bonding.

[0003]

SUMMARY OF THE INVENTION A first object of the present invention is to provide a semiconductor device which can be bonded by a wireless bonding method and which can test a conductor chip using a prober even after bonding. That is. A second object of the present invention is to provide a mounting body on which such a semiconductor device is mounted. A third object of the present invention is to provide a mounting method for mounting such a semiconductor device.

[0004]

The semiconductor device of the present invention comprises:
In the bonding pad portion of the semiconductor substrate on which the element is formed, a hole penetrating from the front surface side to the back surface side of the substrate is provided.A metal layer is embedded in this hole, and the element of the substrate is The metal of the bonding pad portion is exposed on the front surface side while being connected to the metal layer, and the bump is formed on the bonding pad portion on the back surface side. The mounting body of the present invention is one in which the chip of the semiconductor device is connected to a lead provided on an insulating substrate via a bump on the back surface side, and the portion to which the semiconductor device chip is connected is sealed with a lid. Is. According to the mounting method of the present invention, the bumps on the back surface side of the semiconductor device chip are positioned on the insulating substrate, and the portions without bumps on the back surface of the semiconductor device chip are die-bonded to the insulating substrate, and the bumps are provided on the insulating substrate. The semiconductor device chip is sealed by covering the insulating substrate with a lid by directly connecting to the lead. The mounting body of the present invention can be applied to a ceramic type or a sardip type.

[0005]

1 shows a bonding pad portion of a semiconductor device chip of the present invention. Silicon substrate 2
A semiconductor element such as a MOS transistor is formed in the. A hole for forming a bonding pad is formed in the element isolation region by the field oxide film 4, and an aluminum-based metal such as aluminum or an aluminum alloy containing a slight amount of silicon or the like through the BPSG film 6 of the interlayer insulating film is formed in the hole. The layer 8 is embedded. Further, a metal wiring 12 is formed via the interlayer insulating film 10, and the metal wiring 12 is connected to the element formed on the substrate 2. A metal wiring 12 is connected to the metal layer 8 embedded in the hole, and the element of the substrate and the metal layer 8 are connected via the metal wiring 12. On the front surface side (the side where the metal layer 12 is formed), the metal wiring 12 is exposed at the bonding pad portion, and the passivation film 16 is formed so as to cover the other portion.

On the back side of the substrate 2, the metal layer 8 embedded in the hole is exposed and an insulating film 18 is formed so as to cover at least the vicinity of the hole. Bumps 20 contacting the metal layer 8 are further formed in the holes on the back surface side of the substrate, and the bumps 20 connect to the leads formed on the insulating substrate. As the bump 20, a bump used in the flip chip method or the tape carrier method can be used. The bumps 20 are, for example, solder bumps, gold bumps,
It is an Al bump, an Ag-Sn bump, an Au bump, or the like. The solder bump can be connected to the lead by solder reflow, and the Au bump or the like can be connected to the lead by applying pressure and ultrasonic vibration.

To manufacture this semiconductor device chip, holes are formed in the substrate 2 before the interlayer insulating film 6 is formed. After the second-layer interlayer insulating film 10 is formed, the through holes are formed, and the metal film for the metal wiring 12 is deposited, metal is formed in the holes from the back surface side of the substrate by vapor deposition or sputtering at an appropriate stage. Embed the layer 8. On the back surface side of the substrate, the insulating film 18 is formed after removing the metal film except for the holes.
And the pump 20 is formed.

FIG. 2 shows a mounting body on which a semiconductor chip having the bonding pad of FIG. 1 is mounted. A lead 24 is provided on the ceramic substrate 22, a connecting portion for connecting a chip 26 is provided at the center of the substrate 22, and a recess 28 for die bonding is provided. The chip 26 is placed with the leads 24 and bumps 20 aligned as shown by the dashed lines in FIG.
On the other hand, the chip 26 is recessed 28 by the Ag paste 30.
It is die-bonded to. Bump 2 of chip 26
0 is bonded to the tip of the lead 24. A ceramic lid member 32 is placed on the substrate 20 to seal the chip 26, and a space between the substrate 22 and the lid member 32 is sealed by a low melting point glass 34 or the like.

For mounting on the mounting body shown in FIG. 2, the chip 26 is positioned with respect to the substrate 22 as shown in FIG. The chip 26 is die-bonded to the concave portion of the substrate 22 at the center of the back surface of the chip 26 with the silver paste 30. When the bump 20 is a solder bump, the chip 26 and the lead 24 are heated and reflowed. Bonding is performed by applying pressure and applying ultrasonic vibration. Then, the substrate 22 is covered with the lid member 32 and sealed with low melting point glass or the like. Since the metal wiring 12 is exposed on the surface side of the bonding pad, after bonding the chip 26 to the lead 24 and before sealing with the lid member 32, a probe of a test device is brought into contact with the exposed portion to perform a test. can do.

[0010]

According to the present invention, since the wireless bonding is performed, the mounting body can be made smaller than the wire bonding. Further, as compared with the conventional face-down bonding method such as the flip-chip method, since the pads are present on the front surface side at the same position as the pads to be bonded on the back surface side, the alignment is easy.
Further, the chip test can be performed even after the bonding.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a bonding pad portion of a semiconductor device chip of an embodiment.

FIG. 2 is a cross-sectional view showing a mounting body of an embodiment.

FIG. 3 is a plan view showing an insulating substrate portion in the embodiment of FIG.

[Explanation of symbols]

2 Silicon substrate 8 Metal layer 12 embedded in the hole 12 Metal wiring 16, 18 connecting the metal layer of the hole and the element of the substrate Passivation film 20 Bumps 26 provided on the back side of the hole 26 Semiconductor chip 22 Ceramic substrate 24 Lead 30 Silver paste 32 Lid member

Claims (3)

[Claims] 1. A bonding pad portion of a semiconductor substrate on which an element is formed is provided with a hole penetrating from the front surface side to the back surface side of the substrate. A semiconductor device in which the metal of the bonding pad portion is exposed on the front surface side and is connected to the metal layer of the hole by a wiring, and a bump is formed on the bonding pad portion on the back surface side. 2. A bonding pad portion of a semiconductor substrate on which an element is formed is provided with a hole penetrating from the front surface side to the back surface side of the substrate, and a metal layer is embedded in this hole, and the element of the substrate is a metal. The semiconductor device chip, which is connected to the metal layer of the hole by wiring, has the metal of the bonding pad portion exposed on the front surface side, and has bumps formed on the bonding pad portion on the back surface side, A semiconductor device mounting body, which is connected to a lead provided on an insulating substrate via a bump on the side and the portion to which the semiconductor device chip is connected is sealed with a lid. 3. A bonding pad portion of a semiconductor substrate on which elements are formed is provided with a hole penetrating from the front surface side to the back surface side of the substrate, and a metal layer is embedded in this hole,
A semiconductor device in which an element of the substrate is connected to the metal layer of the hole by a metal wiring, the metal of the bonding pad portion is exposed on the front surface side, and bumps are formed on the bonding pad portion on the back surface side. The bumps on the back side of the chip are positioned on the insulating substrate, and the non-bump portion of the semiconductor device chip backside is die-bonded to the insulating substrate, and the bumps are directly connected to the leads provided on the insulating substrate. A method for mounting a semiconductor device, wherein a lid is placed on a substrate to seal the semiconductor device chip.