JPH0523502B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to a method for recognizing fine patterns;
In particular, the present invention relates to a pattern recognition method that can recognize pattern elements such as pattern dimensions and positions with high accuracy.

[Background technology] In the field of manufacturing technology for semiconductor integrated circuits, fine patterns are formed on objects such as semiconductor wafers using photolithography technology, and it is necessary to appropriately control each process for forming these fine patterns. In order to achieve this, it is necessary to accurately measure pattern elements such as the dimensions and positions of patterns formed in each process to recognize the patterns.

For this reason, in the conventional manufacturing process, patterns for dimension measurement and patterns for position measurement are transferred onto the target object at the same time as the circuit element pattern is formed, and the dimensions and position measurement patterns are A method has been proposed in which the suitability of each process is determined by measuring the position. However, since this type of measurement pattern is no longer needed after the semiconductor integrated circuit is completed, it is preferable that the pattern dimensions be as small as possible, and the transfer position of this measurement pattern is also in the blank area where there is no circuit pattern. It is necessary to place the However, in recent years, as semiconductor integrated circuits have become more highly integrated, circuit patterns have become smaller and smaller, and the margins between circuit patterns have become extremely small. It needs to be extremely small, and it needs to be placed close to the circuit pattern.

By the way, as a method for recognizing this type of pattern, as described in Japanese Patent Application Laid-Open No. 55-34490,
A method has been proposed in which light is scanned along a pattern, a so-called edge signal is detected from light reflected from the edges, etc., and the pattern is recognized based on this edge signal. However, although this method is effective for patterns with a width of several μm,
As mentioned above, when measurement patterns are miniaturized to 1 μm to submicron size and placed in close proximity to other patterns, the conventional method of detecting edge signals and recognizing patterns is no longer possible. It becomes difficult to use it as is.

That is, in this conventional method, edge signals of the measurement pattern and edge signals of other circuit patterns are detected close to each other, so these adjacent signals are mixed up, making it difficult to confirm the edges of the target pattern. This makes it difficult to recognize the pattern. Therefore, in order to use this conventional method, it is necessary to provide a blank area around the measurement pattern that is at least wider than the width of the measurement pattern, usually about 2 to 3 times the width. In practice, it becomes almost impossible to apply this method to objects of 30 degrees.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a method that can accurately measure a fine target pattern that is placed close to other patterns and perform pattern recognition accurately.

Another object of the present invention is to provide a method that can accurately and accurately recognize a target measurement pattern formed together with a circuit pattern in a semiconductor integrated circuit.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

That is, the edge signals of a pattern including the target pattern are detected, the mutual distance between these edge signals is measured to calculate the edge-to-edge dimension, and this edge-to-edge dimension is compared with the edge-to-edge dimension of a preset reference pattern. This is a method to recognize the target pattern by extracting only the edge signals of the target pattern using the microprocessor, and it is possible to recognize the target pattern with high precision and accuracy even when the target pattern is miniaturized and placed close to other patterns. It can be recognized, and it can sufficiently correspond to pattern recognition in highly integrated semiconductor integrated circuits.

〔Example〕

FIG. 1 is a block diagram of an apparatus for carrying out the pattern recognition method of the present invention, and this will be explained first. In the figure, 1 is an apparatus main body, and 2 is a semiconductor wafer as an object on which a target pattern is formed. This semiconductor wafer 2 is placed on an XY table 3, and its planar position is moved and set by an XY drive unit 4.

The device main body 1 is installed above the XY table 3 as an inspection device in a predetermined pattern forming process, and includes an objective lens 5, a pattern detection element 6, a light source 7, a half mirror 8, and the like. The pattern detection element 6 consists of a one-dimensional array of CCDs 6x and 6y (both form a two-dimensional array) oriented in the X direction and the Y direction, respectively, and detects the pattern on the surface of the semiconductor wafer 2 imaged by the objective lens 5. can be detected within the required size range in the Y direction and the X direction.

On the other hand, the pattern detection element 6 has each of the above.
A processing circuit 9 is connected to the CCDs 6x and 6y to capture the signals as pattern signals, and these pattern detection elements 6 and processing circuits 9 constitute a pattern detection section 10, each pattern of the semiconductor wafer 2 in the X direction and the Y direction. Output a signal. This pattern detection section 10 is connected to a comparison circuit 12. A position signal is input to this comparison circuit 12 from the XY drive section 4 of the XY table 3, and the reference data section 1
From 1, a dimension signal of a reference pattern, etc. are input. Further, the comparator circuit 12 includes an arithmetic unit 13.
is attached, and performs a predetermined calculation based on the detection signal, position signal, and reference signal. This calculation result is displayed on the display section 14.

Next, a pattern recognition method using the recognition device having the above configuration will be explained.

First, a target chip formed on a semiconductor wafer 2 is placed on the XY table 3 so as to face the apparatus main body 1, and a target pattern is detected by the apparatus main body 1. In this case, as shown in FIG. 2, the target pattern is formed outside the first process pattern P1 in the shape of a rectangular frame and surrounding the second process pattern P2 in the form of a rectangular frame with larger vertical and horizontal dimensions. In addition, other patterns such as circuit patterns Pe are placed on both sides of these patterns.
are located close to each other.

With respect to these patterns, the apparatus main body 1 positions the X-direction CCD 6x oppositely to the position shown by the chain line A-A in the same figure, and images this part on the CCD 6x using the objective lens 5 etc. The optical output is output to the processing circuit 9. Therefore, the processing circuit 9 can obtain edge signals Se of each pattern, as shown in the lower part of the figure, which are sent to the comparison circuit 12.
Output to . The comparison circuit 12 mutually compares this edge signal Se with the position signal Sp from the XY drive section 4, and the calculation section 13 performs calculations, thereby determining each peak position of the edge signal Se as shown in the figure. The dimensions 11 to 19 are measured, and the inter-peak dimensions are calculated by determining the mutual difference between these values. Further, the comparison circuit 12 compares this peak-to-peak dimension with the reference pattern dimension input from the reference data section 11. The reference pattern dimensions set in this reference data section 11 are as shown in FIGS. 3A and 3B.
These are the external dimension La1 and width dimension La2 of 1a, and similarly, the external dimension Lb1 and width dimension Lb2 of the design pattern P2a of the second process pattern P2.

Then, by comparing these reference pattern dimensions and the peak-to-peak dimension and matching the two, the first edge signal Se is extracted from the large number of edge signals Se.
The edge signal of the process pattern and the edge signal of the second process pattern can be respectively extracted. Thereafter, by measuring the dimensions and positions of the first and second patterns on the wafer 2 based on these edge signals and comparing them with predetermined tolerance values, etc., each pattern in the first and second steps is determined. It is possible to judge whether a process is appropriate or not, and to control it appropriately. Further, by mutually comparing each pattern of the first step and the second step, the relative positional relationship between the two can be recognized and the relative positional deviation can also be measured. These results can be displayed on the display unit 14 if necessary.

Therefore, this recognition method detects the edge signals of the target pattern and determines its size and position even when the target pattern has minute dimensions or when this pattern is placed close to other patterns. etc. can be measured and recognized with high precision and accuracy. This makes it possible to arrange measurement patterns and perform measurements even in semiconductor integrated circuits with a high degree of integration and very little blank space, which is extremely effective in obtaining highly reliable semiconductor integrated circuits. .

〔effect〕

(1) Detect the edge signals of a pattern including the target pattern, measure the mutual distance between these edge signals, calculate the edge-to-edge dimension, and compare this edge-to-edge dimension with the edge-to-edge dimension of a preset reference pattern. Since the target pattern is recognized by extracting only the edge signals of the target pattern, even if the target pattern is minute, the edge signals can be easily detected and the target pattern can be measured and recognized with high precision and accuracy. be able to.

(2) Similarly, even when other patterns are placed close to the target pattern, only the edge signals of the target pattern can be detected, and the target pattern can be recognized with high precision and accuracy.

(3) Even if the target pattern is minute and close to other patterns, it can be recognized with high precision and accuracy, making it possible to easily place the measurement pattern even in semiconductor integrated circuits with high integration density and few blank spaces. The reliability of integrated circuits and the suitability of processes can be easily tested.

Although the invention made by the present inventor has been specifically explained based on the examples above, the present invention is not limited to the above examples, and it is understood that various changes can be made without departing from the gist of the invention. Needless to say. For example, the pattern detection section may perform pattern detection by scanning with a laser beam. Also, X
Measurement or recognition may be performed by detecting edge signals in the Y direction as well as in the Y direction, or measurement or recognition may be performed by detecting edge signals in both directions.

[Application field]

The above explanation has mainly been about the case where the invention made by the present inventor is applied to the field of application which is the background of the invention, which is a method for recognizing measurement patterns of semiconductor integrated circuits, but the present invention is not limited thereto. It can also be applied, for example, to cases where circuit patterns are directly recognized.

[Brief explanation of the drawing]

Fig. 1 is an overall configuration diagram of an apparatus for carrying out the method of the present invention, Fig. 2 is a diagram showing a target pattern and its detection signal, and Fig. 3 A and B show each reference pattern in the first and second steps. FIG. 1... Device body, 2... Wafer, 3... XY table, 4... XY drive section, 6... Pattern detection element, 6x, 6y... CCD, 9... Processing circuit,
10...Pattern detection section, 11...Reference data section, 12...Comparison circuit, 13...Calculation section, 14...
...Display section.

Claims (1)

[Scope of Claims] 1. Edge signals of a pattern including the target pattern are detected, and distances between these edge signals are measured to calculate an edge-to-edge dimension, and the edge-to-edge dimension is calculated as an edge signal of a preset reference pattern. A pattern recognition method characterized by extracting only an edge signal of a target pattern by comparing it with a gap dimension, and recognizing the target pattern from the extracted signal. 2. The pattern recognition method according to claim 1, wherein the target pattern is a measurement pattern placed in the margin of the circuit patterns of the semiconductor integrated circuit at the same time as these circuit patterns are formed. 3. The pattern recognition method according to claim 2, wherein a plurality of target patterns are respectively recognized and a relative position difference between each target pattern is detected.