JPH05241945A - Main storage packaging capacity detecting circuit - Google Patents

Abstract

(57) [Summary] (Correction) [Purpose] To prevent the erroneous operation of the setting of the mounted storage element by facilitating the confirmation of the storage capacity of the storage element that is mounted in the main storage device. A storage capacity detecting means 1 for detecting a storage capacity of a storage element mounted in a main storage section 1 mounting the storage element,
Detection capacity display means 19 and 21 for displaying the storage capacity of the storage element detected by the detection means 1, storage capacity setting means 7 for setting the storage capacity of the main storage portion 1, and capacity setting means 7
The set capacity display means 23, 25 for displaying the storage capacity of the storage element set by means of the storage means and the storage capacity of the storage element detected by the detection means 1 are compared with the storage capacity of the storage element set by the capacity setting means 7. The storage capacity confirmation display means 35 for displaying the comparison result of the comparison means 27 is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention compares the storage capacity of a storage element mounted in a main storage device mounted in a computer with the storage capacity of a storage element to be set, and mounts it in the main storage device. The present invention relates to a main memory mounted capacity detection circuit that prevents malfunction of setting of a storage element by facilitating confirmation of the storage capacity of the storage element.

[0002]

2. Description of the Related Art Generally, a method of confirming the storage capacity of a storage element installed in a main storage device installed in a computer and the storage capacity to be set is a manual setting by a switch and a software setting on the setting side of the storage capacity. There is. With these methods, the storage capacity of the storage element mounted in the main storage device is confirmed. However, if the setting operation is incorrect, the main storage capacity to be mounted may differ from the set storage capacity. It becomes difficult to confirm the installed main memory capacity, and it is not easy to confirm the memory capacity of the memory element mounted in the main memory device.

[0003]

However, conventionally, when the storage capacity is set larger than the storage capacity of the storage element mounted in the main storage device due to an erroneous setting operation, an address that does not actually exist is accessed and the computer is accessed. Does not work properly. On the other hand, if the storage capacity set is smaller than the storage capacity installed in the main storage device, there is a risk of causing a delay in processing due to a page fault or the like.

Therefore, it becomes difficult to confirm the storage capacity of the storage element mounted in the main storage device, and it is difficult to compare the set storage capacity with the mounted storage capacity. In the case of control, there is a problem that interleave control becomes difficult due to an uneven capacity in each memory bank and an increase in control patterns.

The present invention has been made to solve such a conventional problem, and an object thereof is to confirm the storage capacity of a storage element mounted in a main storage device and the storage capacity of the storage element by setting. It is an object of the present invention to provide a main memory mounted capacity detection circuit that improves the performance of the circuit by facilitating the above-mentioned operation and preventing an erroneous operation of setting of a memory element mounted in the main memory device.

[0006]

In order to achieve the above object, the present invention provides a main memory unit for mounting a memory element, and a memory capacity detecting means for detecting the memory capacity of the memory element mounted in the main memory unit. And detection capacity display means for displaying the storage capacity of the storage element detected by the storage capacity detection means,
Storage capacity setting means for setting the storage capacity of the storage element mounted in the main storage section, set capacity display means for displaying the storage capacity of the storage element set by the storage capacity setting means, and the storage capacity detection means Comparing means for comparing the storage capacity of the storage element mounted in the main storage section detected by the storage capacity setting means with the storage capacity of the storage element set by the storage capacity setting means; And a storage capacity confirmation display means for displaying a match or a mismatch of the storage capacity of the storage element and the storage capacity of the storage element set by the storage capacity setting means.

[0007]

With the above arrangement, the detected capacity display means displays the storage capacity of the storage element mounted in the main storage device. On the other hand, the storage capacity of the storage element set by the storage capacity setting means is displayed from the storage capacity setting means. Further, the storage capacity of the storage element mounted in the main storage unit detected by the storage capacity detection unit and the storage capacity of the storage element mounted in the main storage unit set by the storage capacity setting unit are compared by a comparison circuit. Compare. As a result of the comparison, the storage capacity confirmation display means displays whether the storage capacity of the storage element detected by the storage capacity detection means and the storage capacity of the storage element set by the storage capacity setting means are coincident or not, so that the main storage device It becomes easy to confirm the storage capacity of the storage element mounted on the.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of a main memory mounted capacity detection circuit of the present invention.

In FIG. 1, a main memory 1 stores various programs and data at predetermined addresses, and is mounted on the main memory board by pull-up or pull-down on the main memory board, which will be described later. R of the storage element
The storage capacity of the AM 37 or the like is detected, and the storage capacity display signals 3 and 5 are output to the main storage mounted capacity detection circuit 17 described later. The storage capacity display signal 3 indicates the upper bit indicating the storage capacity of the mounted storage element, and the storage capacity display signal 5 indicates the lower bit indicating the storage capacity of the mounted storage element. If the storage element to be described later mounted in the main storage device 1 is a 1 Mbit DRAM, the storage capacity display signal 3 is "0" and the storage capacity display signal 5 is "1". The capacity display signal 3 becomes "1", the storage capacity display signal 5 becomes "0", and the 16 Mbit DRAM
In this case, the storage capacity display signals 3 and 5 are both "1", and when the storage element is not mounted, the storage capacity display signals 3 and 5 are both "0".

The storage capacity setting circuit 7 sets the storage capacity mounted in the main storage device 1 by operating the switches 7 and 9, and the switch 7 has a higher storage capacity corresponding to a storage capacity display signal. The switch 9 indicates the lower bit of the storage capacity. When the bit indicating the storage element to be set is "0", the switches 7 and 9 are GND (ground).
When the bit indicating the storage element to be set is "1", the power source is switched to the Vcc side of 5V.
Therefore, when the memory element is a 1M bit DRAM, the switch 7 is switched to the GND side and the switch 9 is switched to the Vcc side, and when the memory element is a 4M bit DRAM, the switch 7 is switched to the Vcc side and the switch 9 is switched to the GND side. , 16 Mbit DRAM, both the switches 7 and 9 are switched to the Vcc side, and when the storage element is not mounted, both the switches 7 and 9 are switched to the GND side.

A main memory mounted capacity detection circuit (hereinafter referred to as a detection circuit) 17 is a mounted capacity display lamp (hereinafter referred to as an LED) which is a storage capacity display LED indicating a memory element mounted in the main memory device 1. ) 19 and 21.
The LED 19 displays the storage capacity display signal 3 and the LED 21 displays the storage capacity display signal 5, respectively. When the storage capacity display signal 3 is "1", the LED 19 is turned on and the storage capacity display signal 3 is "0". ", The LED 19 is turned off. Therefore, when the 1M bit DRAM is mounted on the main memory device 1, the LED 19 is turned off and the LED 21 is turned on, and when the 4M bit DRAM is mounted, the LED 19 is turned on and the LED 21 is turned off. In addition, 1 in the main memory 1
LED 19 and L when 6Mbit DRAM is mounted
ED21 lights up, LED if the storage element is not mounted
19 and the LED 21 are turned off.

Further, the detection circuit 17 is an LE for displaying the set capacity.
Set capacity lamp consisting of D (hereinafter referred to as LED) 2
With 3,25. The LEDs 23 and 25 described above are turned on when the set capacity display signal 13 is "1" and turned off when the set capacity display signal 13 is "0". Therefore, when setting a 1 Mbit DRAM in the storage capacity setting circuit 7, LE
D23 turns off, LED25 turns on, 4Mbit DR
When setting AM, LED23 lights up and LED25
Turns off.

Further, the detection circuit 17 has a comparison circuit 27 and a main memory capacity setting confirmation display lamp 35. The comparison circuit 27 has an exclusive OR 29 connected to the storage capacity display signal 3 and the set capacity display signal 13, and an exclusive OR 31 connected to the storage capacity display signal 5 and the set capacity display signal 15. And a NAND circuit 33 connected to the exclusive OR 31 and the exclusive OR 29. When the 1M bit DRAM is mounted on the main memory 1 and the storage capacity setting circuit 7 is also set to the 1M bit DRAM, the exclusive OR 29 becomes "1" and the exclusive OR 31 also becomes "1". Then, the NAND circuit 33 becomes "0". Main memory capacity setting confirmation indicator (hereinafter,
It is called the setting confirmation display lamp. ) 35 has a power supply of 5V at the other end
The NAND circuit 33 is "0" because it is connected to Vcc of
The light turns on at the time to indicate that the settings of the storage element mounted in the main storage device 1 and the storage capacity setting circuit 7 match. On the other hand, when the NAND circuit 33 is "1", the setting confirmation display lamp 35 is turned off to indicate that the storage element mounted in the main storage device 1 and the setting of the storage capacity setting circuit 7 do not match. Further, the NAND circuit 33 is connected to a display circuit, an OS (operating system), or the like.

Next, the schematic configurations of the main memory 1 and the control circuit 41 will be described with reference to FIG.

In the figure, a RAM 37 as a storage element can be added to the main storage device 1, and storage capacity display signals 3 and 5 indicating the storage capacity of the RAM 37 are output to the detection circuit 17. The main storage device 1 includes a connector 39a and is connected to the control circuit 41. The control circuit 41 includes a connector 39b and is fitted with the connector 39a to input the storage capacity display signals 3 and 5 to the detection circuit 17. Also,
The control circuit 41 also includes the storage capacity setting circuit 7, inputs the set capacity display signals 13 and 15 to the detection circuit 17, and the detection circuit 17 outputs the storage capacity display signals 3 and 5 and the set capacity display signals 13 and 15. And the storage capacity of the RAM 37 arranged in the main storage device 1 and the storage capacity setting circuit 7
Detects a match or mismatch with the storage capacity set in.

Further, the schematic structure of the detection circuit 17 will be described with reference to FIG. Regarding the LEDs 19 and 21 arranged in the substantially central portion of the detection circuit 17, when the 1 Mbit DRAM is mounted on the main memory device 1, the LED 19 is turned off and the LED 2 is turned on.
When 1 is turned on and the 4M bit DRAM is mounted in the main memory device 1, the LED 19 is turned on and the LED 21 is turned off.
When the 16 Mbit DRAM is mounted on the main memory device 1, both the LED 19 and the LED 21 are turned on, and when the storage element is not mounted on the main memory device 1, both the LED 19 and the LED 21 are turned off. The LED 23 disposed in the lower part of the LEDs 19 and 21 in the figure is connected to the switch 9 of the storage capacity setting circuit 7, and the LED 25 disposed on the right side of the LED 23 in the figure is connected to the switch 11 of the storage capacity setting circuit 7. It is connected. LED23 and LE
D25 is 1Mbit DRA as well as LEDs 19 and 21.
When the setting is M, the LED 23 is turned off and the LED 25 is turned on, and when the setting is 4 Mbit DRAM, the LED 2 is turned on.
3 is turned on and LED 25 is turned off. 16Mbit DR
When the AM is set, both the LED 23 and the LED 25 are turned on, and when the storage element is not set, the LED 23 and the LED 25 are turned on.
Both 23 and LED 25 are turned off.

Next, the operation of this embodiment will be described.

First, after the circuit is powered on, when a 1M bit DRAM is mounted on the main memory device 1, the main memory device 1 pulls up or pulls down on the main memory substrate to cause the main memory device 1 to operate.
Bit DRAM is detected and set capacity display signal 3 "0"
Then, “1” of the set capacity display signal 5 is output to the detection circuit 17. When the set capacity display signal is input to the detection circuit 17, the LED 19 is turned off and the LED 21 is turned on.

On the other hand, when the switch 9 of the storage capacity setting circuit 7 is brought into contact with the GND side and the switch 11 is brought into contact with the Vcc side, the LED 23 is turned off and the LED 25 is turned on.

In the comparison circuit 27, since the storage capacity display signal 3 and the set capacity display signal 13 are "0", the exclusive OR 2
9 becomes "1" and the storage capacity display signal 5 and the set capacity display signal 15 are "1", so the exclusive OR 31 is "1".
Then, the NAND circuit 33 becomes "0". Since the NAND circuit 33 becomes "0", the LED 35 is turned on. In addition, the output value of the NAND circuit 33 is displayed by the display circuit and O.
It is output to S.

On the other hand, the main memory device 1 has a 1 Mbit DRAM.
If the storage element such as is not mounted, the storage capacity display signal 5 becomes “0”, the LED 21 of the detection circuit 17 is turned off,
The exclusive OR 31 of the comparison circuit 27 becomes "0". Since the exclusive OR 31 becomes "0", the NAND circuit 33
Becomes "1" and the setting confirmation display lamp 35 is turned off.

In the above, the 1 Mbit DRA is stored in the main memory 1.
Although the case of mounting M has been described, a 4M bit DRAM,
The same result is obtained when a 16 Mbit DRAM is mounted.

As a result, when the setting confirmation display lamp 35 is turned off, it indicates that the storage capacity of the storage element mounted in the main storage device 1 and the storage capacity set in the storage capacity setting circuit 7 do not match. On the other hand, when the setting confirmation display lamp 35 is turned on, it indicates that the storage element mounted in the main storage device 1 and the storage capacity set in the storage capacity setting circuit 7 match.

By turning on or off the setting confirmation display lamp 35, it becomes easy to confirm the storage element mounted in the main storage device 1.

[0026]

As described above, according to the present invention, the storage capacities of the storage elements mounted in the main storage device are compared with the storage capacities of the storage elements according to the settings, and the coincidence or non-coincidence of the storage capacities is displayed. , By facilitating the confirmation of the storage capacity of the storage element mounted in the main storage device and the storage capacity of the storage element by setting, and preventing the erroneous operation of the setting of the storage element mounted in the main storage device, Performance improvement can be realized.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a main memory mounted capacity detection circuit of the present invention.

FIG. 2 is a schematic diagram of a main memory device and a control circuit.

FIG. 3 is a schematic diagram of a main memory mounted capacity detection circuit.

[Explanation of symbols]

 1 main memory 3,5 storage capacity display signal 7 storage capacity setting circuit 9,11 switch 13,15 set capacity display signal 17 main memory mounted capacity detection circuit 19,21 mounted capacity display lamp 23,25 set capacity display lamp 27 comparison Circuit 29, 31 Exclusive OR 33 NAND circuit 35 Main memory capacity setting confirmation display lamp

Claims (1)

[Claims] 1. A main storage unit for mounting a storage element, a storage capacity detection unit for detecting a storage capacity of the storage element mounted in the main storage unit, and storage of the storage element detected by the storage capacity detection unit. Detection capacity display means for displaying the capacity, storage capacity setting means for setting the storage capacity of the storage element mounted in the main storage section, and setting for displaying the storage capacity of the storage element set by the storage capacity setting means Capacity display means, comparison means for comparing the storage capacity of the storage element mounted in the main storage unit detected by the storage capacity detection means with the storage capacity of the storage element set by the storage capacity setting means, Displaying whether the storage capacity of the storage element detected by the storage capacity detection means by the comparison means and the storage capacity of the storage element set by the storage capacity setting means are the same or not. A main memory mounted capacity detection circuit, comprising: