JPH0525341B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a computer system that performs database processing using a plurality of processors.

(Prior Art) Attempts have been made for a long time to speed up database processing using parallel processing techniques. Among these methods, there is an attempt to speed up processing by placing a processor in each head of the disk device and overlapping the reading of the disk device with the processing in the processor, but this method is Although it is effective for processing, it is not suitable for handling multiple databases, such as in "JOIN" in relational algebra, and it is disadvantageous in terms of cost because it requires modification of the disk device.

On the other hand, as a more practical method, a method is known in which a normal magnetic disk device is used as the secondary storage device and only a plurality of processors are used to parallelize database processing. However, with this method, unless the transfer speed of the disk device storing the database is improved, the overall processing speed will be limited by the read speed from the disk, and even if a large number of high-speed processors are provided, There was a problem that they were not being utilized effectively.

Therefore, as a method to solve this mismatch between the I/O speed of the disk device and the speed of the processor, a disk cache system using multiport page memory has been proposed (Tanaka, Y., “A Mulstport Page −
Memory Architecture and A Multipot Disk
−Cache System”, New Generation
Computing, 2 (1984), pp. 241-246). The architecture of this system divides the ports of the multiport page memory into two classes; the processor is connected to one class of ports, and the magnetic disk device is connected to the other class of ports via a disk controller. It has become a thing. In this system, the multi-port page memory enables parallel reading from any port in page units, which improves the I/O speed of the disk device, resulting in faster processing. I can do it.

However, in this system, since the ratio between the number of disk devices and processors is fixed, there is a drawback that ports cannot be flexibly allocated depending on the usage status of disks and processors.

Additionally, in this system, the processor and disk controller have different interfaces, so either prepare two types of multiport page memory with different ports, or use the interface of the disk controller as a port for the processor. I had to modify it to make the connection.

(Problems to be Solved by the Invention) As described above, in computer systems using conventional multi-port page memory, flexible port allocation according to port usage conditions cannot be performed, and hardware The problem was that it required modification.

The present invention was made in view of such problems,
A computer system that takes advantage of the advantages of multi-port page memory that can improve the I/O speed of disk devices, has high flexibility in port assignment, and can improve processing speed without requiring hardware modifications. The purpose is to provide

[Structure of the Invention] (Means for Solving Problems) The present invention is characterized in that a plurality of processor systems configured as follows are connected to each port of a multi-port page memory. That is,
A processor system includes a processor, a local memory which is a main memory of the processor and stores processing programs of the system, a disk device that stores a part of a database, a processor, a disk device, and a port. and a buffer provided between the port and the buffer provided between the port and the buffer provided between the port and the buffer provided between the port and the buffer provided between the port and the buffer provided between the port and the buffer provided between the port and the buffer provided between the port and the buffer provided between the processor and the multiport page memory. and an I/O control means for controlling output, the processor reading necessary data from the disk device and accessing the multiport page memory using a processing program in the local memory. The system control means is provided in the multi-port page memory or the processor system.

(Function) According to the present invention, since the processor that processes data and the task device that stores the database are connected to one port via the buffer, when I/O processing of the disk device is required,
For example, if I/O processing can be performed between all disk devices and the multiport page memory via a buffer, and if data is available in the multiport page memory and the emphasis shifts to processing by the processor, Parallel processing can be performed by making full use of the processors connected via the buffer. In other cases, it is possible to cause some ports to operate as I/O ports of a disk device, and to cause some ports to operate as processor ports.

Therefore, according to the present invention, it is possible to flexibly allocate each port to a processor and a disk device according to the execution status of the equipment connected to the multi-port page memory, thereby realizing high-speed processing that makes maximum use of the multi-port page memory. Processing is possible. Furthermore, in this invention, the data from the disk device is temporarily dropped into a buffer, and the data is stored in the port page memory by the I/O control means common to the processor system. No need to modify.

(Embodiment) FIG. 1 shows a schematic configuration of a computer system according to an embodiment of the present invention.

This system consists of multi-port page memory 1
and a plurality of processor systems 2 connected to each port of this multiport page memory 1.

The multi-port page memory 1 includes a network 3 for switching and controlling ports, a plurality of memory banks 4 connected to each port via this network 3, and a control device as a system control means for controlling the entire system. It consists of 5.
The connection of the network 3 to the processor system 2 and the access sequence of the memory bank 4 are defined by the operation of the multiport page memory 1 and are under the control of the controller 5. The multiport page memory 2 differs in this respect from a multiprocessor in which a memory bank and a processor are combined.

Further, each processor system 2 is configured as shown in FIG. That is, system bus 6
A CPU (central processing unit) 7 and a local memory 8 serving as a main memory of the CPU 7 are connected to the computer, and a disk device 9 for storing a database is connected via a disk control device 10. Further, a port interface 11 is connected between the system bus 6 and each port of the multiport page memory 1, which controls input/output between each port and the system bus. For example, as shown in FIG. 3, the port interface 11 includes a dual port memory 12 as a buffer, this dual port memory 12, and a port control device 1.
It is composed of 3. The dual port memory 12 enables simultaneous access from the processor side and the multiport page memory side.
San Jose, CA, USA) VT2130, etc. By using the dual port memory in this way, a double buffer can be easily configured.

In the computer system configured in this way, the CPU 7, which is the center of the processor system 2,
acts as an I/O control means for the magnetic disk device 9 when I/O processing of the magnetic disk device 9 is required. That is, when it is necessary to transfer data from the magnetic disk device 9 to the multiport page memory 2, the magnetic disk device 9 is driven to send the data to the multiport page memory 1 via the port interface 11. Here, if the buffer (dual port memory 12) of the port interface 11 is made into a double buffer, the transfer from the magnetic disk device 9 to the buffer of the port interface 11 and the transfer from this buffer to the multiport page memory 1 can be performed. Pipelining is possible, and from a macroscopic perspective, data from the magnetic disk device can be transferred to the multiport page memory 1 at the data transfer speed from the magnetic disk device 9. Therefore, the maximum I/
O speed is obtained when all ports of multi-port page memory 11 perform I/O operations.

On the other hand, when the data is collected in the multi-port page memory 1 and the processing phase begins, all CPUs connected to the port can be utilized to the maximum, and the multi-port page memory 1 has no access conflicts.
It enables high-speed processing by utilizing the characteristics of Of course, it goes without saying that in normal cases, some ports operate as I/O ports of the magnetic disk device 9, and some ports operate as ports of the CPU 7.

A typical processing sequence of this system is, for example, as follows. The database is distributed and stored in magnetic disk devices 9 provided in each processor system 2. When a database inquiry arrives, some of the data required for processing is stored in the multiport page memory 1 in advance by the cache function of the multiport page memory 1, but the rest is stored in the magnetic disk device. Must be read from 9. The control device 5 determines this and selects the CPU 7 of the port to which the magnetic disk device 9 that requires I/O (reading) is connected.
Give a start command to. Startup command given
The CPU 7 starts up the magnetic disk device 9 and causes it to read the necessary data. On the other hand, the CPU 7 capable of database processing accesses the multiport page memory 1 and performs necessary processing. After this,
The CPU 7 that has finished starting I/O (reading) also participates in database processing. The processing results are obtained,
When it becomes necessary to write them to the magnetic disk device 9, some of the CPUs 7 engage in I/O (writing) again.

In this way, which CPU is engaged in I/O,
Regarding which CPU7 should be engaged in processing,
Various control strategies are possible. A dedicated processor may be used as the control device 5 as a system control means, but a CPU 7 connected to one or more ports may also be used for this purpose.

Next, the database processing of this computer system will be explained in more detail with reference to the examples shown in FIGS. 4 and 5. In this example, we will particularly consider the case where there are four processor systems 1 (PSa to PSd).

First, when a system database search inquiry arrives, a control device (not shown) interprets the inquiry and searches for the necessary page. It is assumed that the search is a simple selection operation. In this case, the necessary pages must be selected and processed by a processor. FIG. 4 shows the distribution of pages required in this example. Since a page is stored in the PSa's magnetic disk device, the PSa must read this page from the magnetic disk device and process it by itself or another processor.
Since pages 1 and 2 are stored in PSb, this page must be read from the magnetic disk device 9 of PSa and processed by one of the CPUs 7. Similarly, PSc must read the page, ,. There are no pages that need to be read in the PSd magnetic disk device. Further, pages from page to page exist in the multiport page memory 1 due to the cache effect due to reading before this interregnum starts.

FIG. 5 shows an example of the operation of each processor system PSa to PSd. The numbers on the horizontal axis of the figure represent the operation cycles of the multiport page memory 1. DR for each column
indicates a disk lead. For example, DR in the first cycle of PSa indicates that a page is to be read from the magnetic disk device of PSa. MR represents a read operation from the multiport page memory 1.
MR in the same column indicates that a page is requested and read from the multiport page memory 1. In general, the multi-port page memory 1 requires one cycle of read time to access a page, so counting from the cycle in which a request is issued, it takes two cycles to read one page. In the first cycle, all CPUs 7 that need to access the magnetic disk device 9 start accessing the magnetic disk device 9. At the same time, access to the magnetic disk device 9 generally requires time on the order of tens of milliseconds due to overhead such as seek time and rotational wait time, so each CPU 7
functions as a processing device until data from the magnetic disk device 9 is read out. Therefore, a read request is sent to the multiport page memory 1. each
The CPU 7 accesses the multiport page memory 1 in parallel in accordance with an appropriate processor allocation algorithm to proceed with page-by-page processing. When the reading of data from the magnetic disk device 9 to the local memory 8 is completed, the CPU 7 schedules the processing of the page accordingly if it is to be processed by itself. Also, if you leave it to another CPU 7, the method of processing the page data is as follows.
This can be easily realized using normal multiprogramming techniques.

If we follow the operation of PSa in Figure 5, we can see that it operates as follows.

First, PSa has its own magnetic disk device 9
Since the page must be read from the magnetic disk device 9, the read request from the magnetic disk device 9 is sent to the disk controller 1.
Output to 0 (DR). Since the sending of this request itself does not require much time, a read request for data processing is sent to the multi-port page memory 1 during the same cycle of the multi-port page memory 1 (MR). The page is a page that was already stored in multiport page memory 1,
The designation is sent from the control device 5. In the second cycle, when the page reading is completed, the third cycle
In the cycle and the fourth cycle, specified selection processing is performed on the data of the read page.
One example is that the selection process requires two cycles. Since the page has been processed, in order to write the result into the multiport page memory 1, a write request for page' is issued in the fifth cycle (MW').
Since the multiport page memory 1 requires one cycle of delay time even during writing, actual writing is performed in the sixth cycle. in the 7th cycle
Since the page reading on PSa is completed, the 8th
The cycle performs that processing. Here, the data read by itself is selected to be processed locally without being transferred to the multiport page memory 1. In the eighth cycle, a read request is simultaneously issued to fetch the next page to be processed into the empty buffer (MR). Thereafter, pages are continued to be read, processed, and written from the multiport page memory 1 using appropriate scheduling, and the processing in PSa is completed in the 17th cycle. The end of the entire process is determined by the processor system (PSc in this example) which ends the process latest among the four processor systems PSa to PSd. Processing time can be minimized by scheduling so that processing is shared as evenly as possible. As a scheduling algorithm that minimizes such processing time,
For example, managing the queue of pages to be processed,
One possible method is to assign processing of one page in a queue to a vacant processor. Normally, each processor system can be controlled using a multitasking operating system, so tasks that process I/O requests to magnetic disk devices and tasks that process pages can be executed in parallel. By operating each task, each task can be operated efficiently.

[Effects of the Invention] As described above, according to the present invention, multi-port page memory that improves the I/O speed of a disk device is effectively used to speed up processing, and the multi-port page memory Processors and disk devices are connected to each port via a buffer, and port assignments are changed according to processing and I/O load conditions, ensuring flexibility in port connections and ensuring uniform usage. can be converted into Moreover, according to the present invention, data from the disk device is temporarily dropped into a buffer, and then taken into the multiport page memory by the I/O control means common to the processor system. There is no need to modify any parts.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a computer system according to an embodiment of the present invention, FIG. 2 is a detailed block diagram of a processor system in the same system, and FIG. 3 is a block diagram of a port interface in the same processor system. The detailed block diagrams of FIGS. 4 and 5 are diagrams for explaining the processing flow of the computer system, respectively. DESCRIPTION OF SYMBOLS 1...Multi-port page memory, 2...Processor system, 3...Network, 4...Memory bank, 5...Control device, 6...System bus, 7...CPU, 8...Local memory ,
9...Magnetic disk, 10...Disk control device, 11...Port interface, 12...Dual port memory, 13...Port control device.

Claims (1)

[Claims] 1. A multi-port page memory that has a plurality of ports and allows parallel access from those ports in page units, and a plurality of processor systems connected to each port of this multi-port page memory. and a system control means for controlling these, and the processor system includes a processor, a local memory which is a main storage section of the processor and stores processing programs of the system, etc.
a disk device that stores part of the database;
A buffer provided between the processor, the disk device, and the port, and access to the multiport page memory for transferring data from the disk device to the multiport page memory and for the processor to perform database processing. and an I/O control means for controlling input to the port, wherein the processor reads necessary data from the disk device using a processing program in the local memory. and database processing for accessing the multi-port page memory, wherein the system control means is provided in the multi-port page memory or the processor system.