JPH05265391A - Display device using AC discharge plasma display panel - Google Patents

Abstract

(57) [Summary] [Purpose] A display using an AC discharge type plasma display panel that can prevent the occurrence of unevenness in light emission brightness on the plasma display panel due to the difference in load factor for each line and can secure the screen clarity. Provide the device. In a display device 10 using an AC discharge plasma display, at least all row electrodes L1 to
A first common power supply K1 for commonly applying a sustaining pulse Psus to Ln, and at least one of a write signal and an erase pulse signal is applied to a selected row electrode in the row electrode group. Second power supply K
2. A display device using an AC discharge type plasma display panel, which is provided with a row electrode drive control means composed of

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly to a display device using an AC discharge type plasma display panel.

[0002]

2. Description of the Related Art Conventionally, a display device using a plasma display panel has the advantages of high brightness, wide viewing angle, large capacity display, and long life. Therefore, a display device such as a personal computer or a word processor is used. Has been widely used as. Above all, a display device using an AC discharge type plasma display panel has a memory effect and can continuously perform discharge light emission by applying a relatively low discharge sustaining voltage (sustain voltage). So it has been getting attention from an economic point of view.

However, in such an AC discharge type plasma display panel, the emission brightness on the plasma display panel becomes uneven due to the difference in load factor for each line with the recent increase in capacity and definition. However, the problem that the screen is less clear or the screen is difficult to see has arisen, and it is necessary to solve the problem.

The structure and display principle of the AC discharge type plasma display panel display device relating to the present invention will be briefly described with reference to FIGS. 4 and 5. First, FIG. FIG. 3 is a diagram for explaining a typical configuration of a plasma plasma display panel, in which two transparent glass substrates 61 and 62 are arranged in parallel with each other at a predetermined interval in order to form an internal space between them. The glass substrate 61 of 1 functions as a display surface constituting the front surface of the display device, and the other glass substrate 62 constitutes the back surface of the display device.

On the surface of the glass substrate 61 facing the internal space, a plurality of column electrodes 6 arranged in parallel with each other.
3 are provided, and a plurality of row electrodes 64 arranged in parallel with each other are provided on the surface of the glass substrate 62 facing the internal space. The row electrodes 64 and the column electrodes 6 are provided.
3 are arranged in directions orthogonal to each other. The row electrode 64 and the column electrode 63 are completely protected by being covered with an appropriate dielectric layer 66 made of, for example, insulating glass and a protective layer 68 covering the dielectric layer 66.

A space 67 is formed in the protective layer 68.
Forms a space completely isolated from the outside by spacers 70 and seal glasses 69 provided at both ends of the glass substrates 61, 62, and some rare gas is added to neon gas in the space. The mixed gas body is enclosed. The display operation principle of the plasma display panel having such a basic configuration will be described below. First, either the row electrode driving means 2 or the column electrode driving means 3 is driven to apply a predetermined high voltage to the plasma display panel. By applying between both electrodes, the gas body existing in the space portion (also called a pixel) specified by the both electrodes is ionized to generate a discharge current, and the surface of the dielectric body is charged,
At this time, light is emitted instantaneously.

At the same time, the positive ion charged particles separated from the gas body cover the negative electrode with a protective layer 6.
8 is deposited on the surface of 8 to form one wall charge, and at the same time,
The negative ion charged particles separated from the gas body are deposited on the surface of the protective layer 68 covering the positive electrode to form the other wall charge. The wall charges formed on the surface of the dielectric are retained for a long period of time to exert a memory effect.

Then, when the polarities of the voltages applied to both electrodes are reversed, both charged particles forming the wall charges move to the opposite side, and at that time, light is momentarily emitted. Is released. Since the voltage due to the wall charges has already been formed between the electrodes, the discharge at that time is started at a voltage lower than the voltage applied initially.

FIG. 5 shows the overall structure of a display device comprising the above-mentioned AC discharge type plasma display panel. The row electrodes (Y electrodes) of the plasma display panel 10 are connected to the plasma display panel 10. ) For scanning and driving row electrodes (Y-side drive circuit)
2, 2'and column electrode driving means (X side driving circuit) 3, 3'for scanning and driving the column electrodes (X electrodes) are provided, and the row electrode driving means 2, 2'and column electrode driving means 3 are provided. A timing generator 5 for driving 3'in accordance with a predetermined program sequence, a horizontal sync signal (Hsync), and a scan controller 6 for controlling scanning of row electrodes (Y electrodes) based on a vertical sync signal (Vsync) and a horizontal sync signal. (Hsync) and vertical sync signal (Vsync)
c), display data (DATA) and clock (CLK)
And the like, and a central processing unit 4 for controlling the entire display device.

An intersection 104 between a row electrode (Y electrode) 102 and a column electrode (X electrode) 103 provided in the AC discharge type plasma display panel 10 constitutes a display cell and forms one pixel. ing. Both drive means 2 and 3
Are connected to a timing generator 5 for generating control signals for controlling those high voltage output pulses. Further, the column electrode driving means (X side driving circuit) 3 selectively outputs a high voltage output pulse by the display data, and the row electrode driving means (Y side driving circuit) 2 selectively outputs a high voltage output pulse by the scan data generated by the scan controller 6. Then, an image of various characters, figures, etc. is formed in an arbitrary display cell 104.

FIG. 8 is a block diagram showing a concrete configuration example of the row electrode driving means 2 or the column electrode driving means 3 of the display device shown in FIG. 5, and both of the electrode driving means 2 and 3 are shown. Controlled by a control circuit composed of the scan controller 6 or the timing generator 5, for example, two MOSFETs arranged in series
It is formed based on the switching element composed of (TR1, TR2).

FIG. 8 shows a state in which the scan controller 6 controls one line of the row electrode 102 of the plasma display panel via the row electrode driving means 2 having the above-described structure. There is. The control means 5 or 6 receives, as control signals from the central processing means 4, for example, TSC signal, SUS signal, STB signal, PO.
The R signal or the like is inputted, and the row electrode driving means 2 or the column electrode driving means 3 is directly inputted with the display data (DATA) and the clock (CLK) from the central processing means 4.

The scan controller 6 in the row electrode driving means 2 or the column electrode driving means 3 in the AC discharge type plasma display panel having the above structure.
Alternatively, the truth table in the control circuit 5 or 6 including the timing generator 5 is shown in Table 1 below.

[0014]

[Table 1]

The control signal TSC is a try state control (Try St
ate Control) signal, SUS is called a Sustain signal, STB is called a Strobe signal, POR is called a Polarity signal, and DATA is called a data signal. The drive means 2 and 3 in the display device according to the above five control signals cause the output switching elements in the row electrode drive means 2 or the column electrode drive means 3 to be in the high impedance state Z (TR1, 2). Both OFF), GN
It is possible to selectively specify seven states to be set to either the D state (TR1 is OFF, TR2 is ON) or the VDH (high voltage power supply) state (TR1 is ON, TR2 is OFF).

Here, in order to briefly explain the conventional driving method of the display device, an AC discharge type plasma display panel composed of two X and Y electrodes as shown in FIG. A driving method of the display device will be described with reference to FIG. First, in FIG. 2, it is assumed that the intersections of the X and Y electrodes are the display cells A, B, C and D, and only the display cell A is made to emit light now.

FIG. 7 shows a drive waveform for making only the display cell A emit light. That is, the first horizontal synchronization signal (XHsync) A
In the period in which 1 is output, that is, in the first address period (AD1), the write pulse is applied to the electrode Y1 in the selected state by the scan data controlled by the vertical synchronizing signal (XVsync) and the horizontal synchronizing signal (XHsync). Pw1 is applied, the intersections (display cells A, B) of the electrodes Y1 and X1, 2 are made to emit light (all selected rows are made to emit light), and wall charges are formed on the surfaces of the insulating layers facing each other across the discharge gas space. accumulate.

Next, the sustain pulse Ps is applied from the X side electrode side.
When 1 is applied, discharge is generated again, and wall charges having the opposite polarity to those before are generated. Next, the electrode Y1 in the selected state
Then, an erase pulse Pe1 for neutralizing the wall charges is applied. (When the erase pulse is applied, no light is emitted even if the sustain pulse is applied.) At this time, the cancel pulse Pc1 that cancels the erase pulse Pe1 is applied from the electrode X1 to the display cell A that does not neutralize the wall charges. This cancel pulse is selected by the display data.

With the above operation, the display cell A is then set to Y
Sustain pulse Psu alternating from the side electrode and the X side electrode
Each time s is applied, light is emitted and the display is continued.
By the next horizontal synchronizing signal (XHsync), the scan data is transferred from the scan controller 6 to the Y-side drive circuit so that the Y2 electrode is in the selected state, and the same series of operations as before is performed.

As a result of such operation, as can be understood from the input signal waveforms of the cells A to D shown in FIG. 7C and the cell light output waveform shown in FIG. 7D, in the cell A, Since the erase pulse Pe1 and the cancel pulse Pc are simultaneously applied after the write signal Pw1 is output, a predetermined wall charge remains in the cell, so that the alternating discharge sustaining applied to the cell thereafter is maintained. The light emission operation is continued by the pulse Psus. (Light emission pulses H1 to H3).

On the other hand, in each of the cells B to D, after the write signal Pw1 is output, only the erase pulse Pe2 is applied and the cancel pulse Pc is not applied, so that the wall charge remains in the cell. As a result, the light emission operation is not performed by the alternating discharge sustaining pulse Psus applied to the cell thereafter.

[0022]

In the conventional display device using the AC discharge type plasma display panel, it is desirable that each cell of the display device has a uniform light emitting state. In actual use, the light emission state of each cell is not uniform throughout the display device, and the brightness of the displayed image is different for each line especially on the row electrode side, which makes the entire image difficult to see. There was a problem that it became unclear or blurred.

In pursuit of the cause of such a problem, when the plurality of row electrodes are being driven by the row electrode driving means 2, the number of light emitting cells in each line causes a gap between the row electrode lines. It was found that there was a difference in the display brightness of. As a result of pursuing the cause of such a phenomenon, it was found that there is a basic cause as described below.

That is, FIG. 9 shows a conventional method of driving a display device comprising the plasma display panel.
Especially on the side of the row electrode driving means 2, each line L1, L
The sustain pulse voltage Psus supplied to the drive circuit 2 is provided for each individually provided drive circuit, that is, the driver circuit DR.
1 was supplied from DR2. Therefore, as shown in FIG. 9, each line L1 and L2 on the row electrode side in the display device
When the number of lights in each line is different, a driver circuit for driving each line is individually provided, and therefore, the voltage drop in each line is different, so that the luminance of each line L1 and L2 is different. A change occurs and lines L1 and L2
There will be a difference in gradation between the two.

Now, let the number of lights of the line L1 on the row electrode side in FIG. 9 be n, the number of lights of the line L2 be m, and n> m.
Suppose that Further, the current flowing when one display cell of the plasma display panel in the display device is turned on is i, and the current flowing through the driver DR1 for driving the line L1 when the line L1 is selected is Is or the line When the current flowing through the driver DR2 that drives the line L2 when L2 is selected is Is ', Is = i × n Is' = i × m. Therefore, considering the condition of n> m, Is> Is 'Becomes.

Furthermore, the respective drivers DR1 and DR2
When the FET provided in is turned on, it can be regarded as a resistor in a pseudo manner, so the resistance value at that time is set to Ron. The voltage drop of the driver DR1 due to the resistance value Ron at that time is Vd, and the driver DR2 due to the resistance value Ron.
When the voltage drop of Vd ′ is Vd ′ and the rated voltage of the sustain voltage is Vs, Vd = Ron × Is Vd ′ = Ron × Is ′. Therefore, considering the condition of n> m, Vd> Vd ′ ...・ It becomes (2-1).

On the other hand, the energy Pa for selecting the line L1 and causing n cells to emit light in the line L1 is Pa = (Vs-Vd) × (i × n), and the line L2 In, the energy Pb for causing the n cells to emit light is Pb = (Vs−Vd ′) × (i × m).

Also, in the line L1, the display cell 1
The energy pa for making one cell emit light is pa = Pa / n = (Vs-Vd) x i (2-2), and the energy pb for making one display cell emit light in the line L2. Is pb = Pb / m = (Vs−Vd ′) × i ·· (2−3).

Then, considering the formula (2-1), it is understood that pa> pb ... (2-4). That is, from the formula (2-4), in the above example, the line L2 has higher luminance, that is, appears brighter.

As described above, when the sustain pulse Vsus is driven by an individual driver, a difference in the number of lights for each line causes a difference in luminance between lines due to the influence of the voltage drop by each driver. It turned out that a so-called crosstalk occurs. The object of the present invention is to solve the problems in the related art, and due to the increase in capacity and definition in recent years, due to the difference in load factor for each line,
(EN) Provided is a display device using an AC discharge type plasma display panel, which is improved in the disadvantages that the brightness of the light emission on the plasma display panel is uneven and the screen is not clear and the screen is difficult to see.

[0031]

In order to achieve the above-mentioned object, the present invention adopts the technical constitution as described below. That is, in a display device using an AC discharge type plasma display, a first common power source for applying a sustaining pulse to at least all row electrodes in common, and at least a write signal and an erase signal to the row electrodes. It is a display device using an AC discharge type plasma display panel composed of a second power supply for applying one of pulse signals.

That is, as shown in FIG. 1, according to the principle of the present invention, conventionally, since a current or power is supplied from an independent driver in order to apply a sustaining pulse for each line, each line is supplied. When the load is different, the emission brightness is also different. However, in the present invention, a current (power) supply source for applying the discharge sustaining pulse Vsus to each line at least on one end side of the line on the row electrode side, that is,
By providing one driver circuit at a time and applying the scan scan signal, that is, the write signal Vw and the erase signal Vs from the opposite side of the electrode line through the diode, the discharge sustaining pulse Vsus and the discharge sustaining pulse Vsus are substantially applied. The difference in luminance is eliminated by the configuration in which it is separated into.

That is, in the present invention, as shown in FIG. 1, the driver circuit K1 (that is, the first power source) in which the supply source of the sustain pulse Psus and the driver circuit are integrated into one.
Since there is no voltage drop difference between the lines. However, at this time, the sustain pulse Ps
When the write pulse Pw is added from the same side as us, the write pulse Pw is added to all the lines because there is one sustain pulse supply source, so the write pulse Pw is connected to the first power supply in the row electrode. The second power source K2 is arranged so as to be connected to the row electrode terminal portion on the side opposite to the terminal portion so that the voltage is applied from the row electrode terminal portion on the side opposite to the terminal portion.

Further, by inserting the diode DO between the first and second power supplies, the write pulse Vw applied to one selected line invades the non-selected other line and the voltage is applied. It prevents it from increasing.

[0035]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A specific example of a display device using an AC discharge type plasma display panel according to the present invention will be described in detail below with reference to the drawings. That is, FIG. 1 is a diagram illustrating the configuration of a specific example of a display device according to the present invention, and a display device 10 using an AC discharge type plasma display.
, A first common power source K1 for applying the sustaining pulse Psus in common to at least all the row electrodes L1 to Ln, and at least a write signal and a write signal for the selected row electrode in the row electrode group. There is shown a display device using an AC discharge type plasma display panel provided with a row electrode drive control means composed of a second power source K2 for applying either one of the erase pulse signals.

In this example, the first power source K1
Is arranged at one end of the panel 10 in the row direction,
Further, it is desirable that the second electrode K2 is arranged at the other end of the panel. The first power supply K1 is composed of, for example, a MOSFET 201, one end of which is connected to a power supply for supplying a sustaining voltage Vsus (sustain voltage), and the other end of which is connected to all the row electrodes of the panel 10. It is connected to the end.

The discharge sustaining pulse Vsus control signal SusH is input to the gate terminal of the MOSFET 201. The second power source K2 is provided with scan drivers DRn and DRn + 1 that are individually connected to the other ends of the row electrodes of the panel 10, and the driver DRn and DRn + 1 are both, for example, , Two transistors connected in series, ie MOSFET 20
2 and MOSFET 203, and MOSFET 202 'and MOSFET 203'.
The junction of 02 and 203 is connected to the end of the row electrode.

One end of each of the drivers DRn and DRn + 1 is grounded, and the other end thereof is provided with a control driver DRC for controlling the output of the write signal SVw and the erase signal SVs. And the control driver DR
C is, for example, composed of two transistors connected in series, that is, a MOSFET 204 and a MOSFET 205.
The above-mentioned drivers DRn, DR
The other end of n + 1 is connected.

In addition, the MOSF in the control driver DRC
The other end of the ET 204 is connected to a power supply that generates a write signal voltage Vw, and the other end of the MOSFET 205 is connected to a power supply that generates an erase signal voltage Vs. That is, the control driver DR according to the present invention
C is connected to a power supply that produces two different voltages.

Then, M in the control driver DRC
The gate terminal of the OSFET 204 is connected to the write signal control terminal SVw, while the gate terminal of the MOSFET 205 is connected to the erase signal control terminal SVs. That is, in this specific example, the second power supply is composed of the drivers DRn and DRn + 1 and the control driver DRC.

In the display device according to the present invention, the first power source K1 is connected to one end of the row electrode forming the panel, and the second power source K2 is The first power source of each of the row electrodes is individually connected to the other end of the row electrode, and each of the row electrodes is provided with an appropriate diode DO.
The second power source is designed so that the write signal voltage Vw or the erase signal voltage Vs applied to a predetermined selected row electrode does not affect other unselected row electrodes.

Further, the first and second power supplies K according to the present invention.
1, K2 and the diode DO can be integrally formed on a glass substrate that constitutes the panel by using a COG (chip on glass) technique, and thereby the down discharge of the AC discharge type plasma display panel. It is possible to achieve sizing, space saving, and cost reduction.

The operation of the driving circuit of the plasma display panel according to the present invention shown in FIG. 1 will be described with reference to FIGS. That is, the waveform a in FIG. 2 shows the timing of the control signal SusH for generating the sustaining pulse Vsus, and the sustaining pulse Vsus is applied to all the row electrodes of the panel 10 by rising by one pulse. Is applied, the driver D of waveform c
Since the scan control signal WLn in Rn falls by the pulse of 2, which turns off the MOSFET 203, the voltage of only the selected row electrode L1 is set to the discharge sustaining pulse Vsus.

After that, as shown in the waveform b, the scan control signal WHn in the driver DRn rises with the pulse of 3, so that the MOSFET 202 is turned on and at the same time, the write signal control pulse SVw of the control driver DRC. Rises with 10 pulses as shown by the waveform g, and the erase signal control pulse SVs of the control driver DRC falls with 11 pulses as shown with the waveform h, so that the write signal voltage Vw from the control driver DRC. Is output.

Therefore, the write signal voltage Vw is
The selected row electrode L1 via the MOSFET 202
Therefore, at this time, the voltage of the row electrode L1 is equal to the write signal voltage Vw. or,
In the waveform b, when the scan control signal WHn rises with the pulse of 4 to turn on the MOSFET 202, the scan control signal WLn of the waveform c falls with the pulse of 5 and thereby the MOSFET 203 turns off. In the control driver DRC, as can be seen from the waveforms g and h, since the write signal voltage Vw is OFF and the erase signal voltage Vs is being output, the erase signal voltage Vs is It is applied to the selected row electrode L1 via the MOSFET 202.

On the other hand, in this state, the discharge sustaining pulse Vsus of the selected row electrode L1 has already been removed, and only the wall charge exists in the row electrode. Therefore, when the erase signal voltage Vs is applied to the row electrode, the wall charges disappear. In addition,
Except when the waveforms (a), (b) and (d) are rising, the WL is turned on in the waveform (c) to fix it to the GND level.

On the other hand, while the above steps are being executed,
Scan driver DRn + 1 for controlling another row electrode L2
, The scan control signal WL is
n + 1 falls with a pulse of 6, which causes MOSFE
Since T203 ′ is turned off, the selected row electrode L2
Is set to the discharge sustaining pulse Vsus, but the scan control signal WHn + 1 in the driver DRn + 1 does not rise as shown by the waveform d, so that neither the write signal voltage Vw nor the erase signal voltage Vs. It is not applied to the selected row electrode L2.

Therefore, until this point, the wall charges are not formed on the row electrode L2. The above operation is the timing in the period of address 1 (AD1) of the display device according to the present invention.
During the period of 2) or the period of address 3 (AD3), the above steps are alternately repeated. Further, FIG. 3 shows waveforms on the side of the row electrode driving means 2 and the side of the column electrode driving means 3 of the conventional display device, and on the side of the row electrode driving means 2 and the column electrode of the display device according to the present invention. The waveforms on the side of the driving means 3 are compared with each other. The waveform of the display device of the present invention of FIG. 3 (B) is different from the waveform of the conventional waveform of FIG. 3 (A). b is the row electrode driving means 2 in the conventional method
The drive waveform of the column electrode drive means 3 of the related art is shown in FIG.

That is, with respect to the column electrode driving means 3, the driving waveform of the present invention is the same as that of the conventional display device, but the driving waveform of the row electrode driving means 2 is of the present invention. Is a waveform of a sustaining pulse Vsus applied to the row electrode from the left side of the panel and a waveform of a write signal voltage Vw and an erase signal voltage Vs applied to the row electrode from the right side of the panel. Is different.

[0050]

In the display device using the AC discharge type plasma display panel according to the present invention, since the above technical structure is adopted, the light emission on the panel is caused by the difference in the load factor for each line. It is possible to provide a display device using an AC discharge type plasma display panel, which has improved the drawbacks that the screen is difficult to see due to uneven brightness and reduced screen clarity. It is possible to achieve sizing, space saving, and cost reduction.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating a configuration of a specific example of a display device using an AC discharge type plasma display panel according to the present invention.

FIG. 2 is a diagram illustrating drive waveforms of the display device according to the present invention.

FIG. 3 is a diagram illustrating drive waveforms of the display device according to the present invention.

FIG. 4 is a diagram illustrating the principle of a conventional AC discharge type plasma display panel.

FIG. 5 is a diagram illustrating a configuration example of a conventional display device using an AC discharge type plasma display panel.

FIG. 6 is a diagram illustrating a display principle of a display device using a conventional AC discharge type plasma display panel.

FIG. 7 is a diagram for explaining drive waveforms of a display device using a conventional AC discharge type plasma display panel.

FIG. 8 is a diagram for explaining the operation of a conventional electrode drive circuit of a display device using an AC discharge type plasma display panel.

FIG. 9 is a diagram for explaining problems and problems in a display device using a conventional AC discharge type plasma display panel.

[Description of Codes] 1 ... AC discharge type plasma display panel 2, 2 '... Row electrode drive control means 3, 3' ... Column electrode drive control means 4 ... Central arithmetic processing control means 5 ... Timing generator means 6 ... Scan controller Means 10 ... Display device 61 ... Front glass substrate 62 ... Back glass substrate 63 ... Column electrode 64 ... Row electrode 66 ... Dielectric layer 67 ... Discharge space 68 ... Protective layer 69 ... Glass seal 70 ... Spacer 102 ... Row electrode 103 ... Column electrode 104 ... Display cell, display pixel K1 ... 1st power supply, sustaining pulse drive driver K2 ... 2nd power supply DO ... Diode DRC ... Control driver DRn, DRn + 1 ... Scan driver

Claims (6)

[Claims] 1. In a display device using an AC discharge type plasma display, a first common power source for commonly applying a sustaining pulse to at least all row electrodes, and at least writing to the row electrodes. A display device using an AC discharge type plasma display panel, characterized by comprising a second power supply for applying one of a signal and an erase pulse signal. 2. The second power source is configured to be applied to the row electrode from a row electrode terminal portion on the side opposite to the row electrode terminal portion on one side to which the first power source is supplied. The display device according to claim 1, wherein: 3. The display device according to claim 2, wherein the second power supply is composed of at least two types of transistors having different output voltages. 4. The display device according to claim 1, wherein the first common power source is connected to each row electrode through an appropriate row electrode selecting means. 5. The display device according to claim 2, wherein the first and second power supplies are connected to each other through a diode in each row electrode. 6. The display device according to claim 5, wherein the first and second power supplies and the diode are mounted on a glass substrate forming the plasma display panel. ..