JPH05275465A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Summary] [Purpose] The purpose is to simplify process steps. [Structure] A thin film 22 is formed on a semiconductor substrate 21, and this thin film 22 is etched or lifted off to simultaneously form a thin film resistor 22b and a gate electrode 22a of a MES type field effect transistor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a thin film resistor and a field effect transistor (FET).

[0002]

2. Description of the Related Art Generally, MMIC (Mon
olithic Microwave IC) may require high-performance resistors with excellent temperature characteristics and small variations. As such a resistance, for example, NiCr (nickel / chromium) is used.
A thin film resistor made of a system alloy is used.

Conventionally, a method of manufacturing a semiconductor device having such a thin film resistor and a metal semiconductor junction type field effect transistor will be described with reference to FIGS.

First, a thin film 2 to be a gate electrode of an FET is formed on a semiconductor substrate 1 by a physical vapor deposition (PVD) method.
r Deposition) or chemical vapor deposition (CVD: Chemical
Vapor Deposition) (FIG. 17). next,
A resist pattern 3 is formed on the thin film 2 (see FIG. 1).
8). Then, using the resist pattern 3 as a mask, the thin film 2 is etched by a dry etching method or a wet etching method depending on its material to form the gate electrode 2 (FIG. 19). Then, an interlayer film 4, such as an oxide film or a nitride film, is formed on a predetermined portion of the semiconductor substrate 1 and the gate electrode 2.
The resist 5 is sequentially formed (FIG. 20). Then, the source / drain electrodes 6 are formed on the semiconductor substrate 1 on both sides of the gate electrode 2 by the lift-off method (FIG. 21). Then, after forming an interlayer film 7 such as a nitride film so as to expose the source / drain electrode 6 portion on the entire surface, a resist pattern 8 is formed on the entire surface (FIG. 22). Further, a NiCr-based alloy thin film 9 serving as a thin film resistance is formed on the entire surface by physical vapor deposition or chemical vapor deposition (FIG. 23). Then, after forming the thin film resistor 9 by the lift-off method, the wiring 10 of Al or Au and the protective film 11 of the nitride film were sequentially formed on the entire surface to complete the semiconductor device (FIG. 24).

[0005]

However, in the above-mentioned conventional method, the thin film material forming the gate electrode 2 of the FET and the thin film material forming the thin film resistor 9 are different from each other. There is a problem that a process for forming the thin film resistor 9 is necessary and the process steps are complicated.

The object of the present invention is to solve the above problems.
A gate electrode of a FET and a thin film resistor can be formed in the same step, and a method for manufacturing a semiconductor device that can simplify the process steps is provided.

[0007]

In order to achieve the above-mentioned object, the present invention provides a method of manufacturing a semiconductor device having a MES type field effect transistor, which comprises a step of forming a thin film on a semiconductor substrate and etching or etching the thin film. lift·
Turning off and simultaneously forming a thin film resistor and a gate electrode of the MES type field effect transistor; and forming source / drain electrodes of the MES type field effect transistor on the semiconductor substrate on both sides of the gate electrode. The thin film is made of a metal or an alloy. The thin film is made of metal oxide or alloy oxide.

The thin film is made of metal nitride or alloy nitride.

The thin film is made of metal silicide or alloy silicide.

[0010]

In the present invention, since the thin film resistor and the gate electrode are formed in the same step, the manufacturing process is simplified.

[0011]

EXAMPLES Examples of the method of the present invention will be described below with reference to FIGS.
6 will be described.

First, a thin film resistor and F are formed on the semiconductor substrate 21.
The thin film 22 to be the gate electrode of the ET is formed by physical vapor deposition (P
It is formed by VD: Physical Vapor Deposition) or chemical vapor deposition (CVD).
At this time, a metal or an alloy, a metal oxide or an alloy oxide, a metal nitride or an alloy nitride, a metal silicide or an alloy silicide is used as a material forming the thin film 22 (FIG. 1). Next, a resist pattern 2 is formed on the thin film 22.
3 (FIG. 2). Then, the resist pattern 23
Using the as a mask, the thin film 22 is etched by a dry etching method or a wet etching method depending on its material to simultaneously form the gate electrode 22a and the thin film resistor 22b. In this case, the resistance value of the thin film resistor 22b is determined by its cross-sectional area and length (FIG. 3). Subsequently, an interlayer film 24 such as an oxide film or a nitride film is formed on the entire surface (FIG. 4).
After that, at least the gate electrode 22a and the thin film resistor 22
After patterning the interlayer film 24 so that it remains on the surface b, a resist 25 is formed on the interlayer film 24 (FIG. 5). After that, the source / drain electrodes 26 are formed on the semiconductor substrate 21 on both sides of the gate electrode 22a by the lift-off method (FIG. 6). After removing the interlayer film 24 except on the gate electrode 22a, the wiring 2 of Al or Au is formed on the entire surface.
7. A nitride film passivation film 28 for protecting the wiring 27 is sequentially formed to complete the semiconductor device (FIG. 7).

8 to 10 show an example in which the gate electrode and the thin film resistor are formed by the lift-off method.

That is, after forming the resist pattern 29 on the semiconductor substrate 21 (FIG. 8), the thin film 22 is formed on the entire surface (FIG. 9), and the thin film 22 on the resist pattern 29 is removed. The gate electrode 22a and the thin film resistor 22b are formed (FIG. 10).

Next, another embodiment of the method of the present invention will be described.

First, TiW, W, W is formed on the semiconductor substrate 21.
A first thin film 32 made of a high resistance material such as Nx, WSi, TiAl or MoSi, and a second thin film 33 made of a low resistance material such as Au or PtAu are sequentially laminated (FIG. 11). Next, a resist pattern is formed on the second thin film 33.
Forming the film 30 (FIG. 12). After that, the resist pattern
The second thin film 33 is patterned using the mask 30 as a mask (FIG. 13). Then, the second on the thin film resistor formation planned region
A resist pattern 31 is formed between the patterns of the thin film 33 (FIG. 14). Then, the first thin film 32 is etched by using the resist pattern 31 and the second thin film 33 as a mask to form a gate electrode 34 and a thin film resistor 35. According to this, the resistance value of the gate electrode 34 is determined by the low resistance second thin film 33, and the resistance value of the thin film resistor 35 is determined by the high resistance first thin film 32. After that, an interlayer film 24 such as an oxide film or a nitride film is formed on the entire surface (see FIG. 1).
5). Then, after patterning the interlayer film 24 so as to remain at least on the gate electrode 34 and the thin film resistor 35,
The source / drain electrodes 26 are formed on the semiconductor substrate 21 on both sides of the gate electrode 34 by the lift-off method. Next, after an interlayer film 36 is formed on the entire surface so that the thin film resistor 35 and the source / drain electrodes 26 are exposed, an Al or Au wiring 27 and a nitride film passivation for protecting the wiring 27 are formed on the entire surface. The film 28 is sequentially formed to complete the semiconductor device (FIG. 16).

Thus, in this embodiment, the thin film resistors 22b,
Since 35 and the gate electrodes 22a and 34 of the metal semiconductor junction field effect transistor are formed in the same step, the process steps are facilitated.

[0018]

As described above, according to the present invention, F
Since the formation of the ET gate electrode and the formation of the thin film resistor are performed in the same step, the process steps can be simplified.

[Brief description of drawings]

FIG. 1 is a sectional view of a manufacturing process of a method of the present invention.

FIG. 2 is a sectional view of a manufacturing process of the method of the present invention.

FIG. 3 is a cross-sectional view of a manufacturing process of the method of the present invention.

FIG. 4 is a sectional view of a manufacturing process of the method of the present invention.

FIG. 5 is a sectional view of a manufacturing process of the method of the present invention.

FIG. 6 is a sectional view of a manufacturing process of the method of the present invention.

FIG. 7 is a cross-sectional view of a manufacturing process of the method of the present invention.

FIG. 8 is a sectional view of a manufacturing process by the lift-off method of the present invention.

FIG. 9 is a cross-sectional view of the manufacturing process by the lift-off method of the present invention.

FIG. 10 is a sectional view of a manufacturing process according to the lift-off method of the present invention.

FIG. 11 is a cross-sectional view of another manufacturing process of the method of the present invention.

FIG. 12 is a cross-sectional view of another manufacturing process of the method of the present invention.

FIG. 13 is a sectional view of another manufacturing process of the method of the present invention.

FIG. 14 is a cross-sectional view of another manufacturing process of the method of the present invention.

FIG. 15 is a cross-sectional view of another manufacturing process of the method of the present invention.

FIG. 16 is a cross-sectional view of another manufacturing process of the method of the present invention.

FIG. 17 is a cross-sectional view of manufacturing steps of a conventional method.

FIG. 18 is a sectional view of a manufacturing process of a conventional method.

FIG. 19 is a sectional view of a manufacturing process of a conventional method.

FIG. 20 is a sectional view of a manufacturing process of a conventional method.

FIG. 21 is a sectional view of a manufacturing process of a conventional method.

FIG. 22 is a sectional view of a manufacturing process of a conventional method.

FIG. 23 is a sectional view of a manufacturing process of a conventional method.

FIG. 24 is a sectional view of a manufacturing process of a conventional method.

[Explanation of symbols]

 21 Semiconductor Substrate 22 Thin Film 22a Gate Electrode 22b Thin Film Resistor 24 Interlayer Film 26 Source / Drain Electrode 27 Wiring 28 Passivation Film

Claims (5)

[Claims] 1. A method of manufacturing a semiconductor device having a MES field effect transistor, the method comprising forming a thin film on a semiconductor substrate, and etching or lifting the thin film.
Turning off and simultaneously forming a thin film resistor and a gate electrode of the MES type field effect transistor; and forming source / drain electrodes of the MES type field effect transistor on the semiconductor substrate on both sides of the gate electrode. A method of manufacturing a semiconductor device, comprising: 2. The method of manufacturing a semiconductor device according to claim 1, wherein the thin film is made of a metal or an alloy. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the thin film is made of a metal oxide or an alloy oxide. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the thin film is made of metal nitride or alloy nitride. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the thin film is made of metal silicide or alloy silicide.