JPH05282182A - CPU runaway detection method - Google Patents

Abstract

(57) [Abstract] [Purpose] To improve the CPU runaway detection capability by the watchdog timer without adding a new circuit. A CPU runaway detection subroutine placed in the middle of a main routine issues a reset signal to a watchdog timer after confirming that an interrupt subroutine, which should be appropriately executed in normal times, is normally executed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a runaway detection method for a CPU to which a watchdog timer is connected.

[0002]

2. Description of the Related Art There is a method of using a watchdog timer as a method of monitoring runaway of a CPU.

This watchdog timer is usually composed of a timer that can be retriggered, and outputs a reset signal to the CPU when a certain time has elapsed without being retriggered after being triggered. The CPU sends a reset signal to the watchdog timer to retrigger it before the timer times out. As described above, since it is necessary to issue the reset signal to the watchdog timer every time within a certain period of time up, the subroutine for that purpose is a main routine that is repeatedly and cyclically executed as a CPU runaway detection subroutine. It is set within.

[0004]

However, in such a simple runaway detection method, when an interrupt subroutine that should be executed in a normal state is not normally executed due to some trouble on the CPU side, its abnormal state ( There is a problem that the runaway state) cannot be detected.

In particular, when the interrupt subroutine to be appropriately executed is a subroutine for controlling the copy lamp and the fixing unit of the copying machine, if such an abnormal state cannot be detected, an emergency situation such as a fire will occur. there is a possibility.

It is an object of the present invention to provide a method for making the runaway detection function of the CPU more powerful.

[0007]

According to the present invention, a CPU runaway detection subroutine is set in the middle of a repeatedly executed main routine, and a CPU that issues a reset signal to a watchdog timer each time the CPU runaway detection subroutine is executed. In the runaway detection method described in (1), the CPU runaway detection subroutine issues the reset signal after confirming that an interrupt subroutine that is to be appropriately executed in normal time is operating normally.

[0008]

Since the CPU runaway detection subroutine is set in the middle of the main routine that is repeatedly and cyclically executed, the watchdog timer is longer than the maximum time interval of the time intervals at which the CPU runaway detection subroutine is executed each time. The timer time is set too long. Therefore, CP
CP if the main routine stops running due to U's runaway
Since the U runaway detection subroutine is not executed, the reset signal for the watchdog timer is not issued and the timer times out. That is, a reset signal is output from the watchdog timer to the CPU, the CPU is reset, and all loads are stopped. On the other hand, even when the main routine is normally executed repeatedly, a predetermined interrupt subroutine is normally executed as appropriate. For example, it is a timer interrupt subroutine executed at regular time intervals. CPU runaway does not necessarily affect the main routine, but may affect only some of the subroutines such as this timer interrupt subroutine. Therefore, when only such an interrupt subroutine is not executed by the CPU runaway, the runaway state cannot be detected only by the CPU runaway detection subroutine described above. Therefore, the CPU runaway detection subroutine includes a step for confirming that the interrupt subroutine is normally executed, and after confirming this step, a reset signal is output to the watchdog timer. By doing so, it is possible to detect not only the case where the main routine does not run normally but also the case where the interrupt subroutine, which should be executed properly in normal time, does not execute normally.

[0009]

1 is a block diagram of a microcomputer in which an abnormality detecting method according to the present invention is implemented. In this example, the microcomputer controls the electrophotographic copying machine.

The microcomputer includes a CPU 10 and an RO
It is composed of an M11, a RAM 12, an interrupt controller 16, a watchdog timer 17, and a general-purpose timer 18. The interrupt controller 16 receives the time-up signal of the watchdog timer 17 and the time-up signal of the timer 18, and gives the CPU 10 an interrupt address together with the interrupt signal. The CPU 10 also outputs a timer reset signal to the watchdog timer 17 and a timer time set signal to the timer 18. CP
The control signal from U10 is sent to the driver 1 via I / O13.
4 and the input data is input from the input IC 15 to the CPU 10 via the I / O 13. In addition to a clutch, a solenoid, etc., the driver 14 is connected with respective driving units of a heater lamp and an exposure lamp. Information from various sensors, for example, a sheet size, information from a transport switch arranged on the transport path of the sheet, is input to the input IC 15.

2 to 5 show a control routine stored in the ROM 11. FIG. 2 shows a main (normal) routine. This main routine includes a total of seven (S1 to S7) subroutines including subroutine steps for performing input / output control, and further includes a runaway detection control subroutine S8. The respective subroutines of S1 to S8 are repeatedly and cyclically executed.

Now, the interrupt operation of the CPU 10 in FIG. 1 will be described. The interrupt modes include a non-maskable interrupt mode and a maskable interrupt mode. The non-maskable interrupt mode is a mode that branches to the interrupt routine whenever an interrupt request is generated.The maskable interrupt mode is the enable / disable state when an interrupt request is generated by the interrupt control flag. This mode allows you to control whether to branch to the built-in routine. The former non-maskable interrupt includes a watchdog timer interrupt,
The latter maskable interrupt has a timer interrupt. In FIG. 1, the interrupt by the watchdog timer 17 is a non-maskable interrupt, and the interrupt by the timer 18 is a maskable interrupt. Since the watchdog timer 17 interrupt is a non-maskable interrupt as described above, a reset signal is surely sent to the CPU 10 when the main routine shown in FIG. However, since the interrupt by the timer 18 is a maskable interrupt, if the CPU 10 runs out of control and the interrupt control flag is in the disabled state, the interrupt from the timer 18 will not occur even if the main routine is flowing normally. I will not be accepted. In the present embodiment, such a problem is solved by setting the subroutines of FIGS. 3 and 4, and even when a runaway that cannot normally accept a maskable interrupt occurs, it can be detected. ..

FIG. 3 shows a timer interrupt subroutine which should be executed at regular intervals by a timer interrupt during normal operation. Further, FIG. 4 shows a runaway detection control subroutine executed in S8 of the main routine.

First, the runaway detection subroutine of FIG. 4 will be described. First, in S30, it is determined whether or not the content of the RAM address WDTRES is AAH (hexadecimal). If it is not AAH, nothing is processed. If it is AAH, the watchdog timer is reset in S31 and 00 is set to the RAM address WDTRES.
H is set (S32). Here, when the timer interrupt processing is entered as shown in FIG. 3, the WDTR is executed in S20.
Storing AAH in RAM address called ES, S21
, Count up timer, display at S22,
Key input processing is in progress. Therefore, it can be determined whether or not the timer interrupt process is normally executed by the step of S30, that is, whether or not the content of the RAM address WDTRES is AAH. Figure 5
Shows a copy lamp control routine included in the exposure / heater control subroutine of S7 of the main routine. If the copy lamp ON request is set in S40, it is checked in S41 whether or not the copy lamp CL is turned ON. If not, the copy lamp CL is turned ON in S42, and the timer is set to 1. Set 5 seconds. This timer is counted up by S21 of the timer interrupt subroutine of FIG. If the copy lamp CL is turned on, the time-up of the timer is checked in S44, and if the time is up, S45
In step S46, the copy lamp CL is turned off, and in step S46, the on-request flag of the copy lamp CL is turned off.

Since the timer interrupt is a maskable interrupt, if the CPU 10 runs out of control and the interrupt control flag is disabled, the timer does not expire even if the main routine is flowing normally. The copy lamp CL remains lit, which may cause smoke and fire. However, in this embodiment, the routine shown in FIGS. 3 and 4 prevents the reset signal from being output to the watchdog timer by directly exiting from S40 when the timer interrupt subroutine is not normally executed.
As in the case where the main routine does not run normally, the watchdog timer can be activated to reset the CPU 10.

[0016]

As described above, the reset signal is output to the watchdog timer even when an interrupt subroutine, such as a timer interrupt subroutine, which should be properly executed together with the main routine at normal time is not normally executed. The runaway detection capability of the CPU is enhanced. In addition, it is not necessary to add a circuit such as a watchdog timer.

[Brief description of drawings]

FIG. 1 is a block diagram of a microcomputer in which a runaway detection method according to the present invention is implemented.

FIG. 2 is a main routine executed by the microcomputer.

[Figure 3] Timer interrupt subroutine

[Fig. 4] Runaway detection control subroutine

FIG. 5: Copy lamp control subroutine

[Explanation of symbols]

 10-CPU 17-Watchdog timer 18-Timer

Claims (1)

[Claims] 1. A runaway detection method for a CPU, wherein a CPU runaway detection subroutine is set in the middle of a repeatedly executed main routine, and the CPU runaway detection subroutine issues a reset signal to a watchdog timer each time it is executed. In the runaway detection subroutine, the reset signal is issued after confirming that the interrupt subroutine that should be executed in normal time is operating normally, and the CPU runaway detection method.