JPH0529507A - Substrate for semiconductor - Google Patents

Substrate for semiconductor

Info

Publication number
JPH0529507A
JPH0529507A JP17811291A JP17811291A JPH0529507A JP H0529507 A JPH0529507 A JP H0529507A JP 17811291 A JP17811291 A JP 17811291A JP 17811291 A JP17811291 A JP 17811291A JP H0529507 A JPH0529507 A JP H0529507A
Authority
JP
Japan
Prior art keywords
plate
substrate
heat dissipation
multilayer substrate
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17811291A
Other languages
Japanese (ja)
Inventor
Norimi Kikuchi
紀實 菊池
Hiroyuki Kawamura
裕之 川村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronics Engineering Corp
Original Assignee
Toshiba Corp
Toshiba Material Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Material Engineering Co Ltd filed Critical Toshiba Corp
Priority to JP17811291A priority Critical patent/JPH0529507A/en
Publication of JPH0529507A publication Critical patent/JPH0529507A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】 【目的】本発明の目的は、熱伝導性に優れた放熱板を備
え、クラックや反りの発生が少なく信頼性が高い半導体
用基板を提供することにある。 【構成】本発明に係る半導体用基板は、窒化アルミニウ
ム焼結体で形成した多層基板1aと、この多層基板1a
に配置した半導体素子3から発生した熱を伝達する放熱
板2aとを備えた半導体用基板において、上記放熱板2
aはモリブデン板7aの両面にそれぞれ銅板8a,8a
を一体に接合した複合材9aで形成したことを特徴とす
る。またモリブデン板7aおよび各銅板8a,8aの厚
さは0.03〜0.3mmの範囲内に設定するとよい。
(57) [Summary] [Object] It is an object of the present invention to provide a highly reliable semiconductor substrate that includes a heat dissipation plate having excellent thermal conductivity, has few cracks and warps, and has high reliability. [Structure] A semiconductor substrate according to the present invention is a multilayer substrate 1a formed of an aluminum nitride sintered body, and this multilayer substrate 1a.
A heat dissipation plate 2a for transmitting heat generated from the semiconductor element 3 arranged in
a is copper plates 8a and 8a on both sides of the molybdenum plate 7a, respectively.
It is characterized in that it is formed of a composite material 9a that is integrally joined. The thickness of the molybdenum plate 7a and the copper plates 8a, 8a is preferably set within the range of 0.03 to 0.3 mm.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電子機器等を構成する半
導体用基板に係り、特に放熱板を有しているため放熱特
性が優れ、また放熱板との熱膨脹差に起因する基板の割
れや剥離を防止できる信頼性が高い半導体用基板に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate which constitutes an electronic device or the like, and in particular, it has a heat dissipation plate, so that it has excellent heat dissipation characteristics. The present invention relates to a highly reliable semiconductor substrate capable of preventing peeling.

【0002】[0002]

【従来の技術】従来一般的に使用されている半導体用基
板は、絶縁材としてのアルミナ(Al2 3 )グリーン
シート上に所望の回路パターン等を印刷したものを複数
枚積層して一体化し、さらに焼成した多層基板と、その
多層基板に配置された半導体ICチップから発生した熱
をヒートシンク等の冷却部に迅速に伝達するための放熱
板とを備えて構成される。放熱板としてはタングステン
(W)中に10〜20%程度のCu(銅)を合金化した
Cu/W合金が使用されており、このCu/W合金の熱
膨脹係数は、ほぼアルミナ(Al2 3 )と等しく設定
されている。従って、多層基板にCu/W合金製の放熱
板をろう付け等によって一体に接合する場合や電子機器
の運転時において半導体チップが発熱した場合において
も、多層基板に熱応力による割れや剥離を生じることも
少ない。
2. Description of the Related Art Conventionally generally used semiconductor substrates are formed by laminating a plurality of sheets of alumina (Al 2 O 3 ) green sheet as an insulating material on which desired circuit patterns and the like are printed. It further comprises a fired multilayer substrate and a heat radiating plate for rapidly transmitting heat generated from the semiconductor IC chips arranged on the multilayer substrate to a cooling unit such as a heat sink. As the heat dissipation plate, a Cu / W alloy obtained by alloying 10% to 20% Cu (copper) in tungsten (W) is used, and the thermal expansion coefficient of this Cu / W alloy is almost equal to that of alumina (Al 2 O 3 ) is set equal to. Therefore, even when a Cu / W alloy heat dissipation plate is integrally joined to the multilayer substrate by brazing or when the semiconductor chip generates heat during the operation of the electronic device, the multilayer substrate is cracked or peeled due to thermal stress. There are few things.

【0003】ところで、近年半導体を使用した電子機器
および電力機器の高速化、小型化、高集積高性能化がよ
り希求され、例えば動作速度が50〜100ns程度の
高速用(ECL)セラミックス多層基板が主流となりつ
つあり、さらに、消費電力が高く発熱量が大きなバイポ
ーラデバイスなどに使用される半導体用基板において
は、半導体チップからの発熱をより効率的に系外に排出
できる熱設計が求められている。
By the way, in recent years, there has been a strong demand for higher speed, smaller size, and higher integration and performance of electronic devices and power devices using semiconductors. For example, a high speed (ECL) ceramic multilayer substrate having an operating speed of about 50 to 100 ns has been developed. For semiconductor substrates that are becoming mainstream and are used in bipolar devices that consume a large amount of power and generate a large amount of heat, there is a demand for a thermal design that allows the heat generated from the semiconductor chips to be more efficiently discharged to the outside of the system. .

【0004】[0004]

【発明が解決しようとする課題】しかしながら、従来の
多層基板用セラミックス材料として一般に使用されてい
るアルミナ(Al2 3 )は、電気的特性および機械的
特性には優れているものの、熱伝導率(K)が17W/
m・k程度と低い難点があり、高速で消費電力が大きい
デバイスには不向きであった。そこでアルミナと比較し
て熱伝導率が極めて高く、放熱性に優れたベリリア(B
eO)や窒化アルミニウム(AlN)を使用する場合も
ある。
However, although alumina (Al 2 O 3 ) generally used as a conventional ceramic material for multilayer substrates has excellent electrical and mechanical properties, it has a high thermal conductivity. (K) is 17W /
Since it has a low difficulty of about m · k, it is not suitable for a high speed and high power consumption device. Therefore, compared with alumina, beryllia (B
eO) or aluminum nitride (AlN) may be used.

【0005】ところがベリリアは、原料調製工程におい
て有毒ガスが発生するため、問題があり、この代替材料
としてBeOとほぼ同等の熱伝導率を有し、特に熱伝導
性に優れた窒化アルミニウム焼結体が注目されている。
However, beryllia has a problem because it emits a toxic gas in the raw material preparation process, and as an alternative material, it has a thermal conductivity almost equal to that of BeO, and an aluminum nitride sintered body having a particularly excellent thermal conductivity. Is attracting attention.

【0006】しかしながら、この窒化アルミニウム焼結
体に従来からのCu/W合金で形成した放熱板をろう接
合しようとすると、窒化アルミニウム製多層基板にクラ
ックが生じたり、放熱板が大きく反ってしまう傾向があ
る。すなわち従来のCu/W合金製放熱板は、アルミナ
の熱膨脹率に等しく設定されており、窒化アルミニウム
製多層基板に接合された場合には、両部材の熱膨脹率が
大きく異なるため、部材相互間に、熱応力を生じクラッ
クや反りを生じてしまうのである。
However, when a conventional heat dissipation plate made of a Cu / W alloy is brazed to this aluminum nitride sintered body, the aluminum nitride multilayer substrate tends to crack or the heat dissipation plate is largely warped. There is. That is, the conventional Cu / W alloy heat dissipation plate is set to have the same thermal expansion coefficient as that of alumina, and when bonded to an aluminum nitride multilayer substrate, the thermal expansion coefficients of both members are greatly different. However, thermal stress is generated, which causes cracks and warpage.

【0007】熱膨脹差を緩和するために、Cuの含有量
を8%程度以下にした場合には、割れを発生することな
く接合は可能となるが、熱伝導性が急激に低下してしま
う問題点がある。
When the content of Cu is set to about 8% or less in order to reduce the difference in thermal expansion, bonding can be performed without cracking, but the thermal conductivity is sharply reduced. There is a point.

【0008】本発明は上記問題点を解決するためになさ
れたものであり、熱伝導性に優れた放熱板を備え、クラ
ックや反りの発生が少なく信頼性が高い半導体用基板を
提供することを目的とする。
The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a highly reliable semiconductor substrate provided with a heat dissipation plate having excellent thermal conductivity and having few cracks and warps. To aim.

【0009】[0009]

【課題を解決するための手段】上記目的を達成するた
め、本発明は窒化アルミニウム焼結体で形成した多層基
板と、この多層基板に配置した半導体素子から発生した
熱を伝達する放熱板とを備えた半導体用基板において、
上記放熱板はモリブデン板の両面にそれぞれ銅板を一体
に接合した複合材で形成したことを特徴とする。
In order to achieve the above object, the present invention provides a multilayer substrate formed of an aluminum nitride sintered body and a heat dissipation plate for transmitting heat generated from a semiconductor element arranged on the multilayer substrate. In the provided semiconductor substrate,
The heat dissipation plate is characterized by being formed of a composite material in which copper plates are integrally bonded to both surfaces of a molybdenum plate.

【0010】また、モリブデン板および各銅板の厚さを
0.03〜0.3mmの範囲内に設定するとよい。
The thickness of the molybdenum plate and each copper plate may be set within the range of 0.03 to 0.3 mm.

【0011】本発明において、多層基板は複数の絶縁層
としての窒化アルミニウム製焼結体とメタライズ層とを
交互に積層して形成され、熱伝導率Kが170W/m・
k以上であり、室温から500℃の温度範囲における熱
膨脹率が5〜6×10-6/℃である。この多層基板に金
属製の放熱板が一体に接合されて、半導体基板が製造さ
れる。
In the present invention, the multilayer substrate is formed by alternately stacking a plurality of aluminum nitride sintered bodies as an insulating layer and a metallized layer, and has a thermal conductivity K of 170 W / m.multidot.
k or more, and the coefficient of thermal expansion in the temperature range from room temperature to 500 ° C. is 5 to 6 × 10 −6 / ° C. A heat sink made of metal is integrally bonded to the multilayer substrate to manufacture a semiconductor substrate.

【0012】放熱板は各種ろう材を使用して、窒化アル
ミニウム製の絶縁部もしくはメタライズ部に接合され
る。また放熱板とろう材とのなじみを改善し接合強度を
高めるために、予め放熱板の接合面に、厚さ1〜5μm
のNi,Au等のめっき層を形成しておくとよい。
The heat radiating plate is joined to the insulating portion or metallized portion made of aluminum nitride by using various brazing materials. In addition, in order to improve the familiarity between the heat sink and the brazing filler metal and increase the joint strength, a thickness of 1 to 5 μm is previously formed on the joint surface of the heat sink.
It is preferable to form a plating layer of Ni, Au, or the like.

【0013】放熱板はMo板の両面に所定厚さのCu板
をそれぞれ貼りつけたクラッド材等の複合材で形成され
る。三層構造の複合材の両面側に同一材料であるCu板
を配しているため、複合材自体に温度変化による反りを
発生するおそれが少ない。また窒化アルミニウム製多層
基板の熱膨脹率に近似した熱膨脹率を有するMo板を心
材に据えて、その両側に配したCu板の熱膨脹を拘束す
る構造を有するため、多層基板に作用する熱応力を緩和
することが可能になる。従って従来のCu/W製の放熱
板を多層基板にろう付接合する際において、クラックや
反り等が発生することが少ない。
The heat radiating plate is made of a composite material such as a clad material in which a Cu plate having a predetermined thickness is attached to both sides of a Mo plate. Since Cu plates, which are the same material, are arranged on both sides of the composite material having a three-layer structure, the composite material itself is less likely to warp due to temperature change. In addition, since a Mo plate having a coefficient of thermal expansion similar to that of the aluminum nitride multilayer substrate is installed as a core material and the Cu plates arranged on both sides of the Mo plate are restrained from thermal expansion, thermal stress acting on the multilayer substrate is relaxed. It becomes possible to do. Therefore, when a conventional Cu / W radiator plate is brazed to a multilayer substrate, cracks and warpage are less likely to occur.

【0014】また複合材で形成した放熱板を構成するM
o板およびCu板の厚さは半導体用基板全体の強度およ
び熱伝導性に大きな影響を及ぼすため、0.03〜0.
3mmの範囲に設定するとよい。すなわち厚さが0.03
mm未満の場合には、基板を補強する機能が低下する一
方、厚さが0.3mmを超える場合には放熱板の熱伝導率
を低下せしめ、放熱性が悪化してしまう。上記厚さの範
囲内において複合化した放熱板であれば、クラックや反
りを発生することなく、多層基板にろう付け接合するこ
とが可能である。Mo板、Cu板の厚さが薄いほど、熱
伝導率が大きくなり、上記板厚範囲における放熱板の熱
伝導率Kは200〜260W/m・kであり、窒化アル
ミニウム製の多層基板とほぼ同等の値となる。
Further, M constituting a heat dissipation plate made of a composite material
The thicknesses of the o-plate and the Cu-plate have a great influence on the strength and thermal conductivity of the entire semiconductor substrate.
It is recommended to set it within the range of 3 mm. That is, the thickness is 0.03
When the thickness is less than mm, the function of reinforcing the substrate is deteriorated, while when the thickness is more than 0.3 mm, the heat conductivity of the heat dissipation plate is decreased, and the heat dissipation is deteriorated. A composite heat dissipation plate within the above thickness range can be brazed and bonded to a multilayer substrate without causing cracks or warpage. The thinner the Mo plate and the Cu plate are, the higher the thermal conductivity is, and the thermal conductivity K of the heat dissipation plate in the plate thickness range is 200 to 260 W / m · k, which is almost the same as that of the aluminum nitride multilayer substrate. Equivalent value.

【0015】[0015]

【作用】上記構成に係る半導体用基板によれば、Mo板
の両面にそれぞれ銅板を一体に接合した複合材で放熱板
を形成しているため、熱膨脹率が大きい銅板に、発生す
る熱応力をMo板に吸収させることができ、放熱板全体
として高い熱伝導性を保ちつつ、窒化アルミニウム製多
層基板に近い熱膨脹率を有する放熱板が得られる。従っ
て、放熱板の接合時に多層基板に割れ(クラック)が発
生することが少なく高い信頼性を有する半導体基板が得
られる。またMo板の両面に同等の熱膨脹率を有する銅
板を接合しているため放熱板に反りが発生することも少
ない。
According to the semiconductor substrate having the above structure, since the heat dissipation plate is formed of the composite material in which the copper plates are integrally bonded to both surfaces of the Mo plate, the thermal stress generated on the copper plate having a large coefficient of thermal expansion is prevented. It is possible to obtain a heat sink that can be absorbed by the Mo plate and has a coefficient of thermal expansion close to that of an aluminum nitride multilayer substrate while maintaining high thermal conductivity as a whole of the heat sink. Therefore, it is possible to obtain a highly reliable semiconductor substrate in which cracks are less likely to occur in the multilayer substrate when the heat sink is joined. Further, since the copper plates having the same coefficient of thermal expansion are bonded to both surfaces of the Mo plate, the heat dissipation plate is less likely to warp.

【0016】[0016]

【実施例】次に本発明の実施例について、添付図面を参
照して説明する。図1〜4はそれぞれ本発明に係る半導
体用基板の第1〜第4実施例を示す断面図であり、図5
は各実施例において使用する放熱板の構造を示す断面図
である。
Embodiments of the present invention will now be described with reference to the accompanying drawings. 1 to 4 are cross-sectional views showing first to fourth embodiments of the semiconductor substrate according to the present invention.
FIG. 4 is a cross-sectional view showing the structure of a heat dissipation plate used in each example.

【0017】実施例1 図1および図6に示す実施例1の半導体用基板で使用す
る窒化アルミニウム製多層基板1aを以下の工程で10
0個製造した。
[0017] Example 1 Figure 1 and aluminum nitride multilayer substrate 1a for use in semiconductor substrate of the first embodiment shown in FIG. 6 with the following steps 10
0 pieces were manufactured.

【0018】すなわちAIN原料粉と、常圧焼結助剤と
しての酸化イットリウム(Y2 3 )3重量%とを含有
する粉体を泥漿化し、スラリーを得た。次に得られたス
ラリーをドクターブレード法によって厚さ0.7mmのグ
リーンシート(GS)に成形後、1辺が53mmで正方形
状となるようにブランク型で多数打ち抜き、さらに配線
パターンを印刷するとともにタングステン(W)を主体
とする導体ペーストで、電極パッド、ワイヤボンディン
グパッドなどの配線部を印刷した。
That is, a powder containing AIN raw material powder and 3% by weight of yttrium oxide (Y 2 O 3 ) as a normal pressure sintering aid was slurried to obtain a slurry. Next, after molding the obtained slurry into a green sheet (GS) with a thickness of 0.7 mm by the doctor blade method, a large number of blanks are punched out so that one side is 53 mm and a square shape is formed, and further a wiring pattern is printed. Wiring parts such as electrode pads and wire bonding pads were printed with a conductive paste mainly composed of tungsten (W).

【0019】そして複数のグリーンシートを熱圧着法で
一体に積層して厚さ3mmの積層体とした後に、脱脂後、
2 ガス雰囲気で温度1800℃で6時間加熱して焼結
を行ない、1辺が42mmの正方形状で厚さが2mmの焼結
体とした。
Then, a plurality of green sheets are integrally laminated by thermocompression bonding to form a laminated body having a thickness of 3 mm, and after degreasing,
Sintering was carried out by heating in an N 2 gas atmosphere at a temperature of 1800 ° C. for 6 hours to obtain a sintered body having a square shape with a side of 42 mm and a thickness of 2 mm.

【0020】一方、図5に示すように、心材として厚さ
0.13mmのMo板7aの両面にそれぞれ厚さ0.1mm
のCu板8a,8aをクラッドした圧延複合材9aを打
ち抜いて1辺が25mmの正方形状の放熱板2aを多数製
造した。次にこの放熱板2aに直接LSI回路素子3を
接合した後に、この放熱板2aをさらに多層基板1aの
中空部の周縁上に形成した金属化層(メタライズ層)4
a上に銀ろう材5を用いて接合した。接合時の温度は8
00〜850℃に設定した。そして、放熱板2aの接合
時に、多層基板1aに発生したクラックや反りの発生割
合を測定するために、倍率100倍の金属顕微鏡および
倍率2000倍の走査型電子顕微鏡(SEM)で各半導
体用基板を観察した。
On the other hand, as shown in FIG. 5, as a core material, a 0.13 mm thick Mo plate 7a has a thickness of 0.1 mm on each side.
The rolled composite material 9a in which the Cu plates 8a and 8a were clad was punched out to manufacture a large number of square heat dissipation plates 2a each having a side of 25 mm. Next, after directly bonding the LSI circuit element 3 to the heat dissipation plate 2a, the heat dissipation plate 2a is further formed on the peripheral edge of the hollow portion of the multilayer substrate 1a.
Bonding was performed using a silver brazing material 5 on a. The temperature at the time of joining is 8
The temperature was set to 00 to 850 ° C. Then, in order to measure the rate of occurrence of cracks and warpage in the multilayer substrate 1a when the heat sink 2a is joined, a substrate for each semiconductor is measured with a metal microscope with a magnification of 100 times and a scanning electron microscope (SEM) with a magnification of 2000 times. Was observed.

【0021】また各半導体基板について500サイクル
の熱衝撃試験(TCT)を実施した。試験条件は、−5
5℃、室温(RT)および150℃の3温度にそれぞれ
10分間保持する操作を1サイクルとした。また室温
(RT)から450℃に昇熱して10分間保持し、室温
(RT)に戻す1サイクル限りの熱衝撃試験を併せて実
施し、倍率2000倍のSEMにて、多層基板1aの割
れや放熱板2aの反りの発生割合を計数して表1に示す
結果を得た。
A thermal shock test (TCT) of 500 cycles was performed on each semiconductor substrate. The test condition is -5
The operation of holding each of the three temperatures of 5 ° C., room temperature (RT) and 150 ° C. for 10 minutes was set as one cycle. In addition, a thermal shock test for one cycle was also performed in which the temperature was raised from room temperature (RT) to 450 ° C. and held for 10 minutes and returned to room temperature (RT). The rate of warpage of the heat sink 2a was counted and the results shown in Table 1 were obtained.

【0022】実施例2 実施例2として図2および図6に示す半導体用基板を多
数製造した。この半導体用基板は、有底の中空部6bを
有する多層基板1bを用い、またLSI回路素子3を放
熱板2bと絶縁し、放熱板2bを多層基板1bの上面に
形成した金属化層4bの全面に渡ってAgろう材5を使
用してろう付け接合した以外は、実施例1と同様な条件
工程で製造した。そして、実施例1と同様にして接合時
および各熱衝撃試験後における割れや反りの発生割合を
計測して表1に示す結果を得た。
[0022] was prepared a large number of semiconductor substrate illustrated in FIGS. 2 and 6 as Example 2 Example 2. As this semiconductor substrate, a multilayer substrate 1b having a hollow portion 6b with a bottom is used, and the LSI circuit element 3 is insulated from a heat radiating plate 2b, and the heat radiating plate 2b is a metallized layer 4b formed on the upper surface of the multilayer substrate 1b. Manufactured under the same condition process as in Example 1 except that the entire surface was brazed and bonded using the Ag brazing material 5. Then, in the same manner as in Example 1, the occurrence rates of cracking and warpage were measured during joining and after each thermal shock test, and the results shown in Table 1 were obtained.

【0023】実施例3 実施例3として実施例1で調製したところの中空部6a
を有する多層基板1aの上面に下記要領でTi系ろう材
(半田合金)10を使用して温度850〜950℃にて
放熱板2bを一体にろう付け接合し、図3および図7に
示す半導体用基板を多数製造した。
Example 3 Hollow part 6a prepared in Example 1 as Example 3
3 and 7, the Ti-based brazing material (solder alloy) 10 is used to integrally braze the heat dissipation plate 2b at a temperature of 850 to 950 ° C. on the upper surface of the multilayer substrate 1a having the structure shown in FIGS. Many substrates were manufactured.

【0024】ここで放熱板2bは、図5に示すように、
心材として厚さ0.17mmのMo板7bの両面にそれぞ
れ厚さ0.15mmのCu板8b,8bをクラッドした圧
延複合材9bを打ち抜いて1辺が25mmの正方形状に形
成した。
Here, the heat radiating plate 2b is, as shown in FIG.
As a core material, a rolled composite material 9b having 0.15 mm thick Cu plates 8b, 8b clad on both sides of a 0.17 mm thick Mo plate 7b was punched out to form a square shape with one side of 25 mm.

【0025】そして各半導体用基板について、実施例1
と同様にして、放熱板2bの接合時および各熱衝撃試験
後における割れ等の発生割合を調査した。
Regarding each semiconductor substrate, Example 1
Similarly to the above, the occurrence ratio of cracks and the like at the time of joining the heat sink 2b and after each thermal shock test was investigated.

【0026】実施例4 実施例4として実施例2で調製した有底の中空部6bを
有する多層基板1bの上面に、実施例3で調製した放熱
板2bをTi系ろう材10を使用して一体にろう付け接
合し、図4および図7に示す半導体用基板を多数製造し
た。この半導体用基板はLSI回路素子3を放熱板2b
から絶縁し、放熱板2bの全面を窒化アルミニウム製の
多層基板1bの上面に接合して形成されている。
[0026] upper surface of the multilayer substrate 1b having a hollow portion 6b bottomed prepared in Example 2 Example 4 Example 4, the heat radiating plate 2b prepared in Example 3 using a Ti-based brazing material 10 A large number of semiconductor substrates shown in FIGS. 4 and 7 were manufactured by integrally brazing and joining. This semiconductor substrate has the LSI circuit element 3 and the heat sink 2b.
Is formed by bonding the entire surface of the heat dissipation plate 2b to the upper surface of the multilayer substrate 1b made of aluminum nitride.

【0027】そして実施例1と同様に各半導体用基板に
ついて熱衝撃試験等を実施し、割れや反りの発生割合を
測定した。
Then, in the same manner as in Example 1, each semiconductor substrate was subjected to a thermal shock test and the like, and the rate of occurrence of cracks and warpage was measured.

【0028】比較例1 比較例1として、従来のCu/W合金製の放熱板を使用
した以外は実施例1と全く同一構造および寸法を有する
半導体用基板を多数調製し、割れや反りの発生割合を調
査し、下記表1に示す結果を得た。
Comparative Example 1 As Comparative Example 1, a large number of semiconductor substrates having the same structure and dimensions as in Example 1 were prepared except that a conventional Cu / W alloy heat sink was used, and cracks and warpage occurred. The ratio was investigated and the results shown in Table 1 below were obtained.

【0029】[0029]

【表1】 [Table 1]

【0030】表1に示す結果から明らかなように、実施
例1〜4に係る半導体用基板では、高い熱伝導率を有す
る窒化アルミニウム基板の特徴を損うことなく、多層基
板に割れを生じたり放熱板に反り等を発生することなく
放熱板を接合することが可能になり、より発熱量が大き
な電子機器等に搭載できることが判明した。
As is clear from the results shown in Table 1, in the semiconductor substrates according to Examples 1 to 4, the multi-layer substrate was cracked without impairing the characteristics of the aluminum nitride substrate having high thermal conductivity. It has become clear that the heat sink can be joined to the heat sink without warping or the like, and the heat sink can be mounted on an electronic device or the like that generates a larger amount of heat.

【0031】一方比較例1においては多層基板と放熱板
との熱膨脹差が著しいため、放熱板の接合時や熱衝撃に
よって割れや反りが発生し易く、製品の歩留りおよび信
頼性がともに低下し、実用には耐えないことが判明し
た。
On the other hand, in Comparative Example 1, since the difference in thermal expansion between the multilayer substrate and the heat sink is significant, cracking or warpage is likely to occur at the time of joining the heat sinks or due to thermal shock, resulting in a decrease in both product yield and reliability. It turned out that it could not be put to practical use.

【0032】[0032]

【発明の効果】以上説明の通り本発明に係る半導体用基
板によれば、Mo板の両面にそれぞれ銅板を一体に接合
した複合材で放熱板を形成しているため、熱膨脹率が大
きい銅板に、発生する熱応力をMo板に吸収させること
ができ、放熱板全体として高い熱伝導性を保ちつつ、窒
化アルミニウム製多層基板に近い熱膨脹率を有する放熱
板が得られる。従って、放熱板の接合時に多層基板に割
れ(クラック)が発生することが少なく高い信頼性を有
する半導体基板が得られる。またMo板の両面に同等の
熱膨脹率を有する銅板を接合しているため放熱板に反り
が発生することも少ない。
As described above, according to the semiconductor substrate of the present invention, since the heat dissipation plate is formed of the composite material in which the copper plates are integrally bonded to both surfaces of the Mo plate, the copper plate having a large coefficient of thermal expansion can be obtained. The generated heat stress can be absorbed by the Mo plate, and a heat sink having a coefficient of thermal expansion close to that of an aluminum nitride multilayer substrate can be obtained while maintaining high thermal conductivity as a whole of the heat sink. Therefore, it is possible to obtain a highly reliable semiconductor substrate in which cracks are less likely to occur in the multilayer substrate when the heat sink is joined. Further, since the copper plates having the same coefficient of thermal expansion are bonded to both surfaces of the Mo plate, the heat dissipation plate is less likely to warp.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る半導体用基板の第1実施例を示す
断面図。
FIG. 1 is a sectional view showing a first embodiment of a semiconductor substrate according to the present invention.

【図2】本発明の第2実施例を示す断面図。FIG. 2 is a sectional view showing a second embodiment of the present invention.

【図3】本発明の第3実施例を示す断面図。FIG. 3 is a sectional view showing a third embodiment of the present invention.

【図4】本発明の第4実施例を示す断面図。FIG. 4 is a sectional view showing a fourth embodiment of the present invention.

【図5】各実施例において使用する放熱板の構造を示す
断面図。
FIG. 5 is a cross-sectional view showing the structure of a heat dissipation plate used in each example.

【図6】図1〜2に示す半導体用基板の平面図。FIG. 6 is a plan view of the semiconductor substrate shown in FIGS.

【図7】図3〜4に示す半導体用基板の平面図。FIG. 7 is a plan view of the semiconductor substrate shown in FIGS.

【符号の説明】[Explanation of symbols]

1a,1b 多層基板 2a 放熱板 3 LSI回路素子 4a,4b 金属化層(メタライズ層) 5 銀ろう材 6a,6b 中空部 7a,7b Mo板 8a,8b Cu板 9a,9b 圧延複合材 10 Ti系ろう材 1a, 1b Multilayer substrate 2a heat sink 3 LSI circuit element 4a, 4b Metallized layer (metallized layer) 5 Silver brazing material 6a, 6b hollow part 7a, 7b Mo plate 8a, 8b Cu plate 9a, 9b Rolled composite material 10 Ti-based brazing material

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 窒化アルミニウム焼結体で形成した多層
基板と、この多層基板に配置した半導体素子から発生し
た熱を伝達する放熱板とを備えた半導体用基板におい
て、上記放熱板はモリブデン板の両面にそれぞれ銅板を
一体に接合した複合材で形成したことを特徴とする半導
体用基板。
1. A semiconductor substrate comprising a multi-layer substrate made of an aluminum nitride sintered body and a heat-dissipating plate for transmitting heat generated from a semiconductor element arranged on the multi-layer substrate, wherein the heat-dissipating plate is a molybdenum plate. A semiconductor substrate, which is formed of a composite material in which copper plates are integrally bonded to both surfaces.
【請求項2】 モリブデン板および各銅板の厚さを0.
03〜0.3mmの範囲内に設定したことを特徴とする請
求項1記載の半導体用基板。
2. A molybdenum plate and each copper plate having a thickness of 0.
The substrate for semiconductor according to claim 1, wherein the substrate is set within a range of 03 to 0.3 mm.
JP17811291A 1991-07-18 1991-07-18 Substrate for semiconductor Pending JPH0529507A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17811291A JPH0529507A (en) 1991-07-18 1991-07-18 Substrate for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17811291A JPH0529507A (en) 1991-07-18 1991-07-18 Substrate for semiconductor

Publications (1)

Publication Number Publication Date
JPH0529507A true JPH0529507A (en) 1993-02-05

Family

ID=16042869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17811291A Pending JPH0529507A (en) 1991-07-18 1991-07-18 Substrate for semiconductor

Country Status (1)

Country Link
JP (1) JPH0529507A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002246659A (en) * 2001-02-14 2002-08-30 Komatsu Ltd Thermoelectric module
JP2007142126A (en) * 2005-11-18 2007-06-07 Allied Material Corp Composite material and semiconductor-mounted heat dissipation substrate, and ceramic package using the same
JP2013247158A (en) * 2012-05-23 2013-12-09 Denki Kagaku Kogyo Kk Ceramic circuit board
EP2991105A4 (en) * 2013-04-26 2016-12-07 Kyocera Corp COMPOSITE LAMINATE AND ELECTRONIC DEVICE

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002246659A (en) * 2001-02-14 2002-08-30 Komatsu Ltd Thermoelectric module
JP2007142126A (en) * 2005-11-18 2007-06-07 Allied Material Corp Composite material and semiconductor-mounted heat dissipation substrate, and ceramic package using the same
JP2013247158A (en) * 2012-05-23 2013-12-09 Denki Kagaku Kogyo Kk Ceramic circuit board
EP2991105A4 (en) * 2013-04-26 2016-12-07 Kyocera Corp COMPOSITE LAMINATE AND ELECTRONIC DEVICE

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