JPH05308603A - Image signal selection device - Google Patents

Abstract

PURPOSE:To reproduce the image signal of a memory device to be reproduced next time on a monitor by providing a manual operating means which inputs only the requirement of input of the image signal reproduced on the monitor. CONSTITUTION:A camera is comprised of an image pickup part 1 which photoelectrically converts a subject image to a still picture signal, and a storage part 2 equipped with memory of 20 frames in which still picture information of one frame is stored, and they are comprised so as to be separated. The image signal to be transferred to the magnetic cassette tape 302 of a converter 3 is selected from the image signal of 20 frames stored in the storage part 2. In other words, a monitor 4 to make the image signal into an image, and a keyboard 303 to input the requirement of transfer of the Image signal are provided. When the designation of the requirement of transfer for the image signals in all the frames stored in the storage part 2 are completed, the monitor 4 displays the completion of designation of the requirement.

Description

Detailed Description of the Invention

The present invention relates to an electronic camera provided with an image pickup device for converting a subject image into a still image signal corresponding to one frame and an internal storage device capable of storing the still image signal for a plurality of frames. Conventionally, in this type of camera, miniaturization has been aimed at in order to improve portability. Therefore, it is conceivable to reduce the storage capacity of the internal storage device, which requires a relatively large space, and to downsize it. Since this small-capacity internal storage device has a capacity of, for example, about 20 frames of still images, it is desirable to transfer the stored contents to an external large-capacity storage device so that it can be reused. Further, this type of electronic camera has a built-in power supply battery for supplying power to the image pickup device and the internal storage device. Needless to say, depleting this power battery will lead to shooting failures. For this reason, it was necessary to check without fail during maintenance of the battery without failing to maintain and manage the battery. However, it was tedious and easy to forget to check every shot like this.

An object of the present invention is to connect a power supply battery of an electronic camera to a rechargeable battery and to connect the electronic camera to transfer a still image signal stored in an internal storage device to an external storage device. An object of the present invention is to provide an electronic camera system that is compact and does not require maintenance and management of the power supply battery by preparing a converter that can also charge the power supply battery.

1 and 2 show the appearance of an embodiment of an electronic camera using the present invention. The camera comprises an image pickup unit 1 for photoelectrically converting a subject image into a still image signal, and a storage unit 2 having a memory for storing one frame of still image information for 20 frames. Both of these parts are shown in Figure 3.
It can be separated as shown in (a) and (b). A photographing lens 10 is mounted on the front surface of the image pickup unit 1, and the lens 10 forms a subject image on the image pickup surface of an image pickup device 11 arranged inside the image pickup unit 1 as shown in the sectional view of FIG. .. A diaphragm 10 a is arranged on the lens 10, and a mosaic filter 11 a for color separation is arranged on the front surface of the image sensor 11. Further, the image pickup unit 1 is provided with a finder 12 penetrating from the front surface to the rear surface thereof to define a photographing field of view, and in FIG. 1, a contact 13 for attaching an external light source such as a speedlight is provided on the upper surface thereof. Accessory shoe 14
And a release button 15 are provided. The release button 1
When 5 is pressed down a little, it is inserted into the power supply circuit, the power supply switch is turned on, and power is supplied. Along with this, the photometric operation is performed. When the release button 15 is pressed deeply, the power supply switch remains ON and the shooting sequence is further started. Once the shooting sequence is started, it does not stop even if the release button 15 is released halfway. Further, the power supply switch is kept ON until the shooting sequence is completed. In FIG. 2, the rear surface of the imaging unit 1 is the storage unit 2
Mode selection lever 16 for selecting one of the automatic access mode, the manual access mode and the multiple exposure mode of the memory cell address, the push button 17 for the manual access, and the memory currently accessed. 7 segment display device such as liquid crystal for displaying the address of
And a switch 19 for disabling the sound warning device. Further, a mounting screw 100 for mounting an external accessory such as a data imprinting device or an electronic monitor device for monitoring a subject image on the side surface of the imaging unit 1.
And a connector 130 for the accessory, respectively.

On the rear surface of the storage unit 2, as shown in FIG. 2, a display device 201 such as a liquid crystal display or an electrochromic display for displaying the address of a used memory, and a storage capacity (the total number of memory cells, that is, storable). The label 202 on which the number of frames) and the like are printed is provided. Further, as shown in FIG. 3B, there is a detachable slider 203 on the side surface.
The detachable key 204 protruding on the upper surface of the storage unit 2 which slides this to the right slides in the same direction, and the storage unit 2 is disengaged from the fixed key (not shown) in the corresponding portion of the imaging unit 1. It can be detached from the imaging unit 1. T in storage unit 2
A groove 205 is provided, which engages with the guide member 131 on the side of the imaging unit and guides it at the time of attachment / detachment.

On the upper surface of the storage unit 2, a connector 206,
The pin 207 is erected. The connector 206 is connected to a corresponding connector (not shown) of the image pickup unit 1 to mutually transmit electric signals. The pin 207 is attached to the image pickup unit 1 and the storage unit 2
The storage capacity of is transmitted mechanically. FIG. 5 illustrates an internal structure of the image pickup device 11 of the image pickup unit 1. This is a CCD using a so-called interline type charge engagement device (CCD)
In the image sensor, the light receiving elements a ₁ and a _{1, 2} , ..., a
_{1 · n} , a _{2 · n} , ... _{Am · 1} , a _{m · 2} , ..., _{Am · n} are arranged in a matrix of m × n to form a light receiving unit. The total number of light receiving elements, that is, the number of pixels is 10 ^6.
It is desirable to have about one. Columns in these light receiving elements, for example _{a 1 · 1, a 2 ·} 1 ......, transfer target TG 1 _{· 1} and TG 2 _{· 1} is disposed on each of both sides of a m _{· 1.} Gate TG _{1 · 1} transfer signal φ through the terminal 11C
_{When TG1} is applied, the charges corresponding to the amount of incident light accumulated in each element are transferred to the vertical CCD analog shift register S _v1 . While the gate TG 2 _{· 1} transfer signal phi _TG2 via the terminal 11b to transfer the application and the charge to the area OD ₁ of the overflow drain. Incidentally, the electrical potential of the transfer gate TG 2 _{· 1,} the transfer signal φ
_{Even when TG2} is not applied, it is slightly lower than the potential between the light receiving elements and the potential between each bit of the vertical shift register S _v1 . Therefore, the charges overflowing from the potential well of the light receiving element flow in the direction of the lower barrier, that is, the overflow drain OD ₁ , and the blooming phenomenon is prevented. The above is exactly the same for other rows of light receiving elements. Overflow drain OD from the output terminal 11a
_1, ..., charges transferred to OD _n is outputted, the transfer target TG _{2 ·} 1 ... to the input terminal 11b, TG
The transfer signal φ _TG2 to _{2 · n} is input _, and the transfer signal φ _TG1 to the transfer gate TG _{1 · n} is input to the input terminal 11c.

[0006] The transfer gate TG _{1 · 1,} ......, T
The charges transferred to the vertical shift registers S _v1 , ..., S _vn by the transfer signal φ _TG1 to G _{1 · n} are input terminal 11
Vertical transfer pulse φ _V1 input via d and 11e,
are sequentially transferred downward by phi _V2 fed to each bit of the lateral cysts register S _h. And the input terminal 11
Lateral transfer pulse φ _h1 input via f and 11 g:
The signal is transferred to the right by φ _n2 , amplified by the sense amplifier A, and taken out from the terminal 11h.

FIG. 6 shows a circuit configuration of the storage unit 2. Figure 6
(A) shows a memory MC1 for one frame taken out and showing the inside thereof.
It includes a random access memory consisting of M, an addressing circuit Ax · Ay, an address counter Cx · Cy, an input circuit IP and an output circuit OP. The memory matrix RM is provided with a memory cell group of 4 bits and 1 word in a number obtained by adding 1 to the total number of light receiving elements included in the image sensor 11 (that is, the total number of pixels m × n).
That is, it has a structure of (m × n + 1) words × 4 bits.
The gradation signal of one pixel is expressed by the digital signal of one word. The amount of information that can be represented by 4 bits is 0000 in binary.
11 steps are used for gradation expression, and the remaining 5 steps, for example, 1111, 111
0, 1101, 1011, and 0111 are used as information indicating the start position of the image signal for one frame. Hereinafter, this 4-bit information is called a start signal. 5 like this
If you prepare different types of start signals, 1 of 4 bits
There will be no noise in one of them, and there will be no problem even if one of them should be 011 which should be 1111. Therefore, the same thing can be said even if five kinds of 0000, 0001, 0010, 0100 and 1000 are adopted as the start signals. The memory cell group of 1 word has its address designated by the X-direction addressing circuit Ax and the y-direction addressing circuit, and thereby the input terminal M via the input circuit IP.
The C1g to MC1j are accessed, and the output terminals MC1a to MC1d are accessed via the output circuit OP. Designated circuit A
The addresses of x and Ay are given by an x-direction address counter Cx and a y-direction address counter Cy, respectively. That is, these counters are connected in series and count the clock pulse φ _CT input to the counter Cx from the terminal MC1f. This counter starts from x = 0, y = 0 and accesses the memory of the row of y = 0. After that, x returns to 0, and y = 1 by the digit increase, and the access to the memory of this row is started. In this way, when all the memories in the memory matrix RM are accessed,
It is configured to return to x = 0 and y = 0 again.

The start signal is successively output in synchronization with the clock pulse φ _CT , and subsequently the image signals are input terminals MC1g to MC1.
Sent to 1j. First, when the clock pulse φ _CT becomes H level, the input circuit IP opens. At the same time, a start signal is input via it, and the start signal is stored in the memory cell of the address (x = 0, y = 0) that has been accessed before the pulse is input. Then, when the H-level pulse falls, the counter Cx counts up, and the next address (x = 1,
The memory of y = 0) is accessed. And the pulse is L
When the level is reached, the output circuit OP opens. Next, when the pulse goes to the H level, the input circuit IP opens and the first image signal is input and stored in the accessed address (x = 1, y = 0).

By repeating the above operation, the last image signal is stored in the memory at the last address (x = m, x = n), and when the pulse falls, the first address (x = 0, y =
The memory 0) is accessed again. When the clock pulse becomes L level, the output circuit OP is opened, and the start signal stored therein is output to MC1a to MC1d. If this is detected and the clock pulse φ _CT from the terminal MC1f is stopped, one frame is completed. The minute image signal is stored in the memory matrix RM. A detection circuit DC is connected to the output terminals MC1a to MC1d, and if any one of the five types of start signals appears at the output, it is detected and the image signal is transferred to the memory MC1, that is, the memory MC1. Outputs an output signal to the output terminal MC1k, which indicates that it has been used.

The reset terminal MC1e is for resetting the start signal by sending the reset signal to the terminal when the start signal is being accessed. As will be described in detail later, this function is used when reusing a frame of an address that has failed to be photographed or performing multiple exposure. The circuit system 2a of the storage unit 2 can be formed by collecting a plurality of memories MC for one frame as described above, and an example of the configuration is shown in FIG. 6 (b). 20 (MC1 to MC20) memories MC1 as shown in FIG. 6A are arranged, and their input / output terminals are output terminals MC of the detection circuit DC.
All except 1k to MC20k are connected to the address setting circuit AS. The address setting circuit AS is provided with an address input terminal MA, an output terminal MO, an input terminal M1, an input terminal MT for the transfer clock pulse φ _CT and a reset terminal MR. When the signal φ _A of the memory address at the address input terminal MA is input, for example, when a signal for selecting the memory of the address 1 is input, the memory MC of the address 1 is input.
The output terminals MC1a to MC1d of No. 1 are output terminals MO, the input terminals MC1g to MC1j of the memory are input terminals MI,
The clock terminal MC1f of the memory is selectively connected to the terminal MT and the reset terminal MC1e of the memory is selectively connected to the terminal MR, so that the memory MC1 at the first address is accessed.

On the other hand, output terminals MC1k to
MC20k is all connected to the display circuit DP,
Drive the display device 201 that displays the memory from which the start signal is output, that is, the used memory.
This device 201 includes an electro-optical element such as liquid crystal or electrochromic, and has an appearance as shown in FIG. In this example, the display device is a storage unit having a storage capacity of "20 frames", in which 20 liquid crystal or electrochromic segments are arranged. Of these, the segment corresponding to the used memory receives the output signal of the detection circuit DC and is colored. In this example, the memories MC1 to MC6 and MC8 to MC10 at the addresses 1 to 6 and 8 to 10 have been used.

Eighth shows a circuit system 1a of the image pickup section 1. In the image pickup device 11 as shown in FIG. 5, the output terminal 11a of the overflow drain is connected to the input terminal of the photometric circuit 102 including the photocurrent amplifier. The output of the photometric circuit is connected to the input terminal of the memory operation circuit 103, and the circuit 103 calculates the exposure time value and the aperture value that give proper exposure based on the output of the photometric circuit 102. The control pulse generation circuit 101 generates various pulses that control the imaging sequence, and the circuit 103 outputs the signal φ from its terminal 101c.
Upon receiving _101C , the output signal of the photometric circuit 102 is stored.
The storage operation circuit 103 has three output terminals, and the circuit 1
The first output of 03 is supplied to the display circuit 106 via the first terminal.
The output of the circuit 106 is input to the display device 107 including a display element such as an LED or a liquid crystal provided in the finder.
To display the exposure time and aperture value. The second output of the arithmetic circuit 103 is input to the aperture control circuit 105 via the second terminal, and the output of the circuit 105 controls the aperture 10a of the taking lens. Further, the third output of the circuit 103 is input to the clock circuit 104 via the third terminal, and the circuit 1
04 receives a signal phi _101a from the output terminal 101a of the pulse generating circuit 101, the amount of time after corresponding to the output of the circuit 103 from that point, the pulse generating circuit 101 exposure end signal
To the input terminal 101b.

Input terminals 11b to 11g of the image pickup device 11
Are output terminals 101d to 101 of the pulse generation circuit 101.
i, each of the control pulses φ _TG2 , φ _TG1 , φ _V1 , φ _V2 , φ _h1 for driving the image pickup device 11
And φ _h2 . The output terminal 11h of the image pickup device 11 is connected to the AD conversion circuit 108. Here, the analog signal corresponding to the light intensity of each pixel (each light receiving element) is converted into a 4-bit digital signal and sent to the selection gate 109. The adder circuit 110 used in multiple exposure is A
The output of the D conversion circuit 108 and the image signal input from the storage unit 2 via the input terminal CI are added and divided by two. That is, the arithmetic mean of the two is taken and the signal is selected by the selection gate 10.
Add to 9. The switch 16d is opened / closed in conjunction with the mode selection lever 16 of FIG. 2, and is turned on when the lever 16 is in the MUL (multiple exposure) position to put the adder circuit 110 in an operating state, and is turned off in other cases. Adder circuit 1
10 is made inoperative. Similarly, the switch 16c opens and closes in conjunction with the lever 16, and is turned on when the lever 16 is in the MUL position, causing the selection gate 109 to move to the adder circuit 11.
The output of 0 is passed and the output of the AD conversion circuit 108 is blocked. Further, the switch 16c is turned off when the lever 16 is in the other position, so that the output of the AD conversion circuit 108 is passed and the output of the addition circuit 110 is blocked in the gate 109 contrary to the above. Selection gate 10
The output signal of 9 is sent to another select gate 111. The output terminal of the start signal generating circuit 112 for generating the above-mentioned start signal is also connected to the select gate 111. The gate 111 of the select gate 109 receives the signal φ _101k from the output terminal 101k of the control pulse generating circuit 101. Either the output or the output of the start signal generation circuit 112 is selected and output to the storage unit 2 via the output terminal CO. The detection circuit 113 operates from the output terminal MO of the storage unit 2 to the input terminal C.
It is determined whether the signal is a signal input via I or a start signal, and the resulting signal is the control pulse generation circuit 101.
To the input terminal 101J.

The contents of the address counter 114 are stored in the address setting circuit A of the storage unit 2 via the 5-bit output terminal CA.
The memory cell of the address specified by being sent to S is accessed. On the other hand, the output of the counter 114 drives the above-mentioned display device 18 via the display circuit 117 to display the address of the memory cell being accessed. The switch 16a is interlocked with the mode selection lever 16 of FIG. 2, and when the lever 16 is in A (automatic access), the terminal A of FIG.
When in the N (manual access) or MUL position, it is connected to the terminal M in FIG. Manual address setting circuit 11
5 outputs one pulse each time the push button switch 17a is turned on when the switch 16a is at the position of the terminal M, and changes the contents of the address counter 114 one by one. When the switch 16a is switched to the position of the terminal A, the address counter 114 is connected to the output terminal 101i of the control pulse generation circuit 101 via the input terminal 114a,
The clock pulses from the circuit 101 are counted. The switch 16b is interlocked with the mode selection lever 16 to be OFF when the lever is at A, and ON when it is at another place,
Via the input terminal 101n, the control pulse generating circuit 101 is notified of whether the selected mode is automatic access or not. One-shot multi-vibrator 116 has a release button 1
When the switch 15a is turned on by pressing 5, a single pulse φ _S is generated, and a signal for starting the photographing sequence is sent to the circuit 101 via the input terminal 101p. The output terminal 101q sends the transfer pulse φ _CT for the storage unit to the storage unit 2 via the output terminal CT. Output terminal 101r
Sends the reset pulse sent to the storage unit 2 to the input terminal MR of the storage unit 2 via the output terminal CR. The output terminal 101s outputs a signal φ _busy indicating whether or not the photographing sequence is in progress. The signal φ _busy is transmitted to the sounding body 1 via the drive circuit 118.
19 emits a warning sound, and the LED is output via the display circuit 120.
The warning display device 121 such as the light is turned on, and the drive circuit 1
The electromagnet 123 is operated via 22 to make it impossible to detach the storage unit 2 from the imaging unit 1 during the shooting sequence by a safety device (not shown). A switch 19 (see FIG. 2) is inserted between the output terminal 101s and the drive circuit 118 to turn off the warning sound by turning it off. The output terminal 101m is connected to the circuits 117 and 118. When the memory of the storage unit 2 is completely used and there is no free space, a continuation signal is output, the display device 18 is blinked, and the sounding body 119 is intermittently sounded. , It is displayed that there is no unused memory cell in the storage unit 2. The output of the output terminal 101a is sent as a tuning signal to the speedlight or the like via the contact 13 (see FIG. 2). The changeover switch 124 connected to the input terminal 101t is changed over according to the protrusion amount of the pin 207 (see FIG. 3B) provided upright on the upper surface of the storage unit 2, and the storage capacity of the storage unit 2 is set to the circuit 101. Tell. When the storage unit 2 is removed from the image pickup unit 1, the switch 124 is connected to the reset terminal 114r of the counter 114, and the contents of the counter 114 are reset.

In FIG. 9, a converter 3 for transferring the image signal stored in the storage unit 2 to the magnetic tape cassette and a monitor 4 for converting the image signal into an image are shown. The converter 3 is provided with a connector 301 connected to the connector 205, a cassette holder 302 into which a magnetic tape cassette is loaded, and an operation key board 303. Next, the operation of this embodiment will be described. First, Figure 2
At, the storage unit 2 is bonded to the image pickup unit 1. As a result, the connector 206 of the storage unit 2 is connected to the connector (not shown) of the image pickup unit 1, and the terminals MA, MO, M shown in FIG.
I, MT and MR are terminals CA, CI, CO, CT, and
It is connected to each CR. Now, it is assumed that the mode selection lever 16 of the image pickup unit 1 is set to the position of the automatic access A and the switch 19 is turned on. Then, the switch 16a in FIG. 8 is connected to the terminal A, and the switches 16b, 16c, and 16d are turned off. Taking lens 1 in this state
Aim the 0 at the subject, determine the composition and focus. When the release button 15 is pressed deeply, the switch 15 shown in FIG.
a is turned on and the one-shot multi-vibrator 11
6 to the single pulse φ _S shown in the time chart of FIG. 10A is the input end 101p of the control pulse generation circuit 101.
Is emitted to. The circuit 101 receiving it receives the output terminal 10
The pulse φ _A is emitted from 1i at the timing shown in FIG. This pulse φ _A is input to the address counter 114 via the switch 16a. The counter 114 is reset when the storage unit 2 is removed from the image pickup unit 1.

Therefore, the contents of the counter are incremented by one each time one pulse φ _A is input. As a result, the counter 1
14 sequentially accesses the memory in the storage unit 2 via terminals CA and MA. That is, when the counter 114 counts the first pulse from the terminal 101i, first the first memory MC
When 1 is accessed and then the second pulse is counted, the second memory MC2 is accessed, and thereafter, the last pulse motor MC20 is similarly accessed for each pulse counting. The detection circuit 113 receives the output signal of the memory accessed by the counter 114 via terminals MO and CI,
If this is a start signal, an L level signal φ ₁₁₃ is sent to the input terminal 101j otherwise. Usually, most of the newly mounted storage units 2 are unused, so that the signal φ ₁₁₃ goes to the H level immediately after accessing the first memory MC1. Therefore, the first memory MC1 is accessed for shooting,
The memory address, ie, "1", appears on the display.
However, assuming that some of the memories, for example, the first to third memories MC1 to MC3 have been used, the circuit 101 counts the pulse φ _A while the output φ ₁₁₃ of the detection circuit ₁₁₃ is at the L level. Continue sending to 114. In this way, when the address is advanced one by one and an unused memory, in this case, the fourth memory MC4 is reached, the output φ ₁₁₃ becomes H level at the timing shown in FIG. 10 (b), and the pulse φ _A Output stops. Then, the memory at that time is accessed for photographing, and the address of the memory is displayed on the display device 18. The process described above is called address search. Circuit 101 that is pin 207, when the output of the circuit 113 emits only the number of frames address pulse phi _A conveyed by the changeover switch 124 is not a H level is the memory already used all in the storage unit 2 To detect. Then, the circuit 101 issues an intermittent signal from the terminal 101m to blink the display device 18, cause the sounding body 119 to make an intermittent sound, and stop the photographing sequence. This allows the photographer to know that there is no unused memory. This series of warning operations is also performed when the release button is pressed without attaching the storage unit 2 to the image pickup unit 1. This is because the circuit 101 uses the switch 1 when the storage unit 2 is not installed.
By detecting by opening 24. The warning due to the non-mounting is particularly effective in the case where the storage unit is loaded inside the imaging unit and the presence of the storage unit cannot be visually recognized from the outside.

Circuit 1 when unused memory is accessed
The output φ _{113 of} 13 goes high and the pulse φ _A stops. As shown in FIG. 10 (e), the output φ _{TG 2} of the terminal 101d becomes H level with the start of power supply by pressing the release button 15 shallowly, and the image sensor 11 shown in FIG.
Keep the transfer gate TG 2 _{· 1} ~TG 2 _{· n} in the open state. Therefore, the light receiving elements a ₁ , ..., A
overflow drain OD ₁ ~OD _n without charges generated according to the intensity of light irradiated to _{m · n} is stored in each element, through the output terminal 11a is always taken as the photocurrent amplified by the photometry circuit 102 , Logarithmic conversion, AD conversion and the like are added to the storage operation circuit 103. When the access to the unused memory of the storage unit 2 is completed, the output φ _{101C of the} terminal 101c changes from the L level to the H level at the timing shown in FIG. 10D according to the output φ _{113 of the} circuit 113. While the output φ _101C is at the H level, the output of the photometry circuit 102 is stored in the circuit 103.
The circuit 103 calculates the aperture value and the charge accumulation time, that is, the exposure time, from which the appropriate exposure (charge accumulation amount) can be obtained from the stored light intensity value. Information on the appropriate aperture value is sent to the aperture control circuit 105, and the aperture 1 is selected by a known method.
0a is controlled. Further, both the information of the proper aperture value and the proper charge accumulation time are sent to the display circuit 106, and the display element 107
Is displayed in the viewfinder. Further, information on the proper charge storage time is also sent to the clock circuit 104. Immediately after, the output phi _TG2 terminal 101d is changed from the H level at a timing shown in FIG. 10 (e) to L level, the transfer gate TG _{2 ·} 1 ~TG ₂ · _n is closed. Simultaneously receiving element a _{1 · 1} of the imaging device, ..., the terminal 101a with the accumulation of charge corresponding to the exposure amount in a _{m · n} is started
Signal φ _{10 1a} similar to signal φ _TG2 (see Fig. 10 (e))
Appears. The clock circuit 104 receives the signal φ _101a ,
The output φ ₁₀₄ is changed from the L level to the H level as shown in FIG. Then, when the appropriate charge storage time has elapsed, the output φ ₁₀₄ changes from the H level to the L level. The circuit 101 receiving this through the terminal 101b outputs the output terminal 101e to the circuit shown in FIG.
Outputs a pulse phi _TG1 shown in, open a moment the transfer gate TG _{1 ·} 1 ~TG 1 _{· n} of the image pickup device 11. As a result, the charges accumulated in the light receiving elements a ₁ , ..., _{Am ・ n} are transferred to the vertical shift registers S _{v1 to} S _vn . This completes the exposure. The transfer gate TG 2 _{· 1} through T by the charge storage time or exposure time to the output phi _TG2 is changed from H level to L level
Is the time until the opening of the transfer gate TG _{1 ·} 1 ~TG 1 _{· n} due to the pulse phi _TG1 is issued from the closure of G 2 _{· n.}

When the exposure is completed as described above, the next end
From the child 101k to the selection gate 111 shown in FIG.
Signal φ at timing_101kIs emitted. The gate 111
Is a start signal because the output from terminal 101 is H level
Select the output (start signal) from the generation circuit 112
Output to the output terminal CO. Terminal 101q in synchronization with this
To the storage unit 2 via the terminals CT and MT as shown in FIG.
Transfer pulse φ_CTIs sent and the start signal is
Send to the memory accessed through the input terminal MI
Get caught Then, from the output terminals 101f and 101g, as shown in FIG.
The input terminals 11d and 11e of the image sensor 11 are shown in FIG.
Vertical transfer at the timings shown in (i) and (j)
Pulse φ_V1as well as_V2From output terminals 101h and 101i
Input terminals 11f and 11g are shown in FIGS. 10 (k) and 10 (l).
Horizontal transfer pulse φ at each timing_h1And φ_h2But
Sent. As a result, the image signal of each light receiving element is output.
Output from the force terminal 11h in time series. This signal is A
It is converted into a digital signal by the D conversion circuit 108,
Added to the boot 109. The gate 109 is a switch 1
Since 6c is off, the image signal from the circuit 108 is received.
Pass the issue. Select gate 111 also from terminal 101k
Output goes low, so the image signal from gate 109
Signal from the output terminal CO to the input terminal M of the storage unit 2
Added to I. Furthermore, the transfer pulse φ_V1, Φ_V2, Φ
_h1, Φ_h2Transfer pulse φ generated in synchronization with _CTBy
The image signal can be accessed after the start signal.
Rows that are sequentially transferred into the memory matrix of the
Ku. Starts when the image signal for one frame is transferred
Since the signal appears at the output terminal MO of the storage unit 2, this
In addition to the detection circuit 113 via the input terminal CI of the image pickup unit 1.
Be done. The circuit 113 detects this and detects each transfer pulse described above.
Φ_V1, Φ_V2, Φ_h1, Φ_h2, Φ_CTTo stop. This is 1
The shooting sequence for frames is completed. Release later
Every time the button 15 is pressed deeply, the unused memory disappears.
The above shooting sequence can be repeated until.

During the above photographing sequence, that is, from the pressing of the release button 15 to the address search, the exposure and the completion of the transfer, the output terminal 101s is operated as shown in FIG.
The signal φ _busy shown in (n) is issued. The signal φ _busy drives the sounding body 119 and the display device 121 to warn that the shooting sequence is in progress, and also activates the electromagnet 123 to activate a safety device (not shown) to store the video signal in the storage unit 2. It is impossible to separate the storage unit 2 from the imaging unit 1 before the transfer is completed. Next, a case where the manual access (MAN) is selected by the mode selection lever 16 will be described.

In this case, the memory at the desired address can be manually accessed. The lever 16 shown in FIG.
In the position of AN, the switch 16a is connected to the terminal M and the switch 16b is turned on in FIG.
c and 16d remain off. Push button 17 in this state
When is pressed, the normally open switch 17a is turned on, and each time it is pressed, a pulse is issued from the manual address setting circuit 115 one by one,
As a result, the contents of the address counter 114 are advanced one by one from the address of the memory cell to which the image signal was immediately captured and the image signal was transferred. Therefore, it suffices to determine the memory of the desired address by looking at the display device 201 and operate the push button 17 until the desired address appears on the display device 18. Of course, when the memory used immediately before is desired, it is not necessary to press the push button 17.
When the release button 15 is pressed after completion of this manual access, the above-mentioned address search process is not performed, and instead, a reset pulse is issued from the terminal 101r to the memory via the terminals CR and MR, and the accessed memory has already been used. In this case, 4 bits of the start signal output to the memory are reset. Therefore, the accessed memory can be used because the output of the detection circuit 113 becomes H level regardless of whether it is used or not. In the subsequent sequence, lever 16 is A
The start signal and the image signal are transferred to the accessed memory in the same manner as in the above case. Therefore, according to the manual access mode, even if the shooting fails, the lever 16 is set to MAN and the release button is pressed down again, the failure image signal transferred to the memory is the newly captured image signal. The memory can be used without waste as it is replaced with. Further, if the push button 17 is operated, a desired memory, for example, MC1, M
It can be used as C3, MC5, ... Manual access is performed cyclically.
That is, when the push button 17 is pressed after the memory (MC20) at the last address is accessed, the first memory (MC
1) is accessed. For example, this is counter 114
Is a programmable counter, and the storage capacity of the storage section 2 by the switch 124 and the pin 207 is digitized and input to a program input terminal (not shown), and the content of the counter is reset when the total number of memories is counted. It depends.

Next, the case where the multiple exposure mote is selected by the lever 16 will be described. First, after finishing the shooting sequence in either of the above two modes, move the lever 16 to the M
Set to UL position. Then, switch 16a has terminal M
And switches 16b, 16c, 16d are all on
Becomes Even if the release button 15 is pressed, there is no address search process as in the case of the manual access mode described above, and the memory cell to which the image signal was immediately photographed and the image signal was transferred remains accessed. Therefore, as in the case of the manual access mode, a reset pulse is output from the terminal 101r to reset the start signal of the memory that has been accessed. Next, the charge accumulation (exposure) process described above is performed, and then the process proceeds to the transfer process. Since the switch 16c is turned on here, the selection gate 109 causes the switch 16 to operate.
The output of the adder circuit 110 which has been activated by turning on d is selected and allowed to pass. First, when the start signal is transferred to the accessed memory as before, the adding circuit 110 inputs the image signal from the accessed memory cell input from the terminal CI and the image captured from the AD conversion circuit 108. The signal of the arithmetic mean with the signal is output. Of course this is done under perfect synchronization of each transfer pulse. This arithmetic mean signal is then applied to the gates 109, 111,
It is transferred to the accessed memory via the terminals CO and MI. When the transfer for one frame is completed as described above, the first photographed object and the second photographed object are stored in the accessed memory.
The image signal combined with the th photographing subject is stored. This allows multiple exposures to be repeated any number of times, and there is no risk of overexposure because the arithmetic mean is taken instead of the sum each time. It is also possible to synthesize not only the memory used immediately before but also the image signal of the memory used previously by accessing the memory of the desired address with the push button 17.

The storage unit 2 which has been photographed in any of the above-mentioned modes and has no unused memory is attached / detached by the detachable slider 203.
It is removed from the image pickup unit 1 by operating and pulling down. Then, the converter 3 transfers the image signal stored in the storage unit 2 to the magnetic tape cassette. Therefore, the connector 206 of the storage unit 2 is connected to the connector 301, the tape cassette is loaded into the cassette holder 302, and the operation key board 303 is operated. Then, the image signals in the memory of the storage unit 2 are sequentially transferred to the magnetic tape, and the transferred memory is reset and can be reused. At this time, the converter 3 charges the secondary battery built in the storage unit 2 for backing up the memory and driving the display device 201.

The image pickup unit 1, the storage unit 2 and the converter 3 will be described below.
The power supply system of the electronic camera system consisting of will be described in detail. A power source battery E1 such as a manganese dry battery built in the imaging unit 1 is shown in FIG.
Rechargeable power source batteries E2 such as a silver oxide secondary battery built in the storage unit 2 are shown in broken views. In the state where the image pickup unit 1 and the storage unit 2 are separated as shown in FIG. 11, the image pickup unit 1 receives power supply from the battery E1 and the storage unit 2 receives power supply from the battery E2. Part 2
In the state in which is attached, the storage unit 2 receives power supply from the battery E1. As a result, it is possible to minimize consumption of the battery E2 having a small electric capacity.

FIG. 12 shows a power supply circuit system therefor. As is apparent from FIG. 12, when the storage unit 2 is attached to the image pickup unit 1, the backup terminals CB and MB of the image pickup unit 1 and the storage unit 2 are connected. Therefore, the battery E1 is
The circuit system 1a (see FIG. 8) of the image pickup unit 1 is supplied with power, and the memory circuit system 2 including the memory MC and its peripheral circuits is provided via the backup terminals CB and MB.
Power is supplied to a (see FIG. 6). At this time, the P-channel enhancement MOSFET Q1 is turned off because a high level voltage is applied to the gate, and the power supply path from the battery E2 to the circuit system 2a is cut off.

If the battery E1 is exhausted at this time and the voltage across its terminals is not sufficient to hold the stored contents of the memory MC, the gate voltage of the FET Q1 does not rise and the FET Q1 is turned on, so that the battery E2 is turned on. To the memory circuit system 2a. Here, the diode D1 is provided to prevent the current from the battery E2 from flowing into the imaging unit 1 when the voltage of the battery E1 is low, and the capacitor C1 absorbs the voltage fluctuation of the battery E1 due to the load fluctuation, and Memory circuit system 2 for a very short time due to an accident
It has a function of holding the power supply voltage so that the contents of the memory MC are not volatilized even if the power supply to a is cut off.

When the storage unit 2 is removed from the image pickup unit 1, the terminals CB and MB are disconnected. Therefore, FET Q1
Becomes ON due to the decrease of the gate voltage, and the battery E2 supplies power to the circuit system 2a in place of the battery E1.
The voltage detection circuit VD constantly detects the voltage of the battery E2, and when the voltage drops to the first level, it sends an intermittent signal to the detection circuit DP shown in FIG. 6 to blink the display device 201. This warns that the voltage of the battery E2 has begun to drop. When the voltage of the battery E2 further drops and reaches the second level, the circuit VD sends an operation signal to the sounding device SD to generate a warning sound. This warns that the voltage of the battery E2 is approaching the minimum voltage required to hold the contents of the memory MC. Further, the voltage detection circuit VD outputs the charging completion signal to the voltage detection end MV only when the voltage of the battery E2 is sufficient. Further, charging terminals MC for charging the battery E2 are connected to both ends of the battery E2.

FIG. 13 shows a circuit system of the converter 3. The storage unit 2 is connected to the image pickup unit 1 for image signal transfer.
When the connector 206 of the storage unit 2 is connected to the connector 301 of the converter 3, the storage unit 2 shown in FIG.
Each terminal MA, MO, MT, MR in (b) and FIG.
Each of the terminals MB, MC, MV in FIG. 3 has terminals CvA, CvI, CvT, CvR, Cv of the converter 3.
B, CvC and CvV are respectively connected. When this connection is completed, the charging current is automatically supplied from the power supply unit 304 of the converter 3 to the battery E2 via the terminals CvC and MC, and charging is started. At the same time, the power supply unit 304 backs up the circuit system 2a via the terminals CvB and MB. Therefore, at this time, the FET Q1 is turned off to prevent the charging current from the terminal MC from flowing into the circuit system 2a.

FIG. 14 shows the internal structure of the power supply unit 304. The AC input AC is stepped down by the transformer TR and rectified by the full-wave rectifiers BR1, BR2, BR3. The output of the rectifier BR1 is smoothed by the capacitor C2 and supplied to each circuit of the converter 3. The output of the rectifier BR2 is smoothed by the capacitor C3 and sent to the backup terminal CvB, and the output of the rectifier BR3 is sent to the charging terminal CvC via the current limiting resistor R.

A large-capacity secondary battery may be built in the storage unit 2 to supply power to the circuit system 1a. In this case, the power supply circuit system when the image pickup unit 1 and the storage unit 2 are attached removes the battery E1 in FIG.
The terminal CB is connected to the terminal MC of the storage unit 2.
In that case, FETQ1 and 2 connected to its gate
The two resistors and the diode D1 are unnecessary and are removed.
The lines connected to the source / drain of ETQ1 and the anode / cathode of diode D1 are short-circuited.

Now, returning to FIG. 13, the operation of the converter 3 for transferring the image signal from the storage section 2 to the magnetic tape 305 will be described in detail. For the transfer, the converter 3 is appropriately selected from three operation modes, that is, a search mode, an automatic transfer mode, and a manual transfer mode. The search mode is a mode for selecting image signals stored in the memory of the storage unit 2 prior to image transfer, and the automatic transfer mode is for automatically transferring the image signals selected in the search mode to the tape in sequence. The manual transfer mode is a mode in which the image signals selected in the search mode are transferred to the tape in an arbitrary order.

First, the operation of the search mode will be described.
The magnetic tape 3 is attached to the cassette holder 302 of the converter 3.
05 is loaded and the search mode key on the key board 303 is pressed. Then, a signal is issued from the key board 303 to the control pulse generation circuit 306 to inform the circuit 306 that the search mode has been selected. Circuit 306
In response, a pulse is sent to the address counter 307. Then, each time one pulse is input, the counter contents are incremented by one from one. As a result, the counter 307 has the terminal Cv
The memories in the storage unit 2 are sequentially accessed via A and MA. That is, when the counter 307 counts the first pulse from the circuit 306, the first memory MC1 is accessed first, and then the second pulse is counted, the second memory MC2 is accessed, and so on. To the last memory MC20. The start signal detection circuit 308 receives the output signal of the memory accessed by the counter 307 via the terminals MO and CvI, and sends the signal of H level to the circuit 306 if it is a start signal and L level otherwise. In most cases, all the memories of the newly mounted storage unit 2 have been used, so the signal of the detection circuit 308 is the first memory MC1.
Is accessed and the H level is immediately set. Therefore, the first memory MC1 is accessed.

Then, the control pulse generation circuit 306 sends the transfer pulse to the accessed memory MC1 of the storage unit 2 via the terminals CvT and MT. Therefore, the image numbers stored in the memory MC1 are successively output. At this time, the transfer pulse is 1
It is repeatedly sent every 30 seconds for one frame,
Therefore, the image signal is continuously sent to the signal combining circuit 309 via the terminals MO and CvI. An index signal indicating the address of the memory being accessed from the address counter 307 is input to the circuit 309 together with this image signal. The circuit 309 synthesizes the image signal and the index signal and sends them to the selection gate 310. At this time, the gate 310 receives the input from the signal synthesizing circuit 309 according to the control signal from the pulse generating circuit 306 and outputs the DA converting circuit 3
11 is set. Therefore the circuit 30
The composite signal of the image signal and the index signal sent from 9 is sent to the NTSC conversion circuit 31 via the DA conversion circuit 311. The circuit 312 outputs the composite signal to the NTSC.
The signal is converted into the system and sent to the monitor 4 shown in FIG. 9 through the output terminal. In the monitor 4, the image signal stored in the memory MC1 is converted into an image and the memory MC is displayed on the image.
The address of 1, that is, "1" is inserted and displayed.

If the user intends to transfer this image, the transfer key on the key board 303 is pressed, and if the user does not intend to transfer the image, the reset key is pressed. When the transfer key is pressed, the key board 303 sends a signal to that effect to the control pulse generation circuit 306. Circuit 306
Receives the signal, sends a pulse to the address counter 307, accesses the next used memory, and images the image signal stored in the memory and the address of the memory on the monitor 4 as in the above-described operation. .. When the reset key is pressed, the key board 303 sends a signal to that effect to the control pulse generation circuit 306. In response, the circuit 306 sends a reset pulse to the terminals CvR, M.
It is sent to the memory MC1 via R and the start signal stored in the memory MC1 is reset. Then address
A pulse is sent to the counter 307 to access the next used memory for imaging on the monitor 4.

When the above operation is performed on all the used memories, a signal indicating the completion of the search operation is sent from the circuit 306 to the display device 313 to display that effect. Although information about the storage capacity of the storage unit 2 necessary for the determination, that is, the information on the total number of memories is not shown, the protrusion amount of the pin 207 implanted in the storage unit 2 is compared with that of the switch 124 shown in FIG. It is obtained by detecting by the same means and transmitting to the circuit 306.

Next, the operation of the converter 3 when the automatic transfer mode is selected will be described. Key board 303
When the automatic transfer mode key is pressed, a signal is sent from the board 303 to the control pulse generation circuit 306 to notify that the mode has been selected. In response, the circuit 306 sends a pulse to the address counter 307, and the start signal in which the start signal is not reset, for example, M.
S1 is accessed and a transfer pulse is set to CvT, MT
To the memory MC1 and the image signal stored in the memory MC1 to the signal synthesizing circuit 309. The circuit 309
Composes the index signal from the address counter 307 and the image signal and sends them to the selection gate 310. At this time, the gate 310 is set so that its output is sent to the buffer memory 314 by the control signal from the control pulse generating circuit 306. Therefore, the combined signal from the processing circuit 309 is sent to the buffer memory 314. The write control signal from the control pulse generation circuit 306 is sent to the memory 314, and the combined signal is written therein. The write control signal is issued in synchronization with the transfer pulse to the storage unit 2. When this writing is completed, the control pulse generation circuit 306 repeatedly sends a control signal for reading to the buffer memory 314 at 1/30 sec. 1 at a frame cycle. As a result, the combined signal stored in the buffer memory 314 is sent to the monitor 4 via the DA conversion circuit 311 and the NTSC conversion circuit 312. An image in which "1" is inserted in the image signal of the memory MC1 appears on the monitor 4.

When the writing of the combined signal to the buffer memory is completed, the circuit 306 sends a control signal to the gate 310 to switch the output of the combining circuit 309 to the recording circuit 315 and to the memory MC1. Stops sending the transfer pulse. The recording circuit 315 subjects the digital input signal to frequency modulation, amplification, etc., and sends it to the recording multi-head 315a. At the same time, the pulse generation circuit 306
Sends a start signal to the motor drive circuit 316, and the motor 3
17 is driven. When the rotation of the motor 317 reaches a steady state, the rotation of the motor is transmitted to the tape and the tape starts to rotate. At the same time, a transfer pulse having a relatively long cycle is transmitted from the pulse generation circuit 306 to the motor drive circuit 316.
To the terminal CvT. Therefore, the image signal of the memory MC1 is read out at a relatively slow speed, and the signal synthesizing circuit 309,
Recording is performed on the tape 305 through the selection gate 310, the memory circuit 315, and the recording multi-head 315a (the head has four channels, but only one channel is shown for simplicity). At this time, the tape is speed-controlled by the transfer pulse.

At this time, since the index signal is not issued from the address counter 307 to the combining circuit 309, the signal is not recorded on the tape. When the transfer of the image signal to the tape 305 is completed, a reset pulse is sent to the memory MC1 via the terminals CvR and MR to reset the start signal. At the same time, a stop signal is sent to the motor drive circuit 316 to stop the motor.

Subsequently, the pulse generation circuit 306 sends a control signal to the selection gate 310, and switches the output of the signal synthesis circuit 309 to the buffer memory 314. Then, a pulse is sent to the address counter 307 to access the next used memory, and the image signal stored therein is imaged by the monitor 4 via the buffer memory by the same operation as described above, and the motor 317 is operated. Rotate and store on tape.

By repeating the above operation, the image signals of all the used memories are transferred to the tape 305, and their start signals are reset so that they can be reused.
The pulse generation circuit 306 operates the display device 313 to display that the transfer is completed. At this time, if the charging of the power supply battery E2 of the storage unit 2 is completed, the storage unit 2 is automatically detached from the converter 3. This is because the charging completion signal from the voltage detection circuit VD of the storage unit 2 is output to the terminal MV,
An AND circuit 318 is provided which receives one of the inputs via CvV and receives the transfer completion signal on the other input.
The output is sent to the solenoid drive circuit 319 to operate the solenoid 320, and the plunger of the solenoid presses the recording unit 2 in the detaching direction.

The buffer memory 314 and the tape 30
Completion of writing of one frame of the image signal into 5 is detected by the detection circuit 30.
It is detected by re-inputting the start signal of the memory being accessed. Next, the operation when the manual transfer mode is selected will be described. Key board 30
When the manual transfer mode key 3 is pressed, a signal is sent from the board 303 to the pulse generation circuit 306 to notify that the manual transfer mode has been selected. Here, the desired used memory address is pressed with the ten-key pad of the key board 303. Then, a signal corresponding to that address is sent to the counter 307, and the counter 307 accesses the memory at that address. Then, as in the case of the automatic transfer mode, the image signal of the accessed memory is sent to the monitor 4 together with its address number via the buffer memory 314.
, And the image signal is recorded on the tape 305. When the transfer to the tape is completed, a reset pulse is sent to the memory via the terminals CvR and MR, and the start signal is reset. Then, the display on the monitor 4 and the rotation of the tape are stopped.

Then, the address of another used memory is accessed by pressing the ten key on the key board 303,
The same operation as described above is performed. When the above operation is performed over all the used memories, the image signals stored in the used memories are transferred to the tape, and the start signal is reset so that the image signals can be reused, the display device 3 can be used as described above.
At 13, the transfer completion is displayed. At this time, if the charging of the battery E2 in the storage unit 2 is completed, the solenoid 32
0 operates and the storage unit 2 is detached from the converter 3.

When it is desired to reproduce the image signal recorded on the tape 305 on the monitor 4, the reproduction key on the key board 303 is pressed. Then, the board 303 sends a signal to that effect to the pulse generation circuit 306. In response to this, the circuit 306 sends a motor start signal and a synchronization pulse to the motor drive circuit 316 to rotate the tape 305.
The image signal for one frame recorded on the tape 305 is read out, and the multi-head for reproduction 321a, the reproduction circuit 321 for amplifying the signal from the head and demodulating into a digital signal, and the buffer memory 314 via the selection gate 310.
Written in. When this writing is completed, the rotation of the tape 305 is stopped, the image signal stored in the buffer memory 314 is repeatedly read, and the DA conversion circuit 3
11. An image is formed on the monitor 4 via the NTSC conversion circuit.

At this time, the start signal detection circuit 308 detects the completion of the transfer of the image signal for one frame from the tape 305 to the buffer memory 314 at the beginning of the next image signal in the output of the reproduction circuit 321. By detecting the appearance of the recorded start signal. (The wiring between the output terminal of the reproduction circuit 321 and the input terminal of the detection circuit 308 is not shown.) From the storage unit 2 to the tape 305.
Before transmitting the image signal to the signal processing circuit 3 such as a date by operating the key board 303.
It is possible to send the image signal to the image signal on the monitor, and record it on the tape 305.

Further, the DA conversion circuit is provided with an output terminal, and the terminal is connected to a device for converting an image signal converted into an analog signal into a hard copy. As is apparent from the above description, according to the present invention, since the converter is prepared to transfer the still image signal stored in the internal storage device to the external storage device, the internal storage device can be downsized, and the electronic converter Since the device for charging the power supply battery is built in with the above connection of the camera, an electronic camera system can be obtained in which it is not necessary to pay attention to the maintenance and management of the power supply battery.

In the present invention, the transfer of the still image signal from the internal storage device to the external storage device and the charging of the power supply battery do not necessarily have to be performed at the same time, and the charging is started after the transfer is completed. You can

[Brief description of drawings]

FIG. 1 is a perspective view of an electronic camera used in the present invention.

FIG. 2 is a perspective view of an electronic camera used in the present invention.

FIG. 3 is a perspective view showing a state in which the camera is separated into an imaging unit and a storage unit.

FIG. 4 is a schematic vertical sectional view of the camera.

FIG. 5 is a schematic diagram showing the internal structure of the solid-state imaging device of the first embodiment.

FIG. 6 is a circuit diagram showing a part and the whole of a storage unit.

FIG. 7 is a front view showing a display unit of the display device.

FIG. 8 is a circuit diagram of an image pickup unit.

FIG. 9 is a perspective view of a converter and a monitor.

FIG. 10 is a time chart of main pulses that control a shooting sequence of the electronic camera.

FIG. 11 is a cutaway view showing a power supply battery incorporated in each of an imaging unit and a storage unit.

FIG. 12 is a circuit diagram of an imaging unit and a storage unit.

FIG. 13 is a circuit diagram of a converter.

FIG. 14 is a circuit diagram of a power supply unit of the converter.

[Explanation of symbols for main parts]

Imaging device 11 Internal storage device MC1 to MC20 Power supply battery E2 Electronic camera 1, 2 External storage device 309, 315, 305, 317, 31
6 Charging device 304 Converter 3

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[Procedure amendment]

[Submission date] November 18, 1992

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be amended] Claims

[Correction method] Change

[Correction content]

[Claims]

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0001

[Correction method] Change

[Correction content]

According to the present invention, an electronic camera provided with an image pickup device for converting a subject image into a still image signal corresponding to one frame and an internal storage device capable of storing the still image signal for a plurality of frames is used. The present invention relates to an image signal reproducing device for reproducing an image signal stored in the internal storage device so as to select the necessity of transfer when the image signal is transferred to another storage device and stored again. Conventionally, in this type of camera, miniaturization has been aimed at in order to improve portability. Therefore, it is conceivable to reduce the storage capacity of the internal storage device, which requires a relatively large space, and to downsize it. Since this small-capacity internal storage device has, for example, about 20 still images, it is desirable to transfer the stored contents to an external large-capacity storage device so that it can be reused. It is more preferable to select only the necessary image signal from the stored contents of the small-capacity storage device attached to the electronic camera at the time of transfer and transfer only the necessary image signal to the large-capacity storage device. Further, it is convenient to change the playback screens one by one, determine the necessity in sequence, and display that effect when the transfer selection is completed.

[Procedure 3]

[Document name to be amended] Statement

[Name of item to be corrected] 0002

[Correction method] Change

[Correction content]

An object of the present invention is to transfer an image signal that needs to be transferred from among the image signals of the storage device when transferring the storage contents of the storage device of a small capacity mounted in an electronic camera to the storage device of a large capacity. An image signal reproducing apparatus for reproducing for selection, which is to be reproduced next in response to a manual operation of inputting only the necessity of transfer of the reproduced image signal to a monitor for reproducing each image signal of the storage means. It is an object of the present invention to provide an image signal reproducing device for reproducing the image signal stored in the storage device on the monitor.

[Procedure amendment 4]

[Document name to be amended] Statement

[Name of item to be corrected] 0003

[Correction method] Change

[Correction content]

1 and 2 show the appearance of an embodiment of an electronic camera used in the present invention. The camera comprises an image pickup unit 1 for photoelectrically converting a subject image into a still image signal, and a storage unit 2 having a memory for storing one frame of still image information for 20 frames. Both of these parts are shown in Figure 3.
It can be separated as shown in (a) and (b). A photographing lens 10 is mounted on the front surface of the image pickup unit 1, and the lens 10 forms a subject image on the image pickup surface of an image pickup device 11 arranged inside the image pickup unit 1 as shown in the sectional view of FIG. .. A diaphragm 10 a is arranged on the lens 10, and a mosaic filter 11 a for color separation is arranged on the front surface of the image sensor 11. Further, the image pickup unit 1 is provided with a finder 12 penetrating from the front surface to the rear surface thereof to define a photographing field of view, and in FIG. 1, a contact 13 for attaching an external light source such as a speedlight is provided on the upper surface thereof. Accessory shoe 14
And a release button 15 are provided. The release button 1
When 5 is pressed down a little, it is inserted into the power supply circuit, the power supply switch is turned on, and power is supplied. Along with this, the photometric operation is performed. When the release button 15 is pressed deeply, the power supply switch remains ON and the shooting sequence is further started. Once the shooting sequence is started, it does not stop even if the release button 15 is released halfway. Further, the power supply switch is kept ON until the shooting sequence is completed. In FIG. 2, the rear surface of the imaging unit 1 is the storage unit 2
Mode selection lever 16 for selecting one of the automatic access mode, the manual access mode and the multiple exposure mode of the memory cell address, the push button 17 for the manual access, and the memory currently accessed. 7 segment display device such as liquid crystal for displaying the address of
And a switch 19 for disabling the sound warning device. Further, a mounting screw 100 for mounting an external accessory such as a data imprinting device or an electronic monitor device for monitoring a subject image on the side surface of the imaging unit 1.
And a connector 130 for the accessory, respectively.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0012

[Correction method] Change

[Correction content]

FIG. 8 shows a circuit system 1a of the image pickup section 1. In the image pickup device 11 as shown in FIG. 5, the output terminal 11a of the overflow drain is connected to the input terminal of the photometric circuit 102 including the photocurrent amplifier. The output of the photometric circuit is connected to the input terminal of the memory operation circuit 103, and the circuit 103 calculates the exposure time value and the aperture value that give proper exposure based on the output of the photometric circuit 102. The control pulse generation circuit 101 generates various pulses that control the imaging sequence, and the circuit 103 outputs the signal φ from its terminal 101c.
Upon receiving _101C , the output signal of the photometric circuit 102 is stored.
The storage operation circuit 103 has three output terminals, and the circuit 1
The first output of 03 is supplied to the display circuit 106 via the first terminal.
The output of the circuit 106 is input to the display device 107 including a display element such as an LED or a liquid crystal provided in the finder.
To display the exposure time and aperture value. The second output of the arithmetic circuit 103 is input to the aperture control circuit 105 via the second terminal, and the output of the circuit 105 controls the aperture 10a of the taking lens. Further, the third output of the circuit 103 is input to the clock circuit 104 via the third terminal, and the circuit 1
04 receives a signal phi _101a from the output terminal 101a of the pulse generating circuit 101, the amount of time after corresponding to the output of the circuit 103 from that point, the pulse generating circuit 101 exposure end signal
To the input terminal 101b.

[Procedure Amendment 6]

[Document name to be amended] Statement

[Correction target item name] 0015

[Correction method] Change

[Correction content]

FIG. 9 is a perspective view showing the appearance of the converter and monitor of the present invention. In FIG. 9, a converter 3 for transferring the image signal stored in the storage unit 2 to the magnetic tape cassette and a monitor 4 for converting the image signal into an image are shown. The converter 3 is provided with a connector 301 connected to the connector 205, a cassette holder 302 into which a magnetic tape cassette is loaded, and an operation key board 303. Next, the operation of this embodiment will be described. First, in FIG. 2, the storage unit 2 is attached to the imaging unit 1.
As a result, the connector 206 of the storage unit 2 is connected to the connector (not shown) of the image pickup unit 1, and the terminal M shown in FIG.
A, MO, MI, MT, and MR are terminals CA, CI,
Connected to CO, CT and CR respectively. Image pickup unit 1
It is assumed that the mode selection lever 16 is set to the position of the automatic access A and the switch 19 is turned on. Then, the switch 16a in FIG. 8 is connected to the terminal A, and the switches 16b, 16
c and 16d are turned off. In this state, the taking lens 10 is aimed at the subject, the composition is determined, and the focus is adjusted. Then, when the release button 15 is deeply pressed, the switch 15a in FIG. 8 is turned on, and the single pulse φ _S shown in the time chart of FIG. 10 (a) is transmitted from the one-shot multivibrator 116 to the input end 101p of the control pulse generating circuit 101. Is emitted to. The circuit 101 which has received it emits a pulse φ _A from the output terminal 101i at the timing shown in FIG. This pulse φ _A is input to the address counter 114 via the switch 16a. The counter 114 is reset when the storage unit 2 is removed from the image pickup unit 1.

[Procedure Amendment 7]

[Document name to be amended] Statement

[Name of item to be corrected] 0030

[Correction method] Change

[Correction content]

Now, returning to FIG. 13, the operation of the converter 3 for transferring the image signal from the storage section 2 to the magnetic tape 305 will be described in detail. Converter 3 for transfer
The three operation modes are appropriately selected, that is, the search mode (the mode of the present invention), the automatic transfer mode, and the manual transfer mode. The search mode is a mode for selecting image signals stored in the memory of the storage unit 2 prior to image transfer, and the automatic transfer mode is for automatically transferring the image signals selected in the search mode to the tape in sequence. Mode,
The manual transfer mode is a mode in which the image signals selected in the search mode are transferred to the tape in an arbitrary order.

[Procedure Amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0031

[Correction method] Change

[Correction content]

First, the operation of the present invention, that is, the search mode will be described. Cassette holder 302 of converter 3
Then, the magnetic tape 305 is loaded on the disk and the search mode key on the key board 303 is pressed. Then, a signal is issued from the key board 303 to the control pulse generating circuit 306 to inform the circuit 306 that the search mode has been selected. The circuit 306 accordingly responds to the address counter 3
Send a pulse to 07. Then, each time one pulse is input, the counter contents are incremented by one from one. As a result, the counter 307 sequentially accesses the memory in the storage unit 2 via the terminals CvA and MA. That is, the counter 307 is the circuit 306.
Counting the first pulse from the first memory M
When C1 is accessed and then the second pulse is counted, the second memory MC2 is accessed, and so on. Similarly, every time the pulse is counted, the last memory MC20 is accessed. The start signal detection circuit 308 receives the output signal of the memory accessed by the counter 307 via the terminals MO and CvI, and sends the signal of H level to the circuit 306 if it is a start signal and L level otherwise. In most cases, all the memories of the newly installed storage unit 2 have been used, so the signal of the detection circuit 308 is the first signal.
The memory MC1 of is accessed and immediately becomes H level.
Therefore, the first memory MC1 is accessed.

[Procedure Amendment 9]

[Document name to be amended] Statement

[Correction target item name] 0034

[Correction method] Change

[Correction content]

When the above operation is performed on all the used memories, a signal indicating the completion of the search operation is sent from the circuit 306 to the display device 313 to display that effect. Although information about the storage capacity of the storage unit 2 necessary for the determination, that is, the information on the total number of memories is not shown, the protrusion amount of the pin 207 implanted in the storage unit 2 is compared with that of the switch 124 shown in FIG. It is obtained by detecting by the same means and transmitting to the circuit 306. The above is the operation of the present invention.

[Procedure Amendment 10]

[Document name to be amended] Statement

[Correction target item name] 0035

[Correction method] Change

[Correction content]

Next, the operation of the converter 3 when the automatic transfer mode is selected will be described. Key board 303
When the automatic transfer mode key is pressed, a signal is sent from the board 303 to the control pulse generation circuit 306 to notify that the mode has been selected. In response, the circuit 306 sends a pulse to the address counter 307, and the start signal in which the start signal is not reset, for example, M.
S1 is accessed and a transfer pulse is set to CvT, MT
To the memory MC1 and the image signal stored in the memory MC1 to the signal synthesizing circuit 309. The circuit 309
Composes the index signal from the address counter 307 and the image signal and sends them to the selection gate 310. At this time, the gate 310 is set so that its output is sent to the buffer memory 314 by the control signal from the control pulse generating circuit 306. Therefore, the combined signal from the processing circuit 309 is sent to the buffer memory 314. The write control signal from the control pulse generation circuit 306 is sent to the memory 314, and the combined signal is written therein. The write control signal is issued in synchronization with the transfer pulse to the storage unit 2. When this writing is completed, the control pulse generation circuit 306 repeatedly sends a control signal for reading to the buffer memory 314 at a cycle of 1 frame every 1/30 second. As a result, the combined signal stored in the buffer memory 314 is sent to the monitor 4 via the DA conversion circuit 311 and the NTSC conversion circuit 312. An image in which "1" is inserted in the image signal of the memory MC1 appears on the monitor 4.

[Procedure Amendment 11]

[Document name to be amended] Statement

[Correction target item name] 0036

[Correction method] Change

[Correction content]

When the writing of the combined signal to the buffer memory is completed, the circuit 306 sends a control signal to the gate 310 to switch the output of the combining circuit 309 to the recording circuit 315 and to the memory MC1. Stops sending the transfer pulse. The recording circuit 315 subjects the digital input signal to frequency modulation, amplification, etc., and sends it to the recording multi-head 315a. At the same time, the pulse generation circuit 306
Sends a start signal to the motor drive circuit 316, and the motor 3
17 is driven. When the rotation of the motor 317 reaches a steady state, the rotation of the motor is transmitted to the tape and the tape starts to rotate. At the same time, a transfer pulse having a relatively long cycle is transmitted from the pulse generation circuit 306 to the motor drive circuit 316.
To the terminal CvT. Therefore, the image signal of the memory MC1 is read out at a relatively slow speed, and the signal synthesizing circuit 309,
Recording is performed on the tape 305 through the selection gate 310, the memory circuit 315, and the recording multi-head 315a (the head has four channels, but only one channel is shown for simplicity). At this time, the tape is speed-controlled by the transfer pulse.

[Procedure Amendment 12]

[Document name to be amended] Statement

[Correction target item name] 0042

[Correction method] Change

[Correction content]

When it is desired to reproduce the image signal recorded on the tape 305 on the monitor 4, the reproduction key on the key board 303 is pressed. Then, the board 303 sends a signal to that effect to the pulse generation circuit 306. In response to this, the circuit 306 sends a motor start signal and a synchronization pulse to the motor drive circuit 316 to rotate the tape 305.
The image signal for one frame recorded on the tape 305 is read out, and the multi-head for reproduction 321a, the reproduction circuit 321 for amplifying the signal from the head and demodulating into a digital signal, and the buffer memory 314 via the selection gate 310.
Written in. When this writing is completed, the rotation of the tape 305 is stopped, the image signal stored in the buffer memory 314 is repeatedly read, and the DA conversion circuit 3
11. An image is formed on the monitor 4 via the NTSC conversion circuit.

[Procedure Amendment 13]

[Document name to be amended] Statement

[Correction target item name] 0044

[Correction method] Change

[Correction content]

Further, the DA conversion circuit is provided with an output terminal, and the terminal is connected to a device for converting an image signal converted into an analog signal into a hard copy. As is apparent from the above description, according to the present invention, the first storage means is selected when the plurality of frame image signals stored in the first storage means are selected and transferred to the second storage means. When the necessity of transfer of the image signals of all of the plurality of frames stored in is completed, a signal indicating the completion of necessity specification is sent to the display means to display that effect, and the user is informed of the completion of the work. I can know.

[Procedure Amendment 14]

[Document name to be amended] Statement

[Name of item to be corrected] 0045

[Correction method] Delete

[Procedure Amendment 15]

[Document name to be amended] Statement

[Name of item to be corrected] Brief explanation of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

FIG. 1 is a perspective view of an electronic camera used in the present invention.

FIG. 2 is a perspective view of an electronic camera used in the present invention.

FIG. 3 is a perspective view showing a state in which the camera is separated into an imaging unit and a storage unit.

FIG. 4 is a schematic vertical sectional view of the camera.

FIG. 5 is a circuit diagram showing the internal structure of the solid-state imaging device of the first embodiment.

FIG. 6 is a circuit diagram showing a part and the whole of a storage unit.

FIG. 7 is a front view showing a display unit of the display device.

FIG. 8 is a circuit diagram of an image pickup unit.

FIG. 9 is a perspective view of a converter and a monitor.

FIG. 10 is a time chart of main pulses that control a shooting sequence of the electronic camera.

FIG. 11 is a cutaway view showing a power supply battery incorporated in each of an imaging unit and a storage unit.

FIG. 12 is a circuit diagram of an imaging unit and a storage unit.

FIG. 13 is a circuit block diagram showing an embodiment of the converter of the present invention.

FIG. 14 is a circuit diagram of a power supply unit of the converter.

[Explanation of Symbols of Main Parts] Imaging Device 11 Internal Storage Device MC1 to MC20 Power Battery E2 Electronic Camera 1, 2 External Storage Device 309, 315, 305, 317, 3
16 Charging device 304 Converter 3

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yutaka Ichihara 2-4-11-209 Susukino, Midori-ku, Yokohama-shi, Kanagawa (72) Inventor Akira Miyaji 4-16-11 Kaminoge, Setagaya-ku, Tokyo

Claims (1)

[Claims] 1. A storage medium in which an image signal is stored, a reading unit that relatively moves while contacting the storage medium to read out the image signal from the medium, a frame memory, and a manual operation unit that operates in response to a manual operation. The image signal from the reading means is written in the frame memory, and then the image signal is repeatedly read out from the frame memory to be output as a still image signal, and at the same time the storage medium and the storage medium are output according to the completion of writing the image signal in the frame memory. An image signal reproducing apparatus comprising: a control unit that stops relative movement with respect to a reading unit.