JPH05336021A - Tdma communication synchronization control circuit - Google Patents

Abstract

PURPOSE:To quicken the establishment of synchronization by restarting bit synchronization again in a timing holding reception synchronization in response to the power supply/interruption time of a power supply. CONSTITUTION:When the momentary interruption of a power supply takes place, a reset signal is applied to the control circuit and the power supply of a transmission section and a reception section is interrupted. When the momentary interruption of the power supply is restored, the following processing is implemented depending on a momentary interruption time counted by momentary interruption detection circuits 8, 9. When the time of momentary interruption is shorter than a time width set by the circuit 8 in such a manner, a control section 7 stops the output of a signal 101 to a bit synchronization circuit 3 to stop the early run and allows the circuit 3 to start bit synchronization again. When the time of momentary interruption is longer than the setting time interval by the circuit 8 but shorter than the time width set by the circuit 9, it is discriminated that the synchronization between a base station and the mobile set is unlocked completely. The control section 7 issues an instruction to taking bit synchronization again. When the time of the momentary interruption is longer than the time width set by the circuit 9, it is discriminated that the power supply is completely stopped.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronizing circuit for a mobile unit of a digital mobile communication system, and more particularly to a TDMA communication synchronizing control circuit for performing a synchronizing control after a momentary interruption of supply power.

[0002]

2. Description of the Related Art Conventionally, time division multiple access (Time Division Multiple Access) in which each station installed in a physically different place transmits a signal only in a specific time zone assigned to the station and performs communication
There is a communication method using the ltiple Access (hereinafter TDMA) method. In order to use the same frequency line in time division in this TDMA communication, the transmission rate of the wireless line is higher than the transmission rate of the digital signal to be transmitted (usually several times
Information is transmitted and received (communication) by intermittently (burst) transmitting wireless line signals. In order to perform such TDMA communication, it is necessary to compress the time axis of a digital signal sent from a terminal or the like and convert it into a high speed burst signal. On the contrary, the receiving side receives a high-speed signal sent in a burst and expands it to a clock speed signal of a terminal or the like. This signal compression / decompression operation is a feature of TDMA communication.

Further, in order to prevent the burst signals transmitted from each station from overlapping each other on the wireless line, it is necessary to control the transmission timing. Therefore, each station has a common "time reference", and the transmission timing (transmission time reference) is set in consideration of the distance difference from each station to the receiving (base station) station or the like. This is called reception synchronization because a specific signal (reference station synchronization signal) is detected from the received signals and used as a time reference. Further, the burst demodulator in the receiver has a carrier recovery code (Carrie recovery code) provided at the head position of each burst in order to demodulate a signal received in burst form.
r Recovery: CR) and clock recovery code (Bit Timing R)
A function to reproduce carrier waves and clocks at high speed using ecovery (BTR) is required.

[0004]

In a mobile station that transmits and receives data to and from a base station of such TDMA communication, if a momentary interruption of the supply of power occurs, after the momentary interruption is recovered, the frame synchronization is re-established from the beginning. There is. Therefore, even if there is a short interruption for a short period, it takes a long time to establish synchronization, and if a momentary interruption occurs during a call, the call may be disconnected for a long time.

Here, a method of backing up the power supply by the receiver itself at the time of the momentary interruption as described above is possible, but a large backup battery is required to back up the receiving section. It is not preferable to mount such a large-capacity backup battery in a mobile device that is required to be smaller. Further, if the cost is taken into consideration, the production cost of the mobile device itself will be increased.

It is therefore an object of the present invention to provide a TDMA communication synchronization control circuit which eliminates the above-mentioned drawbacks of the prior art and shortens the synchronization establishment time after a short interruption recovery after a short interruption.

[0007]

A first solution for solving the above problems is a digital mobile communication type mobile device for transmitting / receiving data to / from a base station by TDMA communication. An A / D converter for detecting the electric field level,
T including a bit synchronization circuit, a signal identification unit, and a control unit
In the DMA communication synchronization control circuit, the instantaneous interruption time of the power supply to each circuit is measured, the instantaneous interruption time is compared with the set first threshold value, and the result is output to the first control section. Measures the power failure momentary interruption time to the disconnection detection circuit and each circuit, compares this instantaneous interruption time with the second threshold value set longer than the first threshold value in the previous term and outputs the result to the control section in the previous term. The second-term power interruption detection circuit is provided, and the first-term control section uses the free-run means to operate the first-term bit synchronization circuit with the free-running clock during the power supply momentary interruption, and the first-first second-time interruption after the recovery from the momentary interruption. According to the output result of the detection circuit, when the instantaneous interruption time is shorter than the first threshold of the previous term, a means to operate the bit synchronization circuit of the previous term again and also to maintain the frame synchronization timing, and the detection of the first and second instantaneous interruptions after the recovery of the interruption. Instantaneous interruption time depends on the output result of the circuit More long, it is shorter than the previous period the second threshold value is characterized by having a means to start taking again the frame synchronization as synchronization loss.

In addition to the above, the TDMA communication synchronization control circuit as the second solving means of the present invention provides the control unit described in the above first solving means with the output of the first and second instantaneous interruption detecting circuits after the instantaneous interruption recovery. As a result, when the instantaneous interruption time is longer than the first threshold of the first term and shorter than the second threshold of the first term, and the received electric field level detected by the A / D converter of the first term is smaller than the predetermined value, the bit synchronization circuit of the first term is self-running. It is characterized by including means for performing a free-run operation by a clock.

[0009]

[Operation] The first and second instantaneous interruption detection circuits measure the instantaneous interruption time. When a momentary interruption of power supply occurs, the control unit causes the bit synchronization circuit to perform a free-run operation with a free-running clock. When the instantaneous power interruption time is shorter than the threshold value set in the first instantaneous interruption detection circuit, the first instantaneous interruption detection circuit notifies the control unit of the information. The control unit determines that the frame synchronization is maintained based on the information from the first instantaneous interruption detection circuit,
After the momentary interruption recovery, the frame synchronization is restarted at the stored frame synchronization timing. If the instantaneous interruption time is longer than the threshold value set in the first instantaneous interruption detection circuit but shorter than the threshold value set in the second instantaneous interruption detection circuit, the second instantaneous interruption detection circuit informs the control unit. The control unit regains the frame synchronization assuming that the frame synchronization has been lost. At this time, regarding bit synchronization, if the received electric field level is below a predetermined value due to the output of the A / D converter, the phase correction of the bit synchronization circuit becomes large due to noise or the like, so that the free-run operation is performed.

[0010]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an embodiment of the present invention. In this figure, the carrier modulation method is .pi. / 4 shift QPSK (Quartrature Phase Shift Keyi).
ng) method is used. As a clock / timing extraction method, a method of detecting a clock component by an envelope was used.

In FIG. 1, narrow band filters 1 and A
A reception electric field level signal (hereinafter referred to as RSSI) output from a detector (not shown) is input to the / D converter 10, and the signal band-limited by the narrow band filter 1 is connected and input to the delay circuit 2. The output of the delay circuit 2 is connected to and input to the bit synchronization circuit 3, and the reference signal 102 from the reference clock generation unit 6 and the signal 101 (free run designation) for stopping the phase correction from the control unit 7 are input to the bit synchronization circuit 3. ) And are connected and input. The recovered clock 103 whose phase is corrected by the clock component extracted from the RSSI by the bit synchronization circuit 3 is connected and output to the signal identifying unit 5. This phase correction may cause phase jitter between the bit timing of the transmission signal from the mobile station to the base station and the bit timing of the reception signal from the base station due to timing jitter due to fading, etc. This is to correct a large phase shift. Above RSSI
Is inputted to the A / D converter 10, which converts the output level of the RSSI into a digital signal and outputs it as a connection to the control unit 7.

The demodulation section 4 to which the received signal is connected and input connects and outputs the demodulated signal 104 to the signal identifying section 5. The signal identification section 5 identifies the reproduction signal based on the reproduction clock 103 and outputs the reproduction signal 105 to the control section 7 in a connected manner. Furthermore, the control unit 7 measures the time intervals of the power supply disconnection state in which the power supply is cut off from the normal power supply state and then restored, and at a time interval shorter than the threshold set in the self circuit. A first momentary interruption detection circuit 8 and a second momentary interruption detection circuit 9 that notify the control unit 7 of whether there is any are connected. Further, a power source is connected to these instantaneous interruption detection circuits 8 and 9. FIG. 2 shows a circuit example of the instantaneous interruption detection circuits 8 and 9. In FIG. 2, the reset circuit 11 connected to the power supply outputs a reset signal to the outside, is connected to the other end of the capacitor whose one end is connected to the ground via the resistor R, and is further connected to the voltage detection circuit 12. The connection is output. The voltage detection circuit 12 is connected to the control unit 7.

The operation of the above arrangement will be described below. During normal operation when power is supplied from the power supply, when a transmission signal is received from the base station, the detector detects the transmission signal and extracts the clock component from the RSSI output by the bit synchronization circuit 3. With respect to the clock, the bit synchronization circuit 3 corrects the reference clock 102 to the phase of the clock divided by N, and the reproduction clock 10
3 is output to the signal identification unit 5 (state not in free run). Then, the demodulated signal 10 based on the reproduction clock 103
The signal identifying unit 5 samples the received data from 4 and extracts it.

In such a normal reception state in which the time slot for the mobile unit from the base station is synchronized (the state in which the bit synchronization and the frame synchronization are established), a momentary interruption occurs in the power supplied from the power source. The case will be described below.
The thresholds set in the instantaneous interruption detection circuits 8 and 9 are set to have different time widths for detecting an instantaneous interruption. For example, in the instantaneous interruption detection circuit 8, the time from the state where the synchronization is established to the time when the bit synchronization is lost when the free run (the state where the bit synchronization is performed only by the free-running clock generated by the reference clock generation unit 6) is performed. Set the width. Further, this time width is the frequency deviation of the reference clock generator 6, the deterioration amount of the error rate of the reproduced data caused by the jitter of the reproduced clock 103, the power supply rise time of the receiver, and the synchronization of the base station with the mobile unit. It is decided from the time to consider it as a miss. The time width, which is the threshold value set in the instantaneous interruption detection circuit 9, is set to be equal to the time width in which the memory contents of the RAM built in the control unit 7 can be backed up even when the power supply is cut off.

If the power supply is interrupted under such a condition, the system is reset and the power supply of the transmitter and the receiver of the mobile unit is turned off. However, the power supply to the part that controls the system timing of the control part (the part that maintains the synchronization establishment), the bit synchronization circuit 3 and the reference clock generation part 6 is backed up by a battery. Further, at this time, the control unit 7 outputs the signal 101 to cause the bit synchronization circuit 3 to perform a free run. Then, when the instantaneous interruption of the power source is restored, the following processing is performed according to the instantaneous interruption times measured by the respective instantaneous interruption detection circuits 8 and 9. When the momentary interruption time is shorter than the time width set in the momentary interruption detection circuit 8 as described above, the momentary interruption detection circuit 8 informs the controller 7
To inform. The control unit 7 stops the output of the signal 101 to the bit synchronization circuit 3 by the notification from the instantaneous interruption detection circuit 8 to stop the free-run operation, and causes the bit synchronization circuit 3 to restart the bit synchronization operation. In other words, it is judged that the frame synchronization is still established even if the power supply is interrupted, and TD
The received data sent to the device itself by MA communication is directly captured at the stored bit timing. In this way, when a short power interruption occurs, the frame synchronization timing immediately before the momentary interruption is held, and data identification is performed assuming that data is continuously received at that timing.

Unlike the above, when the power interruption time is longer than the set time width of the momentary interruption detection circuit 8, but shorter than the time width set in the momentary interruption detection circuit 9, the power supply interruption is similar to the above. The disconnection / instantaneous disconnection detection circuit 9 makes a judgment and informs the control unit 7 of that fact. In this case, it is judged that the synchronization between the base station and the mobile unit is completely lost. Based on the notification from the instantaneous interruption detection circuit 9, the control unit 7 instructs the bit synchronization circuit 3 again with a signal 101 to perform bit synchronization for phase correction of the clock extracted from the received signal. Further, at this time, it is determined that the frame synchronization has been lost, and the establishment of slot synchronization to this mobile station is started. On the base station side, the unique / preamble included in the preamble in the burst signal that should be sent from this mobile unit
In some cases, the word cannot be detected when the power supply of the mobile device is cut off, and it is determined that the word is out of synchronization, and the sync word pattern in the burst signal transmitted to the mobile device is changed (to the sync word pattern for sync burst). Further, at this time, when the channel of the other station slot is not used, noise or the like may exist in the unused channel instead of the transmission signal, and when the bit synchronization circuit 3 is continuously operated, this noise is generated. As a result, the bit synchronization phase correction works, and the bit detection error of the signal identification unit 5 increases. Therefore, the control unit 7 monitors the state of the signal obtained by digitally converting the received electric field level by the A / D converter 10, and if the received electric field level is lower than a certain set value, the bit synchronous operation is set to free run. The signal 7 gives a signal 101 to the bit synchronization circuit 3.

Unlike the above, when the instantaneous interruption time until the interruption is restored is longer than the time width set in the interruption detection circuit 9, it is judged that the power supply is completely stopped and the power is re-powered. After the power is turned on, the mobile unit reinitializes and starts from the operation of waiting for a burst signal to the mobile unit.

In this way, different thresholds are set in the two instantaneous interruption detection circuits 8 and 9, respectively, and the instantaneous interruption time and the threshold of each instantaneous interruption detection circuit are compared to determine whether the instantaneous interruption detection circuit 8 has If the instantaneous interruption time is shorter than the threshold value, it is determined that only frame synchronization is still established, and the phase is corrected again at the bit timing held in the mobile station to establish bit synchronization. Further, when the instantaneous interruption time is longer than the threshold value of the instantaneous interruption detection circuit 8 but shorter than the threshold value of the instantaneous interruption detection circuit 9, the bit synchronization and the frame synchronization are retaken. As a result, since the synchronization is established step by step according to the instantaneous interruption time width, the synchronization can be established earlier.

In the above embodiment, the modulation signal of the TDMA communication is explained as a signal of π / 4 shift QPSK system, but it is not limited to this modulation system and other offset 4-phase phase modulation, 2-phase phase modulation. (BPSK) may be binary frequency modulation or the like. Also, the bit timing extraction method is not limited to the clock component extraction method using the envelope, and other methods may be used.

[0020]

As described above, when a momentary interruption occurs in which the power supply to the mobile unit main body is temporarily stopped, the two interruption detection circuits for measuring the momentary interruption time are provided. If the instantaneous interruption time measured by the instantaneous interruption detection circuit is shorter than the preset time interval, it is assumed that the frame synchronization is maintained and only the bit synchronization is established after the power supply is restored. Also, if the instantaneous interruption time is longer than the set time width of the first instantaneous interruption detection circuit and shorter than the setting time of the second instantaneous interruption detection circuit, it is determined that the frame synchronization has been lost and the frame synchronization is established. , The bit synchronization circuit is made to perform free-run operation or bit synchronization with phase correction from the received signal. If the momentary interruption time is longer than the set time of the first and second momentary interruption detection circuit, it is judged that the power is completely cut off,
The initial state after the power is turned on is set. As a result, the reception synchronization is resumed at the timing at which the power supply of the power supply is cut off, so that it does not take time to re-establish synchronization as in the past, and synchronization can be established faster. it can.

Further, the backup battery may be capable of supplying electric power only to the portion which controls the system timing of the control portion, the bit synchronizing portion and the reference clock generating portion, and can be a minimum battery.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a diagram showing an embodiment of a momentary interruption detection circuit according to the present invention.

[Explanation of symbols]

 1 Narrow Band Filter 2 Delay Circuit 3 Bit Synchronous Circuit 4 Demodulation Section 5 Signal Discrimination Section 6 Reference Clock Generation Section 7 Control Section 8 and 9 Instantaneous Interruption Detection Circuit 10 A / D Converter 11 Reset Circuit 12 Voltage Detection Circuit 101 Control Signal 102 Reference clock 103 Reproduced clock 104 Demodulated signal 105 Reproduced data

Claims (2)

[Claims] 1. A digital mobile communication type mobile unit for transmitting and receiving data to and from a base station by TDMA communication, an A / D converter for detecting a received electric field level, a bit synchronizing circuit, and a signal identifying section. In the TDMA communication synchronization control circuit including the control unit, the instantaneous interruption time of power supply to each circuit is measured, the instantaneous interruption time is compared with the set first threshold value, and the result is controlled in the previous period. Of the power supply to each circuit is measured, and this instantaneous power failure time is compared with the second threshold value set longer than the first threshold value in the previous period. It is equipped with a second instantaneous interruption detection circuit that outputs the result to the previous term control section.The previous term control section uses the free-run means to operate the previous term bit synchronization circuit with the free-running clock during the power supply interruption, and after the instantaneous interruption recovery, Based on the output results of the first, second, and momentary interruption detection circuits, When the time is shorter than the 1st threshold of the 1st period, the means to operate the bit synchronization circuit of the 1st period again and also maintain the frame synchronization timing. Is longer than the first threshold value in the previous term and is shorter than the second threshold value in the previous term, means to start frame synchronization again as out of synchronization, and a TDMA communication synchronization control circuit. 2. When the instantaneous interruption time is longer than the first threshold value and is shorter than the second threshold value after the instantaneous interruption recovery by the output result of the first and second instantaneous interruption detection circuits in the control section, 2. The TDMA communication synchronization control according to claim 1, further comprising means for causing the bit synchronization circuit to perform a free-run operation by a free-running clock when the received electric field level detected by the A / D converter is smaller than a predetermined value. circuit.