JPH05341009A - Timing adjusting method for semiconductor test device - Google Patents

Abstract

(57) [Abstract] [Purpose] The purpose is to measure the timing of a signal applied to the semiconductor device 2 and to change the set value of the timing in the program so as to obtain the timing. [Structure] With the semiconductor device 2, in an arbitrary signal,
The timing measurement is performed in an arbitrary section, and the semiconductor test apparatus 1 changes the program setting value of the timing so as to obtain the timing. [Effect] It is possible to save the trouble of adjusting the timing, which is performed by using an oscilloscope, and to perform a test with highly accurate timing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor test apparatus for automatically adjusting the set value of a program created by a user for the timing which could not be adjusted by the calibration by the semiconductor test apparatus itself. The present invention relates to a timing adjustment method.

[0002]

2. _{Description of the Related} Art In FIG. 1, a waveform shown by a solid line is a high level voltage V _IH1 output from a semiconductor test device,
The pulse signal of the low level voltage V _IL1 is shown. The waveforms shown by the broken _lines show pulse signals of the high level voltage V _IH2 and the low level voltage V _IL2 which are similarly output from the semiconductor test device.

The voltage V _CAL is a reference voltage for calibration and is the voltage V _CAL at the falling edge of the pulse signal.
_CAL is the point A, the time from the point of time 0 to point A is t1, and the voltage V at the rising edge of the pulse signal
_The point that becomes _CAL is A ', and the time from the point of time 0 to the point A'is t2.

In the case of a pulse signal in which the reference voltages for determining the rising time and the falling time are V _H and V _L, and the time required for the pulse signal to change from the voltage V _L to the voltage V _H at the rising time is shown by a solid line. , Tr2 in the case of the pulse signal shown by the broken line, and tr2 in the case of the pulse signal shown by the solid line, the time required for the pulse signal to change from the voltage V _H to the voltage V _{L at the} fall. In the case of the pulse signal shown, it is tf2.

The fall time and rise time of the pulse signal output from the semiconductor test apparatus are t1 and t, respectively.
It is programmed with the setting of 2, and even when the voltage of the pulse signal changes, calibration is performed so that the voltage V _{CAL has} a falling t1 and a rising t2.

[0006] In FIG 2, the pulse waveform A, a pulse having a pulse signal, a pulse waveform B voltage is also output from the semiconductor testing device V _IH1, V _IL1 having a voltage V _IH1, V _IL1 output from the semiconductor testing device in signal serving as a reference voltage and V _CAL calibration, rise, a voltage as a reference of falling and V _L, V _H, the pulse signal, fall time, the time required to consist of V _H to V _L Is Δt, the point at which the pulse signal A is V _H at the falling edge is A, and the time at which the V _CAL is V _CAL is time t _A from the point of time 0, and the point at which the pulse signal B is at the falling edge at V _L is B after the time t _A. , V
After the time t _B from the point of time 0 to _CAL , the time required from point A of pulse signal A to point B of pulse signal B is t
_AB .

In the semiconductor device test, when a plurality of signals are applied from the semiconductor test device to the semiconductor device, for example, the time from point A in waveform A to point B in waveform B is t.
_{Since the} voltage that is the reference for calibration when determining the waveform B so as to be _AB is different from the voltages _VH and _VL that are the reference for timing, the rise time and fall time are different for each voltage of the pulse signal. And calculate A
Determine t _B so that the distance between points B and B becomes t _AB , or change the program so that the output waveform of the semiconductor test device is observed with an oscilloscope or the like so that the distance between points A and B becomes t _AB . There was work being done on the oscilloscope.

[0008]

In the conventional timing adjustment method for a semiconductor test device as described above, since the timing calibration cannot be performed with an arbitrary voltage, a plurality of signals output from the semiconductor test device can be used. There was a problem that the relative timing could not be calibrated with arbitrary voltage for each waveform, and the program was changed by observing with an oscilloscope.

The present invention has been made to solve the above-mentioned problems, and the relative timings of a plurality of signals output from a semiconductor test device can be measured at an arbitrary voltage and adjusted to a desired timing. It is an object of the present invention to obtain a method for adjusting the timing of a semiconductor test device that can perform the above.

[0010]

The timing adjusting method for a semiconductor test apparatus according to the present invention includes the following steps. [1] A first signal output step of supplying a first test signal from the semiconductor test device to the semiconductor device. [2] A second signal output step of supplying a second test signal from the semiconductor test device to the semiconductor device after a predetermined timing based on a program set value. [3] A time measuring step of measuring a time from a predetermined point of the first test signal to a predetermined point of the second test signal by the semiconductor device. [4] A program setting value adjusting step of automatically adjusting the program setting value based on a difference between the actual measurement time and the program setting value.

[0011]

In the timing adjusting method for the semiconductor test device according to the present invention, the first test signal is supplied from the semiconductor test device to the semiconductor device in the first signal output step. Further, in the second signal output step, a second test signal is supplied from the semiconductor test device to the semiconductor device after a predetermined timing based on the program set value. Further, in the time measuring step, the semiconductor device measures the time from a predetermined point of the first test signal to a predetermined point of the second test signal. Then, in the program setting value adjusting step, the program setting value is automatically adjusted based on the difference between the actual measurement time and the program setting value.

[0012]

【Example】

Example 1. A configuration of a system for carrying out the first embodiment of the present invention will be described with reference to FIGS. 3 and 4. FIG. 3 is a block diagram showing an automatic timing adjustment system for carrying out the first embodiment of the present invention. FIG. 4 is a block diagram showing a semiconductor device of the automatic timing adjustment system of FIG. In the drawings, the same reference numerals indicate the same or corresponding parts.

In FIG. 3, reference numeral 1 is a semiconductor test device, and 2 is a semiconductor test device.
Is a semiconductor device. The semiconductor test equipment 1 is CP
It is provided with U, ROM, RAM, I / F, operation switches and the like. 4, 3 and 4 are comparators, 5 is a signal processing circuit connected to the comparators 3 and 4, 6 is a clock (CLK), and 7 is a counter.

Next, the operation of the above automatic timing adjustment system will be described with reference to FIGS. 5 and 6. FIG. 5 is a timing chart showing the first embodiment of the present invention. FIG. 6 is a diagram showing a memory table of the semiconductor test device.

In the semiconductor test apparatus 1, by automatically changing the timing created by the user for the timing that cannot be adjusted by the calibration,
The timing is adjusted.

The automatic timing adjustment method (system) according to the first embodiment automatically measures and adjusts the relative timings of a plurality of signals output to the semiconductor device 2 to be tested by the semiconductor test device 1. The program is rewritten so that the relative timing between signals can be output arbitrarily.

That is, for a plurality of signals applied to the semiconductor device 2, the relative timing between the signals is measured at an arbitrary voltage point for each signal, and the program is automatically changed to have the arbitrary timing. To do.

As shown in FIG. 3, a plurality of signals are applied from the semiconductor test device 1 to the semiconductor device 2. However, as shown in FIG. It is input to the comparators 3 and 4. In the case shown in the example, the signals A and B are input to the comparators 3 and 4, respectively.

Here, as compared with the reference voltages 1 and 2, respectively, as shown in FIG. 5, when the voltage level of the signal A becomes the reference voltage 1, the signal processing circuit 5 generates a set pulse. Further, when the voltage level of the signal B becomes the reference voltage 2, the signal processing circuit 5 generates a reset pulse.

The time between the set pulse and the reset pulse is measured by the clock 6 and the counter 7. Then, it is sent to the semiconductor test equipment 1. set, rese
If the time interval t is short, the value obtained by adding up between the set and the reset several times is counted, and the time at the timing 1 shown in FIG. 5 is measured. Note that the same measurement can be performed at the rising portion shown in FIG.

As described above, some timings are measured by the semiconductor device 2, and the automatic adjustment program of the semiconductor test device 1 compares those values with the desired timing. Then, the program setting value of the timing is automatically changed so that the difference becomes small. In this way, the timing of the signal output from the semiconductor test device 1 is adjusted.

The first embodiment of the present invention, as described above,
The purpose is to measure the timing of the signal applied to the semiconductor device 2 and change the set value of the timing in the program so as to obtain the timing.

Conventionally, at a timing applied to the semiconductor device 2, a portion which cannot be adjusted by the semiconductor test device 1 itself is measured by an oscilloscope and adjusted by changing the timing setting.

In the first embodiment of the present invention, the semiconductor device 2 shown in FIG. 4 measures the timing of an arbitrary section in an arbitrary signal so that the semiconductor test device 1 obtains the timing to be obtained. The timing program setting value is changed. Therefore, it is possible to save the trouble of timing adjustment that was performed using an oscilloscope,
An effect that a test can be performed with high precision timing is achieved.

[0025]

As described above, according to the present invention, since the timing of the output signal of the semiconductor test device is automatically measured and adjusted to the timing to be obtained, it is possible to save the trouble of actually measuring and adjusting with an oscilloscope and the like. The semiconductor device can be tested at highly accurate timing.

[Brief description of drawings]

FIG. 1 is a waveform diagram showing an output signal of a semiconductor test device for carrying out a first embodiment of the present invention.

FIG. 2 is a waveform diagram showing an output signal of the semiconductor test device for carrying out the first embodiment of the present invention.

FIG. 3 is a block diagram showing an automatic timing adjustment system for carrying out the first embodiment of the present invention.

FIG. 4 is a block diagram showing a semiconductor device of an automatic timing adjustment system for carrying out the first embodiment of the present invention.

FIG. 5 is a timing chart showing the operation of the automatic timing adjustment system for carrying out the first embodiment of the present invention.

FIG. 6 is a diagram showing a memory table of the semiconductor test device of the automatic timing adjustment system for carrying out the first embodiment of the present invention.

[Explanation of symbols]

 1 semiconductor test device 2 semiconductor device 3 comparator 4 comparator 5 signal processing circuit 6 clock 7 counter

Claims (1)

[Claims] 1. A timing adjustment method for a semiconductor test device for testing a semiconductor device, comprising: a first signal output step of supplying a first test signal from the semiconductor test device to the semiconductor device; and a predetermined value based on a program set value. A second signal output step of supplying a second test signal from the semiconductor test device to the semiconductor device after the timing of, and the semiconductor device determines a predetermined point of the second test signal from a predetermined point of the first test signal. The semiconductor device is characterized by including a time measuring step for measuring the time to the point, and a program setting value adjusting step for automatically adjusting the program setting value based on the difference between the actual measurement time and the program setting value. Timing adjustment method for test equipment.