JPH0536621A - Method and apparatus for semiconductor surface treatment - Google Patents

Abstract

PURPOSE:To manufacture semiconductor excellent in characteristics in a short processing time, so as to have superior uniformity over a large area, by ionizing hydrogen or halogen gas together with dopant particles evaporated by a vacuum evaporation method, and forming the coexistence state of dopant ion species and hydrogen or halogen gas ion species. CONSTITUTION:In a semiconductor surface treatment chamber 101 whose inside pressure is reduced, a dopant source contained in a crucible 110 is heated with a filament 111 and evaporated. At the same time, high frequency electric power is applied, and hydrogen or halogen gas plasma is generated between an anode and a cathode. The evaporated dopant source is ionized, and dopant ion species and hydrogen or halogen gas ion species are mixedly present. At this time, the concentration ratio of the dopant ion species and the hydrogen or the halogen gas ion species is adjusted with high frequency electric power or the like. Thereby the surface implantation and the diffusion of dopant ion species are progressed, and the impurity doping is performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface treatment method and apparatus, and more particularly to a method and apparatus for treating the surface of a semiconductor or semiconductor device in the manufacturing process.

[0002]

2. Description of the Related Art Recent trends in semiconductor device technology include a trend toward miniaturization and integration as typified by semiconductor memories and image sensors, as well as an increase in area as typified by active matrix circuits for solar cells and liquid crystal displays. There is. In a large area semiconductor device, it is necessary to reduce the manufacturing cost per unit area as much as possible. Therefore, as a semiconductor material, an amorphous or polycrystalline semiconductor thin film deposited on a low-priced substrate such as glass, metal or ceramics is being used together with a single crystal silicon wafer. However, in order to reduce the manufacturing cost of the device, cost reduction is also required for each of the other manufacturing processes.
In addition, the manufactured device must have uniform characteristics over a large area of 30 cm square or more. In other words, for large area devices, appropriate process technology must be developed.

Among the various manufacturing processes, the doping technique is the most important technique from the viewpoint of increasing the area.

The most commonly used semiconductor doping technique is the thermal diffusion method. The thermal diffusion method is a technique in which dopant atoms contained in a film coated or deposited on the surface of a semiconductor are diffused into the semiconductor at a high temperature of 1000 ° C. or higher and activated as a dopant. Although this method can be applied to a large-area device relatively easily, the use of high temperature limits the usable substrate when applied to a thin film semiconductor. In addition, the processing takes a long time and the manufacturing throughput is not good.

Another general doping technique is an ion implantation method. In this method, from a beam of dopant atom ions ionized in a vacuum,
After removing impurities by mass spectrometry, it is accelerated by an electric field, implanted into a semiconductor, and annealed at a temperature of usually 800 ° C. or higher to activate the dopant. Although this method provides easy control of the dopant, it also requires scanning the beam over a large area and still has poor manufacturing throughput. In addition, the size of the device becomes large, which is disadvantageous in terms of cost.

On the other hand, in the case of a thin film semiconductor which is deposited from the vapor phase by a method such as thermal CVD or plasma CVD, a gas containing a dopant is mixed into the vapor phase at the time of depositing the thin film to introduce dopant atoms into the thin film semiconductor. There is a way to do it. This method is relatively easy to increase the area, and the throughput is better than that of the thermal diffusion method or the ion implantation method, but the characteristics of the formed n-type or p-type semiconductor are not always sufficient, and the method is applied to semiconductor devices. There were many inadequate points. A well-known example is that when polycrystal Si is deposited by thermal CVD, if monosilane (SiH ₄ ) as a raw material is mixed with phosphine (PH ₃ ) to make it an n-type, Si crystal grains are particularly high in concentration. Becomes smaller, and the characteristics as n-type Si are inferior to those obtained when the n-type is formed by the thermal diffusion method or the ion implantation method. Further, when amorphous silicon (a-Si) is deposited by the plasma CVD method, if SiH ₄ as a raw material is mixed with diborane (B ₂ H ₆ ) to form a p-type, the optical band gap (Eg) decreases. As a result, the localized level increases and the characteristics as a p-type semiconductor deteriorate.

The reason for this is that when a gas containing a dopant is mixed in the gas phase, it affects the reaction of the gas containing the element (Si, etc.) of the main constituent of the semiconductor, and the precursor ( It is thought to change the precursor of the deposition reaction).

When doping is performed by deposition, it is generally impossible to selectively form an n-type or p-type semiconductor region at a specific place on the substrate. This complicates the process especially in the application to liquid crystal displays. Several proposals have been made from such a viewpoint.

MBSpitzer and SNBunker are p-type single crystal S
In i, a solar cell with a conversion efficiency of 15% having a pn junction was made by ion implantation of phosphorus without mass spectrometry (16th IEEE Photovoltaic Conf. SanDiego,
1982, p711-). H.Itoh et al. Also made a solar cell with a conversion efficiency of 10% without the antireflection layer by the same method (Proc. 3rdPVS
EC in Japan ('82) p.7-). In the ion implantation method without mass spectrometry, the device is relatively simple and the manufacturing throughput is improved. However, it is difficult to process a sufficiently large area for application to solar cells. Further, in their experiments, after implanting ions, annealing is performed at 550 ° C. or 600 ° C. or higher, which not only has low manufacturing throughput, but also has many restrictions on application to thin film semiconductors.

In SD Westbrook et al., A gas containing boron is decomposed by glow discharge, and an electric field is applied to accelerate boron ions and implant them into n-type single crystal Si.
Annealing is performed at 50 ° C or higher to produce solar cells with a conversion efficiency of 19% (Appl. Phys. Lett. Vol. 50 ('8
7) p.469-). On the other hand, Yoshida, Setoshine, and Hirao use the same device to dope phosphorus into a-Si to make a thin film transistor (TFT) (IEEE Elec. Devic
e Lett. Vol.9 (1988) p.90-). With these methods, it is easy to increase the area and the manufacturing throughput is relatively good. Further, as shown in the latter, p-type or n-type regions can be selectively formed at specific locations on the semiconductor surface. However, since mass spectrometry is not performed, various unnecessary ions other than the dopant ions are also implanted at high speed. Therefore, it is difficult to anneal at a sufficient temperature.
In the case of -Si, damage due to ions is particularly difficult to remove, which has been an obstacle in application to a-Si solar cells. In addition, neutral dopant atoms other than ions cannot be controlled, and these dopant atoms easily diffuse into each part of the device. In particular, an a-Si solar cell usually uses a pin junction, and at least three layers of n-type, i-type, and p-type are used, and a tandem-type a-Si cell in which a plurality of pin junctions are stacked has six layers and nine layers. Become. These dopants are used for adjoining semiconductor layers of different conductivity types (especially i
If it is mixed in the layer), the characteristics of the device are likely to be adversely affected. Above all, in a roll-to-roll apparatus that continuously deposits on a long strip-shaped substrate for the purpose of mass production of an a-Si solar cell, diffusion of a dopant into an adjacent film forming chamber is likely to occur.

In order to mass-produce such a high-performance a-Si solar cell, it was necessary to further improve the doping technique for a large area. Further, in the case of a crystalline semiconductor solar cell or a liquid crystal display, it has been desired to develop a doping technique with a high production throughput.

[0012]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional problems and provide an inexpensive and effective surface treatment method and apparatus.

[0013]

Means for Solving the Problems The inventors of the present invention have conducted extensive studies to overcome the above-mentioned problems in the conventional semiconductor surface treatment method and apparatus and achieve the above-mentioned object of the present invention. By applying the vacuum vapor deposition method, it has been found that large area processing can be easily performed, and the processing equipment and raw material costs are low.

Further, the inventors of the present invention ionize hydrogen or halogen gas together with the dopant particles evaporated by the vacuum deposition method and etch the semiconductor surface with hydrogen or halogen ion species to prevent film deposition by the dopant ion species. It was found that the surface energy can be increased to promote the surface implantation and diffusion by the dopant ion species and the semiconductor surface can be effectively doped.

The present invention, however, has been completed based on the knowledge obtained by the present inventors and the facts confirmed by the present inventors, and relates to a semiconductor surface treatment method and apparatus.

That is, in the semiconductor surface treatment method provided by the present invention, particles are formed by evaporating an evaporation source containing a dopant element with thermal energy in a semiconductor surface treatment chamber in a reduced pressure state, and the particles are hydrogenated. Alternatively, by exposing it to a halogen gas plasma, a part or all of it is ionized to form a coexisting state of the dopant ion species and hydrogen or halogen gas ion species, and the semiconductor surface is etched by hydrogen or halogen gas ion species to form dopant ion species. It is characterized in that the film is prevented from being deposited and the surface energy is increased to promote the surface implantation and diffusion by the dopant ion species to perform the impurity doping.

The semiconductor surface treatment apparatus provided by the present invention includes a semiconductor surface treatment chamber, a substrate to be treated having a semiconductor surface provided in the treatment chamber, exhaust means for keeping the treatment chamber at a reduced pressure, An evaporation source containing a dopant element installed in the processing chamber, an evaporation source heating means for heating and evaporating the evaporation source, a gas introducing means for introducing hydrogen or halogen gas into the processing chamber, and hydrogen or halogen gas plasma. And plasma-inducing means for ionizing the particles evaporated from the evaporation source to form dopant ionic species and hydrogen or halogen gas ionic species, and etching the semiconductor surface with hydrogen or halogen gas ionic species. The film is prevented from being deposited by the dopant ion species, and the surface energy is increased to increase the surface energy of the dopant ion species. It is characterized by promoting implantation and diffusion.

In the above method and apparatus provided by the present invention, the substrate to be processed having a semiconductor surface is
Any substrate may be used as long as it has a semiconductor on its surface. For example, a crystalline semiconductor substrate such as a single crystal semiconductor substrate made of silicon, germanium, gallium arsenide or the like or a polycrystalline semiconductor substrate,
Alternatively, an insulating substrate on which an amorphous semiconductor layer such as silicon, germanium, silicon germanium, silicon carbide, or silicon nitride is formed, a semiconductor substrate, a conductive substrate, or the like can be given. The shape of the substrate to be processed is not limited, but examples thereof include a wafer shape, a square shape, a roll shape, and a long shape.

The evaporation source containing the dopant element provided by the present invention may be any as long as it contains the dopant element capable of changing the conductivity of the semiconductor surface of the substrate to be treated, for example, a silicon semiconductor or a germanium semiconductor. Examples of boron include boron, phosphorus, aluminum and antimony.

The evaporation source heating means for applying heat energy to the evaporation source and heating and evaporating it provided by the present invention may be any as long as it can heat the evaporation source in a reduced pressure atmosphere, for example, a filament, a boat, etc. Resistance heating, heating with an electron beam, heating with light such as a laser beam, and the like.

Examples of the halogen gas provided by the present invention include fluorine gas, chlorine gas, bromine gas and iodine gas.

As the plasma inducing means for forming the coexistence state of the above-mentioned dopant ion species and hydrogen or halogen gas ion species provided by the present invention, direct current voltage, alternating current voltage, capacitive coupling type or inductive coupling type RF, microwave are used. And the like.

The present invention will be described in more detail with reference to the drawings, but the present invention is not limited thereto.

FIG. 1 is a schematic diagram of an apparatus of the present invention suitable for carrying out the method of the present invention. In the figure, 101 is a semiconductor surface processing apparatus, and 102 is a processing chamber. The substrate to be processed 106 is fixed to the cathode 105, the cathode 105 is electrically insulated from the processing chamber 102 by the insulator 104, and is shielded by the shield electrode 114. The cathode 105 is connected to the high frequency power supply 103 and is supplied with high frequency power.
In the processing chamber 102, an anode 109 is provided facing the cathode 105.
Is provided. A hole is provided at the center of the anode 109, and an alumina crucible 110 for charging an evaporation source is installed in this hole. A heating filament 111 is wound around the crucible 110, and the filament 111 is
It is connected to the filament heating power source 113. Further, a gas introduction pipe 107 is provided for introducing hydrogen or halogen gas into the processing chamber 102, and the flow rate is adjusted by the valve 108. The processing chamber 102 can be evacuated from the exhaust port 112 by an exhaust pump (not shown).

In the apparatus shown in the figure, the crucible 11
The dopant source charged in 0 is the filament 111
Is heated and evaporated by. At the same time, by inputting high frequency power, hydrogen or halogen gas plasma is generated between the anode and the cathode. The evaporated dopant source is ionized and the dopant ion species and hydrogen or halogen gas ion species are mixed in the plasma. At this time, the concentration ratio of the dopant ion species and the hydrogen or halogen gas ion species can be adjusted by adjusting the high frequency power, the pressure in the processing chamber, and the evaporation rate. Due to this concentration ratio, for example, when hydrogen or halogen gas ion species is dominant, etching of the semiconductor surface proceeds, and when dopant ion species is dominant, similar to ion plating, the dopant source is used. Film deposition proceeds. However, just in between, there is a region where neither film deposition nor etching occurs. In this region, the high-energy colliding dopant ion species is implanted into the semiconductor surface. On the other hand, the dopant ion species that collide with low energy once adhere to the surface, but are immediately etched by the impact of hydrogen or halogen gas ion species. That is, in this region, film deposition and etching of the semiconductor surface do not occur, but only ion implantation into the semiconductor surface by the dopant ion species proceeds. Furthermore, since the semiconductor surface is always in an active state due to the hydrogen or halogen gas ion species striking the surface, ion implantation and diffusion into the semiconductor are promoted.

[0026]

EXAMPLES The present invention will be further described below with reference to examples of the semiconductor surface treatment method and apparatus of the present invention, but the present invention is not limited thereto.

Example 1 In this example, a pin-type a-Si photovoltaic element 308 having a layer structure shown in the schematic sectional view of FIG. 3 was produced using the apparatus shown in FIG.

The photovoltaic element comprises a substrate 301, a lower electrode 302, an n-type semiconductor layer 303, an i-type semiconductor layer 304,
p-type semiconductor layer 305, transparent electrode 306, and collector electrode 30
7 is a photovoltaic element 308 in which 7 is deposited and formed in this order.
In this photovoltaic element, it is premised that light is incident from the transparent electrode 306 side.

First, a stainless square substrate (5 cm × 5 c
m) is a commercially available sputtering device (SBH- manufactured by ULVAC, Inc.)
2206DE), using Ag (99.99%) as a target to form an Ag thin film of 0.3 μm, and continuously using ZnO (99.999%) as a target for 1.5.
A ZnO thin film having a thickness of μm was sputter-deposited to form a lower electrode 302.

Subsequently, the substrate on which the lower electrode was formed was put on a commercially available plasma CVD apparatus (CHJ- manufactured by ULVAC, Inc.).
3030). Rough evacuation and high vacuum evacuation were performed with an exhaust pump through the exhaust pipe of the reaction vessel.
At this time, the surface temperature of the substrate was controlled by the temperature control mechanism so as to be 250 ° C.

When the gas has been sufficiently evacuated, SiH ₄ 300sccm, SiF ₄ 4sccm, PH ₃ /
H ₂ (1% H ₂ dilution) 55 sccm, H ₂ 40 sccm were introduced,
The opening of the throttle valve was adjusted, the internal pressure of the reaction vessel was maintained at 1 Torr, and when the pressure became stable, 200 W of electric power was immediately supplied from the high frequency power source. The plasma lasted for 5 minutes. As a result, an n ⁺ a-Si: H: F film as the n ⁺ semiconductor layer 303 was formed on the lower electrode 302.

After exhausting again, SiH ₄ 300sccm, SiF ₄ 4sccm, and H ₂ 40sccm were introduced from the gas introduction pipe, the throttle valve opening was adjusted, and the internal pressure of the reaction vessel was maintained at 1 Torr. When the pressure became stable, an electric power of 150 W was immediately applied from the high frequency power source. The plasma lasted for 40 minutes. Thereby, the i-type semiconductor layer 3
The a-Si: H: F film as 04 is the n-type semiconductor layer 303.
Formed on.

Next, the substrate 301 was taken out from the plasma CVD apparatus and set in the semiconductor surface treatment apparatus 101 shown in FIG. Further, the crucible 110 was charged with granular boron (99%).

First, after evacuating to 10 ^-5 Torr or less from the exhaust port 112, hydrogen gas is introduced from the gas introducing pipe 107 while adjusting the flow rate with the valve 108, and the pressure is about 10 mT.
Orr. A current was passed through the filament 111 to start the evaporation of boron, and at the same time, high frequency power of 300 W was applied from the high frequency power source 103 to cause discharge. After 3 minutes, the discharge was stopped, the processing chamber 102 was leaked to the atmosphere, and then the substrate was taken out.

Next, the transparent electrode 306 is formed by ordinary vacuum vapor deposition.
(ITO) was formed, and the collector electrode 307 (Al) was further vapor-deposited with a mask to complete the photovoltaic element 308.

Regarding the produced photovoltaic element 308, A
When the characteristics were evaluated under irradiation with M1.5 (100 mW / cm ² ) light, a photoelectric conversion efficiency of 9.1% was obtained. The rate of change of the photoelectric conversion efficiency with respect to the initial value after continuously irradiating AM1.5 (100 mW / cm ² ) light for 800 hours was 22% or less.

Example 2 In this example, an a-Si / a-Si tandem photovoltaic element 413 having a layer structure shown in the schematic cross-sectional view of FIG. 4 was used by using a roll-to-roll apparatus 242 shown in FIG. It was made.

The photovoltaic element 413 has a lower electrode 402 on a substrate 401, an n-type semiconductor layer 403, an i-type semiconductor layer 404, and a p-type semiconductor layer 40 which form a first cell 411.
5, and the n-type semiconductor layer 40 that constitutes the second cell 412
6, a i-type semiconductor layer 407, a p-type semiconductor layer 408, a transparent electrode 409, and a collector electrode 410 are deposited in this order to form a photovoltaic element. In this photovoltaic element, it is premised that light is incident from the transparent electrode 409 side.

The apparatus 242 of FIG. 2 is one in which photovoltaic elements are continuously formed on a strip-shaped stainless steel substrate 204. The apparatus shown in the figure has a substrate delivery chamber 203, a first n
Mold chamber 213, first i-type chamber 222, first p-type chamber 227, second n-type chamber (not shown), second i-type chamber (not shown), second p-type chamber (not shown). (Shown) and the substrate winding chamber 239 are arranged in this order. Second n-type chamber, second i
The mold chamber and the second p-type chamber are respectively the first
N-type chamber 213, first i-type chamber 22
2. The structure is exactly the same as that of the first p-type chamber 227. Gas gates 207, 215, 24 between the chambers
It is isolated by 3, 236 (other not shown) to prevent impurities from mixing between the chambers.

In the figure, first, the substrate delivery chamber 203
Is a box on which the strip-shaped substrate 204 is set. During the film formation, the guide roller 2 is fed from the substrate delivery chamber 203.
The substrate 204 is continuously carried out to the reaction chamber via 05. The substrate delivery chamber 203 is evacuated via the exhaust port 202 and the valve 201.

The substrate winding chamber 239 is a box for winding the film-formed strip-shaped substrate, and the substrate is continuously fed from the reaction chamber to the substrate winding chamber 239 via the guide roller 237 during the film formation. Be delivered to. The substrate winding chamber 239 is evacuated through the exhaust port 240 and the valve 241.

The n-type chamber 213 and the i-type chamber 222 are plasma CVD chambers.
A type semiconductor layer and an i type semiconductor layer are deposited. The substrate is heated in the chamber by the substrate heaters 214 and 223 and controlled to a predetermined substrate temperature. The raw material gas is supplied from the raw material gas supply pipes 210 and 218, decomposed by plasma generated between the cathodes 211 and 220 and the substrate to form a semiconductor film on the substrate, and further exhausted from the exhaust ports 209 and 219.

The p-type chamber 227 is the semiconductor surface treatment apparatus of the present invention using the method of the present invention. The substrate is controlled to a predetermined temperature by the substrate heater 228. The inside of the chamber is evacuated from the exhaust port 244. A p-type dopant such as boron is charged in the crucible 232, and is heated and evaporated by passing a current from the evaporation source heating power source 233 to the filament. Further, hydrogen or halogen gas is introduced through the gas introduction pipe 245. The evaporated p-type dopant particles are ionized by the hydrogen or halogen gas plasma induced by the induction coil 231 connected to the high frequency power supply 230. These ionic species impinge on the substrate and i
Boron is implanted into the surface of the type semiconductor to form a p-type layer.

Gas gates 207, 215, 243, 23
In FIG. 6 (other not shown), a sweep gas such as Ar or hydrogen is used to isolate the gas between the chambers.
08,216,217,224,225,235,23
4 (other not shown).

A photovoltaic element 413 was produced using such a roll-to-roll device.

First, the stainless steel strip substrate 204 is set in a continuous sputtering device (not shown), and Al--Si (5
% Si) as a target and 0.2 μm of Al-
A lower electrode 402 was formed by continuously depositing a 0.1 μm thick SnO ₂ thin film by sputtering using a Si thin film and SnO ₂ (99.99%) as a target.

Subsequently, the strip substrate having the lower electrode 402 formed thereon was set in the roll-to-roll apparatus shown in FIG. After that, an evacuation pump (not shown) evacuated through the exhaust pipe of each chamber. This time,
The surface temperature of the substrate was controlled by the temperature control mechanism so as to be 250 ° C.

When the gas has been sufficiently exhausted, SiH ₄ / PH ₃ / H ₂ is supplied to the first and second n-type chambers through the gas introduction pipes 210 and 218, and the first and second i-type chambers are supplied. SiH ₄ / SiF ₄ / H ₂ was introduced into the chamber, fluorine gas was introduced into the first and second p-type chambers from the gas introduction pipe 245, and Ar gas was introduced into the gas gate, and the internal pressures of the n-type and i-type chambers were changed. Was maintained at 100 mTorr and the pressure in the p-type chamber was maintained at 50 mTorr.

When the pressure is stable, power is supplied from each high-frequency power source to generate plasma in each chamber, and the power of the evaporation source heating device is also turned on. When discharge is stable, the belt-shaped substrate is transported at a speed of 20 cm. / min, transfer from the left side to the right side in the figure, and continuously, n, i, p /
The n, i, and p type semiconductor layers were laminated.

After the semiconductor layers were laminated and formed over the entire length of the belt-shaped substrate, they were cooled and taken out, and further a solar cell module having a size of 35 cm × 70 cm was continuously produced by a continuous modularizing device (not shown).

Regarding the manufactured solar cell module, A
When the characteristics were evaluated under irradiation with M1.5 (100 mW / cm ² ) light, the photoelectric conversion efficiency was 7.3% or more, and the variation in characteristics between modules was within 10%.

In addition, 8 of AM1.5 (100 mW / cm ² ) light
The rate of change in photoelectric conversion efficiency with respect to the initial value after continuous irradiation for 00 hours was measured and found to be within 17%.

A 1 kW power supply system could be produced by connecting these modules.

Example 3 In this example, the roll-to-roll type a-Si / a-Si tandem photovoltaic device having the layer structure shown in the schematic sectional view of FIG. The device 242 was manufactured by using a partially modified device (not shown). The difference from the apparatus of FIG. 2 is that the semiconductor surface treatment apparatus of the present invention, which is the same as the first or second p-type chamber, is used for the second n-type chamber. Granular boron (99%) was charged as an evaporation source in the first and second p-type chambers, and granular phosphorus (99%) was charged in the second n-type chamber.

A photovoltaic element 413 was produced by using such a roll-to-roll device.

First, as in Example 2, the stainless steel strip substrate was set in a continuous sputtering apparatus, and Al--Si (5
% Si) as a target and 0.5 μm of Al-
A lower electrode 402 was formed by continuously depositing a Si thin film and a ZnO thin film of 0.5 μm by sputtering using ZnO (99.99%) as a target.

Subsequently, the strip substrate on which the lower electrode 402 was formed was set in a roll-to-roll device. After that, an evacuation pump evacuated through the exhaust pipe of each chamber. At this time, the surface temperature of the substrate is 25
The temperature was controlled by a temperature control mechanism so that the temperature became 0 ° C.

When the gas has been sufficiently evacuated, SiH ₄ / PH ₃ / H is introduced into the first n-type chamber through the gas inlet pipe.
₂ and SiH ₄ / Si in the first and second i-type chambers.
Introducing F ₄ / H ₂ and Ar gas into the gas gate, adjusting the opening of the throttle valve to adjust the first n-type and the first and second
The internal pressure of the i-type chamber was maintained at 100 mTorr. Further, hydrogen gas was introduced into each of the second n-type chamber and the first and second p-type chambers, and the opening of the throttle valve was adjusted to maintain the pressure at 50 mTorr.

When the pressure is stable, power is applied from each high-frequency power source to generate plasma in each chamber, and the power source of the evaporation source heating device is also turned on. When discharge is stable, the belt-shaped substrate is transported at a speed of 20 cm. The n, i, p / n, i, p-type semiconductor layers were successively formed by stacking at a speed of / min.

After the semiconductor layers were laminated and formed over the entire length of the belt-shaped substrate, they were cooled and taken out, and further, a solar cell module having a size of 30 cm × 120 cm was continuously produced by a continuous modularizing device.

Regarding the manufactured solar cell module, A
When the characteristics were evaluated under irradiation with M1.5 (100 mW / cm ² ) light, the photoelectric conversion efficiency was 7.5% or more, and the variation in the characteristics between the modules was within 12%.

In addition, 8 of AM1.5 (100 mW / cm ² ) light is used.
The rate of change of the photoelectric conversion efficiency with respect to the initial value after continuous irradiation for 00 hours was measured and found to be within 16%.

Example 4 In this example, a roll-to-roll apparatus 242 shown in FIG. 2 was used for the a-SiC / a-Si / a-SiGe triple photovoltaic element having the layer structure shown in the schematic sectional view of FIG. Was manufactured by using an apparatus (not shown) which was partially modified. The apparatus used in this example is similar to the apparatus used in Example 2 except that the third n
Type, i-type and p-type chambers are added, only the first, second and third p-type chambers are semiconductor surface treatment chambers of the present invention, and the other chambers are plasma CVs.
D chamber.

The photovoltaic element shown in FIG. 5 has a lower electrode 502 on a substrate 501, an n-type semiconductor layer 503, an i-type semiconductor layer 504, and a p-type semiconductor layer 50 which form a first cell 514.
5, and the n-type semiconductor layer 50 that constitutes the second cell 515.
6, the i-type semiconductor layer 507, the p-type semiconductor layer 508, and the n-type semiconductor layer 509, the i-type semiconductor layer 510, the p-type semiconductor layer 511, and the transparent electrode 51 that form the third cell 516.
2 and a collector electrode 513 are deposited in this order to form a photovoltaic element 517. In this photovoltaic element, it is premised that light is incident from the transparent electrode 512 side.

A photovoltaic element 517 was produced using such a roll-to-roll apparatus.

First, as in Example 2, the stainless steel strip substrate was set in a continuous sputtering apparatus, and Al (99.9%) was set.
Was used as a target to form a 0.3 μm Al thin film, and ZnO (99.99%) was used as a target to form a 0.3 μm ZnO thin film by sputtering to form a lower electrode 502.

Subsequently, the strip substrate having the lower electrode 502 formed thereon was set in a roll-to-roll device. After that, an evacuation pump evacuated through the exhaust pipe of each chamber. At this time, the surface temperature of the substrate is 25
The temperature was controlled by a temperature control mechanism so that the temperature became 0 ° C.

When the gas has been sufficiently evacuated, SiH ₄ / PH ₃ / H is introduced into each n-type chamber through the gas inlet pipe.
₂ in the first i-type chamber is SiH ₄ / GeH ₄ / H ₂
In the second i-type chamber, SiH ₄ / SiF ₄ / H ₂
In the third i-type chamber is SiH ₄ / CH ₄ / H
₂ , and Ar gas was introduced into the gas gate, and the opening of the throttle valve was adjusted to maintain the pressure of each n-type chamber and i-type chamber at 100 mTorr. Fluorine gas was introduced into each p-type chamber and the throttle valve opening was adjusted to maintain the pressure at 50 mTorr.

When the pressure is stable, power is applied from each high-frequency power source to generate plasma in each chamber, and the power source of the evaporation source heating device is also turned on. When discharge is stable, the belt-shaped substrate is transported at a speed of 30 cm. / min, n, i, p / n, i, p / n, i, p
A type semiconductor layer was formed by stacking.

After the semiconductor layers were laminated and formed over the entire length of the strip-shaped substrate, the semiconductor substrate was cooled and taken out, and further, a solar cell module of 30 cm × 120 cm was continuously produced by a continuous modularizing device.

Regarding the manufactured solar cell module, A
When the characteristics were evaluated under irradiation with M1.5 (100 mW / cm ² ) light, the photoelectric conversion efficiency was 9.3% or more, and the variation in characteristics between modules was within 7%.

In addition, 8 of AM1.5 (100 mW / cm ² ) light is used.
When the rate of change of the photoelectric conversion efficiency with respect to the initial value after continuous irradiation for 00 hours was measured, it was within 8%.

A power supply system of 5 kW could be produced by connecting these modules.

Example 5 In this example, polycrystalline Si having the structure shown in FIG. 6 was used.
The solar cell will be described. Wacker surface-polished 6-inch diameter n-type polycrystalline Si wafer (resistivity 2
ohm-cm) was prepared as a substrate. After removing the natural oxide film with hydrofluoric acid, this substrate was set in the apparatus of FIG. 1 so that the polishing surface was face up. Granular Ga having a purity of 99.9% was charged into the crucible 110 as an evaporation source. The doping conditions are as follows: hydrogen gas flow rate 20 sccm, pressure 5 mTorr, substrate temperature 1
The discharge power was 500 W at 00 ° C., and the discharge was continued for 150 seconds to form a p-type region 602. Then, the evaporation source was set to 99.9
% Of granular Sb and the substrate was set upside down under the same doping conditions as the n ⁺ -type region 603.
Was formed. This n ⁺ region 603 forms a so-called back surface field, prevents recombination of carriers in the vicinity of the electrode, and further improves ohmic properties. Then, electrodes 604 and 605 made of a stack of Ti, Pd, and Ag were formed on both surfaces by electron beam evaporation. The electrodes on the surface were masked so as not to hinder the incidence of light so much that they had a grid shape. After forming the electrodes, sintering was performed at 400 ° C. for 2 minutes. Then ZnS and Mg on the surface
F ₂ was laminated to form an antireflection layer 606.

AM1.5 of the manufactured solar cell
When the characteristics were evaluated under irradiation with (100 mW / cm ² ) light, the photoelectric conversion efficiency was 15.2% or more, and the variation in characteristics between modules was within 6%.

Example 6 This example shows an a-Si TFT whose sectional structure is shown in FIG.
Is an example of. Corning # 7059 glass substrate 701
Then, Cr was vapor-deposited thereon, and a gate electrode 702 was formed by a photolithography process. Next, an amorphous silicon nitride (a-SiN) film 703 having a thickness of 3000 Å was deposited using SiH ₄ and ammonia (NH ₃ ) as source gases by a commercially available capacitively coupled high frequency glow discharge device. An i-type a-Si layer 704 having a thickness of 2000 Å was deposited on this using the same apparatus. A 3000 Å-thick a-SiN layer was again deposited on this by the same apparatus, and the channel portion 70 was formed.
Etching was carried out in the photolithography process, leaving the number 5 left. After that, the sample was set in the semiconductor surface treatment apparatus of the present invention shown in FIG. 1, granular phosphorus having a purity of 99% was used as an evaporation source, and fluorine gas was 30 sccm, pressure was 2 mTorr, substrate temperature was 80 ° C., discharge power was 800 W as doping conditions. As a result, the discharge was continued for 200 seconds to form an n ⁺ type region 706.
Here, since the a-SiN 705 of the channel portion is an insulator, a low resistance region cannot be formed on the surface by doping. Then, Al was vapor-deposited to a thickness of 2000 Å on this, and the channel portion was etched by a photolithography process to form a TFT as a source portion 707 and a drain portion 708. The channel length here is 10 μm.

Conductors were fixed to the gate, source and drain of the TFT thus manufactured, and transistor characteristics were evaluated over a 20 cm square area. ON / OFF of gate voltage 15V and 0V when drain voltage is 15V
The ratio was 3 × 10 ⁵ times ± 10%, which was excellent. In the method of the present invention, the channel portion is protected by a-SiN and is not subjected to a treatment such as etching, so that it is considered that the ON / OFF ratio is large and the uniformity is excellent. Therefore, the TFT according to the method of the present invention is suitable for use in an active matrix circuit of a large liquid crystal display.

[0078]

As described above, since the method and apparatus according to the present invention apply vacuum deposition, p-type or n-type semiconductors having excellent characteristics can be spread over a large area in the manufacture of semiconductor devices. It can be manufactured with good uniformity and in a short processing time. In particular, it enables low-cost manufacturing of large-area semiconductor devices such as high-performance solar cells and liquid crystal displays.

Further, since it is easy to increase the area, it can be applied to a roll-to-roll apparatus having high mass productivity, and it is possible to greatly increase the throughput and reduce the cost.

[Brief description of drawings]

FIG. 1 shows a semiconductor surface treatment apparatus of the present invention using the method of the present invention.

FIG. 2 shows an example of incorporating the device of the present invention into a roll-to-roll device.

FIG. 3 is a schematic cross-sectional view of a pin type a-Si photovoltaic element manufactured by using the present invention.

FIG. 4 is a schematic cross-sectional view of an a-Si / a-Si tandem photovoltaic element manufactured by using the present invention.

FIG. 5: a-SiC / a-Si produced by using the present invention
3 is a schematic cross-sectional view of a / a-SiGe triple photovoltaic element.

FIG. 6 is a schematic sectional view of a polycrystalline silicon photovoltaic element manufactured by using the present invention.

FIG. 7 is a schematic sectional view of an a-Si TFT manufactured by using the present invention.

[Explanation of symbols]

101 Semiconductor surface treatment equipment 102 processing chamber 103 high frequency power supply 104 Insulator 105 cathode 106 substrate to be processed 107 gas inlet pipe 108 valves 109 anode 110 crucible 111 filament 112 exhaust port 113 Power source for evaporation source heating 114 shield

Continuation of the front page (51) Int.Cl. ⁵ Identification number Office reference number FI technical display location H01L 29/784 31/04 7376-4M H01L 31/04 B 7376-4MA

Claims (2)

[Claims] 1. A semiconductor surface treatment chamber under reduced pressure, wherein an evaporation source containing a dopant element is evaporated into particles by thermal energy, and the particles are exposed to hydrogen or halogen gas plasma. By ionizing hydrogen to form a coexisting state of the dopant ion species and the hydrogen or halogen gas ion species, the semiconductor surface is etched by the hydrogen or halogen gas ion species to prevent film deposition by the dopant ion species and to reduce the surface energy. A method for treating a semiconductor surface, characterized by increasing the surface implantation and diffusion by a dopant ion species to perform impurity doping. 2. A semiconductor surface treatment chamber, a substrate to be treated having a semiconductor surface provided in the treatment chamber, an exhaust means for keeping the treatment chamber under a reduced pressure, and a dopant element installed in the treatment chamber. Evaporation source, evaporation source heating means for heating and evaporating the evaporation source, gas introduction means for introducing hydrogen or halogen gas into the processing chamber, particles forming hydrogen or halogen gas plasma and evaporating particles from the evaporation source A plasma inducing means for ionizing to form dopant ion species and hydrogen or halogen gas ion species, and vaporizing an evaporation source containing a dopant element by thermal energy in the semiconductor surface treatment chamber under reduced pressure. To form particles, and exposing the particles to hydrogen or halogen gas plasma to partially or completely ionize the particles. A coexisting state of a dopant ion species and hydrogen or a halogen gas ion species is formed, and the semiconductor surface is etched by the hydrogen or halogen gas ion species to prevent film deposition by the dopant ion species,
A semiconductor surface treatment apparatus characterized by increasing the surface energy to promote surface implantation and diffusion by a dopant ion species to treat the semiconductor surface.