JPH0541419A - Estimation method of test equipment - Google Patents

Abstract

PURPOSE:To obtain the estimation method of a test equipment which method can define whether disconnection or imperfect wiring exists in a measuring route. CONSTITUTION:Tips of the whole probes 3 are connected with a conductive region 11 where the whole probes 3 can be shorted on the same surface, and shorted. Thereby a return route of current which returns from a tester 1 to the tester 1 through one probe out of a plurality of the probes 3 is formed. By operating the tester 1, one of the probes 3 is grounded via a wiring 2 connecting the tester 1 with the probe 3, and currents are applied to all of the other probes 3 from a current source in the tester 1. By measuring voltages generated in all current sources in the tester 1 which apply the currents, the route where disconnection or imperfect wiring exists can be defined.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of evaluating an inspection device for inspecting a semiconductor circuit device.

[0002]

2. Description of the Related Art In recent years, semiconductor integrated circuit devices have remarkably increased the number of pins, and probe densification has been increased in probe inspection, and there is disconnection or wiring failure at any part from the tester to the probe tip. Is becoming more common.

A conventional probe inspection method for a semiconductor integrated circuit device will be described below. FIG. 2 is an explanatory view of a conventional probe inspection method, where 1 is a tester and 2 is a tester 1.
Wiring 4 for connecting the probe 3 to the probe 3 is a pad 5 made of metal on the semiconductor integrated circuit device for connecting the wire 5
Is a slice in which a plurality of semiconductor integrated circuit devices have been formed after normal diffusion.

The operation of the probe inspection method for the semiconductor integrated circuit device configured as described above will be described below.

The pads 4 on the semiconductor integrated circuit device for connecting to the wires are input terminals, output terminals, control terminals, etc. of the semiconductor integrated circuit device, and one probe 3 is brought into contact with each pad 4. By
Input conditions and control conditions necessary for measuring the characteristics of the semiconductor integrated circuit device are given to the wiring 2 connecting the tester 1 and the probe 3 by the tester 1, and the pad 4 to which the above condition is given via the probe 3. . The state of the pad 4 under which the output of the semiconductor integrated circuit device should be generated under the given input condition and control condition is measured by the tester 1 via the probe 3 and the wiring 2.

[0006]

However, in the above-described conventional configuration, when the result indicating the characteristic failure of the semiconductor integrated circuit device occurs, whether the characteristic failure of the semiconductor integrated circuit device is actually caused, the measurement system failure, For example, it is difficult to determine whether the cause is a disconnection or a wiring failure, and the inspection efficiency of the probe inspection is reduced.

The present invention solves the above-mentioned conventional problems, and an object thereof is to provide an evaluation method of an inspection device capable of determining whether or not there is a disconnection or a wiring defect in the path from the tester to the probe. And

[0008]

In order to achieve this object, an inspection method for an inspection apparatus according to the present invention comprises a tester for inspecting a semiconductor circuit device, a plurality of probes connected to the tester, and all of the probes. Has a substrate to which a good conductor region capable of being short-circuited on the same surface is attached, and each probe is brought into contact with the good conductor region to return from the tester to the tester via one probe out of a plurality of probes. It has a configuration of forming a round-trip path of current.

[0009]

With this configuration, if no current flows to a certain probe to which a current source is applied by the current source in the tester, the tip of the probe is short-circuited by the good conductor region attached on the slice, so the tester There will be disconnection or wiring failure in the path leading to the probe tip. If there is disconnection or wiring failure in the path from the tester to the tip, the current that the current source tried to apply cannot flow in this path, and the current source generates a voltage up to the control value. Further, when there is no disconnection or wiring failure in the path from the tester to the tip, no voltage is generated in the current source. Therefore,
The conduction state from the test head to the tip of the probe can be confirmed by measuring the voltage of the current source with the current applied to the probe. It is possible to improve the inspection efficiency of the probe inspection of the slice.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows an evaluation method for an inspection apparatus according to an embodiment of the present invention. In FIG. 1, the same parts as those in the conventional example of FIG. That is, the feature of the present invention is that the good conductor region 11 in which all the probes 3 can be short-circuited on the same plane and the substrate 1 to which the good conductor region 11 is attached
In 2.

In FIG. 1, the tips of all the probes 3 are short-circuited by bringing the tips of all the probes 3 into contact with a good conductor region 11 in which all the probes 3 can be short-circuited on the same plane, and then the tester 1 is operated. , One of the probes 3 is set to the ground potential, and the current is applied to all the other probes 3 by using the current source in the tester 1. Next, the voltage generated in all the current sources in the tester 1 to which the current is applied is measured.
If no current flows to the specific probe 3 to which the current source in the tester 1 tries to apply the current, the tips of the probes 3 are short-circuited by the good conductor region 11 which can short-circuit all the probes on the same plane. Since a disconnection or a wiring defect exists in the path from the tester 1 to the tip of the probe 3, it is possible to determine the specific path in which the disconnection or the wiring defect exists.

As described above, according to the present embodiment, the tester 1 can be prepared only by preparing the substrate 12 to which the good conductor region 11 capable of short-circuiting the tips of all the probes is attached under the condition that the normal probe inspection is performed. It is possible to confirm the conduction state up to the tips of all the probes 3, and compared to the conventional example,
It is possible to improve the inspection efficiency of the probe inspection of the slice in which a plurality of integrated circuit devices are formed after the normal diffusion is completed.

[0014]

As described above, the present invention provides a tester for inspecting a semiconductor circuit device, a plurality of probes connected to the tester, and a substrate to which a good conductor region where all the probes can be short-circuited on the same surface is attached. By making contact with each probe and the above-mentioned good conductor region, a reciprocating path of the current returning from the tester to the tester via one probe out of a plurality of probes is formed, and the conduction state is confirmed to measure. Since the configuration is such that it is possible to judge whether the path is good or bad, it is possible to provide an evaluation method for an inspection apparatus that can clearly distinguish between a defective measurement path and a characteristic failure of the semiconductor integrated circuit device.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an evaluation method of an inspection device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram showing a probe inspection method by a conventional inspection device.

[Explanation of symbols]

 1 Tester 2 Wiring connecting the tester and the probe 3 Probe 11 All conductors are the same and a good conductor area that can be shorted 12 A substrate with a good conductor area attached

Claims (1)

[Claims] 1. A tester for inspecting a semiconductor circuit device,
A plurality of probes connected to the tester, and a substrate having a good conductor region where all probes can be short-circuited on the same surface are attached, and by contacting each probe and the whole good conductor region, the plurality of probes from the tester An evaluation method of an inspection apparatus, characterized in that a good return path of a measurement path is determined by forming a reciprocating path of a current returning to a tester through one of the probes of the .