JPH0541707A - Trouble recovery system for home constitution of atm - Google Patents

Abstract

(57) [Summary] [Object] The present invention has a plurality of terminal adapters connected to an ATM terminating device connected to an ATM network by an active bus using two DQDBs, and each terminal adapter is internally connected to each bus. Regarding the in-home configuration with corresponding reception / transmission and processing units, even if a failure occurs in which information is not accurately transmitted in any one of a plurality of terminals connected to an upstream and downstream active bus, It is an object of the present invention to provide a fault relief method in an ATM in-home configuration that enables communication except. [Structure] A loopback path is provided to connect between a receiving unit and a transmitting unit of each of the active and downstream active buses of a terminal adapter. When a failure occurs in a processing unit corresponding to one of the active buses, a failure detection notification is received, and a loopback path on the side where the failure occurs is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention According to the present invention, a plurality of terminal adapters are connected to a network terminating device connected to an ATM network by two active buses for upstream and downstream, and each terminal adapter internally receives corresponding to each bus. The present invention relates to a failure relief method in a home configuration including a transmitter.

In recent years, a broadband ISDN (B) which is a communication network for transmitting information of various media such as voice, video and video.
-ISDN: Broad band Integrated Services Digital
ATM (Asynchrono
us Transfer Mode: Asynchronous transfer mode is promising. In this ATM communication network, a fixed length (53 octets) unit called a cell is transmitted, and a plurality of media are transmitted, and data such as voice (digitized signal) and data or images are transmitted. Even high speeds are transmitted on the same network.

In ATM, a virtual line is set up without keeping the line open, and the necessary A
A TM cell is transmitted, and one transmission line is shared by a plurality of virtual lines. As an in-home configuration for connecting to such a wideband ISDN, upstream and downstream active bus configurations are considered promising for a plurality of terminal devices.

[0004]

B-ISDN has the following features. We will provide a thick pipe by laying an optical fiber assuming transmission at 150 Mbps or 600 Mbps.

The ATM technology is applied to the entire network to enable network unification. It realizes multimedia as if video was added to audio. As an in-home configuration of the ATM network as described above, a configuration in which an active bus is connected is proposed, and the bus configuration is a DQDB (Distributed Queue).
Dual Bus) is used, and bus contention control is performed between multiple terminals.

FIG. 5 is a system configuration diagram of a wideband ISDN (ATM network) including a home configuration of an active bus. In the figure, 50 is a broadband ISDN (ATM network), and 51 is an NT (Network Terminator: Network Termi) installed inside the home.
nation) and 52 are a plurality of TAs (Terminal Adapters) provided in the house. In addition, a terminal (TE: Terminal Equipment) not shown is connected to each TA.

Reference numerals 53 and 54 denote a downstream bus and an upstream bus connecting the NT51 and each TA52. As shown in FIG. 5, the signal transmission direction is TA52 (# 3) in which the downstream bus 53 is connected to the NT51. From the adjacent TA52 (# 2,
On the other hand, in the case of the upstream bus 54, the signal is sequentially transmitted from the farthest position TA52 (# 1) toward the NT51 via each TA52 (# 2, # 1). It is transmitted and is in the opposite direction to the downstream bus. Also,
Both the down bus 53 and the up bus 54 are composed of optical fibers. The ATM cell is composed of a header (5 octets) containing information such as a destination and an information field (48 octets) containing information to be transmitted, as shown in the upper right part of FIG.

A frame (empty cell) is output from the frame generator 510 of the NT 51 to the upstream bus 54 of FIG.
The ATM cell, which is supplied to the farthest TA 52 of the NT 51 and has the transmission right by the contention control, creates an ATM cell at the frame position where the data to be transmitted is captured and transmits it. Also,
A cell arriving from the network 50 via the NT 51 is transmitted to the downlink bus 53, and each TA receives from the downlink bus 53 a cell whose destination is its own TA (a cell whose destination address and its own TA address match). Take action.

The NT 51 is connected to the network 50 by an optical line, and on the downstream side, the optical signal transmitted from the network 50 is converted into electricity, and after being processed, converted into an optical signal and is then transmitted to the downstream bus 53. Send out. Further, each TA 52 is equipped with an optical / electrical converter and an electric / optical converter in a receiving / transmitting unit for interfacing with the upstream and downstream buses of the optical fiber.

[0010]

In the above conventional method, the upstream TA 52 (for example, TA #) on the downstream bus 53 is used.
When a failure occurs in 3), the TA downstream from the TA
Accurate information is not transmitted to (TA # 1, # 2), or no information is transmitted at all, resulting in communication failure. The same thing may occur on the upstream bus 54.

According to the present invention, in any one of a plurality of terminals connected to an upstream and a downstream active bus, even if a failure occurs in which information is not accurately transmitted, communication can be performed excluding the terminal in which the failure has occurred. The purpose is to provide a failure relief method in a configuration.

[0012]

FIG. 1 is a block diagram showing the principle of the present invention. In FIG. 1, 1 is a down active bus (referred to as a down bus), 2 is an up active bus (referred to as an up bus), 3 is a terminal adapter (TA), 4a, 4b.
Is a receiving unit, 5a is a downstream bus processing unit, 5b is an upstream bus processing unit, 6a and 6b are transmitting units, 7a and 7b are return paths,
Reference numeral 8 is a return setting unit. Figure 1 shows the terminal adapter (T
As A) 3, # 2 is shown in the center, # 1 and # 3 are shown as blocks as adjacent terminal adapters, and the network terminator (NT) is arranged on the right side of # 3 although not shown.

According to the present invention, when a failure occurs in the processing unit corresponding to the down bus and the up bus of each terminal adapter, when the failure is detected in the adjacent terminal adapter or the own terminal, the failure side is detected. By forming a loopback path that directly connects the receiving unit and the transmitting unit, communication to the downstream side of the bus is enabled without passing through the failure occurrence point.

[0014]

The signal of the down bus 1 is transmitted from the network terminating device (NT) #
It is sent to the down bus via the receiving unit 4a, the down bus processing unit 5a, and the sending unit 6a of the # 3 TA3 via the TA of 3. Similarly, the signal sent from the # 1 TA via the up bus 2 is input to the receiving section 4b of the # 2 TA3 and sent to the adjacent # 3 TA via the up bus processing section 5b and the transmitting section 6b. To be done.

Here, when a failure occurs in the downstream bus processing unit 5a of TA3, if the failure is detected in this terminal or in the TA (# 1) located at the next downstream of the downstream bus, A fault notification is generated and supplied to the loopback setting unit 8. The return setting unit 8 forms a return path 7a that connects the receiving unit 4a and the transmitting unit 6a inside the terminal on the side of the downstream bus 1 when the failure occurs in the downlink bus processing unit in response to the failure notification. As a result, the signal is sent from the transmission unit 6a to the adjacent downstream TA (# 1) via the return path 7a without passing through the downstream bus processing unit 5a of TA3.

Similarly, when a failure occurs in the upstream bus processing section 5b of TA3, the return setting section 8 receives a failure occurrence notification. In this case, the loopback setting unit 8 forms the loopback path 7b without passing through the upstream bus processing unit 5b and transfers the signal input to the receiving unit 4b of the upstream bus 2 to the TA (# 3) downstream of the upstream bus 2. Send a signal.

[0017]

FIG. 2 is a block diagram of the first embodiment, FIG. 3 is a block diagram of the second embodiment, and FIG. 4 is a block diagram of the third embodiment.

In the configuration of the terminal adapter (TA) # 2 in FIG. 2, 1 is a down bus (active bus), 2 is an up bus (active bus), 20 is a terminal adapter (TA),
21a and 21b are optical / electrical converters (O / E), 22a is a downstream bus processing unit, 22b is an upstream bus processing unit, and 23a and 2a.
3b is an electro-optical converter (E / O), 24 is a terminal (TE)
And an upstream bus and an upstream bus, an ATM data processing unit that serves as an interface for transferring received data and a transmission data, 25 is a loopback processing unit, 26a and 26b are downlink bus and upstream bus loopback path circuits, and 27 is Terminal (T
E). Further, in TA # 1, the upstream bus processing unit 22b is provided with a failure occurrence notification cell creation circuit 220.

FIG. 2 shows a structure in the case where a device connected to the down bus in the terminal adapter TA has a failure, and a device connected to the up bus is provided with the same structure for the failure. It is assumed that

When a failure occurs in the downlink bus processing section 22a of the terminal adapter 20 (# 2), TA20 (# 2)
From the E / O23a of the downstream TA (#
An error occurs in the cell flowing into the downstream bus processing unit 22a from the O / E 21a of 1), or the cell is not received at all. When this is detected by the downstream bus processing unit 22a, a signal indicating failure detection is sent to the upstream bus processing unit 22 of TA (# 1).
supply to b. Then, the failure occurrence notification cell creating circuit 220 of the upstream bus processing unit 22b is driven, a vacancy in the frame of the upstream bus is found, a failure occurrence notification cell is created, and the failure occurrence notification cell is sent to the upstream bus via the E / O 23b. .. This is the O / E21 of TA20 (# 2) downstream of the upstream bus.
When it is received at b, the upstream bus processing unit 22b detects that it is a failure occurrence notification cell.

Upon detecting the failure occurrence notification cell, the upstream bus processing unit 22b instructs the loopback processing unit 25 to loop back the downstream bus. In response to this instruction, the loopback processing unit 25 drives the loopback path circuit 26a of the downstream bus to form a loopback path.

When a failure occurs in the upstream bus processing unit of TA 20 (# 2), the failure is detected in TA # 1 downstream of the upstream bus, and a failure occurrence notification cell is sent to the downstream bus processing unit 22 a of TA # 1. It is generated at and is sent to the down bus.
When this is detected by the downstream bus processing unit 22a of the TA 20 (# 2), the loopback processing unit 25 is driven, and the loopback path circuit 26b on the upstream bus side is driven to form a loopback path.

Next, the configuration of the second embodiment shown in FIG. 3 will be described. In FIG. 3, reference numerals 1, 2 and 20 to 27 represent the same devices or circuits as those in the first embodiment, and the configuration newly provided in this embodiment is the fault detection unit 28.

In the second embodiment, the fault detecting unit 28 monitors whether or not a fault has occurred in the down bus processing unit 22a and the up bus processing unit 22b. For example, it is detected by causing the down bus processing unit 22a and the up bus processing unit 22b to perform self-diagnosis and checking whether an abnormality has occurred. If the failure detection unit 28 detects that a failure has occurred in the downlink bus processing unit 22a, it issues an instruction to the loopback processing unit 25 to set the loopback path on the downlink bus side in which the failure has occurred.

As a result, the loopback processing section 25 is driven to form the loopback path circuit 26a on the down bus side as in the first embodiment. When the failure of the upstream bus processing unit 22b is detected, the return path circuit 26b is formed.

Next, the configuration of the third embodiment shown in FIG. 4 will be described. In the third embodiment, the SONE proposed recently by the United States
This is an example implemented when ATM cells are multiplexed and transmitted by a frame based on T (Synchronous Optical Network). The SONET is standardized as a Synchronous Digital Hierarchy (SDH) having a structure capable of synchronous multiplexing by CCITT.

The frame structure of the SONET (SDH) interface is, as shown in the lower part of FIG. 4, the number of lines (composed of 9 lines) and the number of columns (expressed by the number of bytes, and varies depending on the interface speed) in byte units. It is represented by a matrix of, and a multiple-byte overhead is placed at the beginning and a payload in which user information is stored is placed at the rear.

When the contents of this matrix are actually transmitted, they are arranged in order from the top row, the next row, and up to the ninth row, and constitute one frame as a whole, and the cycle thereof is 125 μsec. is there. The overhead provided at the beginning of each line of this frame is provided with maintenance / operation / management information corresponding to each layer of synchronous multiplexing.
The frame of the ET interface can be adopted in a home configuration using DQDB, and ATM cells are multiplexed and transmitted in the payload part of each row. FIG. 4 shows an embodiment using such a SONET interface.

The configuration of the third embodiment shown in FIG. 4 is the same as that of the configuration of the first embodiment and is denoted by reference numerals 1, 2, 21a, 21b and 23a.
4 to 27 are provided with circuits or devices similar to those shown in FIG.
The part peculiar to this configuration is a down bus SONET processing unit, an up bus SONET processing unit and an up bus SONET processing unit 29b represented by 29a and 29b (only TA # 1 is shown in the example of FIG. 4, # 2 is not shown). In addition, an overhead fault display circuit 290 is provided.

Also in the third embodiment, the down bus 1 and the up bus 2 are connected to the NT (not shown), and the SONET frame is transferred on the down bus 1 and the up bus 2. TA2
When a failure occurs in the down bus SONET processing unit 29a of 0 (# 2), the failure is detected in the down bus SONET processing unit 29a of TA # 1 connected downstream of the down bus 1.
This fault detection notification is issued by TA # 1 upstream bus SONET.
When supplied to the processing unit 29b, the overhead failure display circuit 290 sets the bit indicating the failure display of the SONET frame. As this failure indication bit, for example, a bit of path yellow (representing a remote alarm of the path layer) or FERE (representing a remote alarm of the section layer) defined as maintenance / operation / management information in the conventional SONET is used. can do.

The SONET frame in which the failure display is set is transmitted from TA # 1 through TA20 (#
2) O / E 21b to upstream bus SONET processing unit 29
Enter in b. When the upstream bus SONET processing unit 29b detects a fault display in the received frame (in the above example, it detects pass yellow or FERE), the return processing is performed assuming that the downstream bus SONET processing unit 29a of the own TA has a fault. An instruction to form a folded path is issued to the section 25. In response to this, the folding processing section 25 drives the folding path circuit 26a to form a folding path. Even when a failure occurs in the upstream bus 2, a return path can be set on the upstream bus side with the same configuration.

[0032]

According to the present invention, even if one of a plurality of terminals connected to the upstream and downstream active buses has a failure in which information is not accurately transmitted, the terminal that has a failure is It is possible to automatically remove the processing unit of (1) and to allow terminals connected downstream from it to perform communication, and to improve the reliability of the in-home configuration and the serviceability when a failure occurs.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is a configuration diagram of a first embodiment.

FIG. 3 is a configuration diagram of a second embodiment.

FIG. 4 is a configuration diagram of a third embodiment.

FIG. 5: Broadband ISD including in-house configuration of active bus
It is a system configuration diagram of N (ATM network).

[Explanation of symbols]

 1 Downstream active bus 2 Upstream active bus 3 Terminal adapter (TA) 4a, 4b Receiver 5a Downstream bus processor 5b Upstream bus processor 6a, 6b Transmitter 7a, 7b Return path 8 Return setting section

Claims (4)

[Claims] 1. A plurality of terminal adapters are connected to an ATM terminating device connected to an ATM network by an active bus having an upstream and downstream two DQDB bus configuration, and each terminal adapter internally receives corresponding to each bus. In the in-house configuration that includes a transmitter, a transmitter, and a processor, a return path is provided to connect between the receiver and transmitter of each of the downlink and uplink active buses of the terminal adapter, and it corresponds to one active bus of the terminal adapter. A failure relief method in an in-home configuration of an ATM, comprising: a turn-back forming section that is activated upon receipt of a failure occurrence notification in response to the occurrence of a failure in the processing section and forms the turn-back path on the side where the failure occurred. 2. The terminal adapter adjacent to a downstream side of an active bus on which a failure occurs according to claim 1, when a failure occurrence is detected, sends a failure occurrence notification cell from the other active bus to cause the failure. A failure relief method in an ATM in-home configuration, wherein the terminal adapter detects the failure notification cell from the other active bus and forms a return path. 3. The terminal adapter according to claim 1, further comprising: a failure detection unit that detects a failure of a processing unit corresponding to an up bus and a down bus, and the failure detection unit generates a failure occurrence notification. A failure relief method for an ATM home configuration. 4. The terminal adapter according to claim 1, wherein ATM cells are transferred on the active bus by a SONET frame structure, and a terminal adapter adjacent to a downstream side of the active bus on which the failure has occurred detects the occurrence of the failure. Then, a fault indication is set by a specific bit in the frame of the SONET and sent out from the other active bus, and the faulty terminal adapter detects the fault indication from the other active bus, and a return path is set. A failure relief method in an ATM in-home configuration characterized by being formed.