JPH054330Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Industrial application field The invention includes a modulation circuit that modulates the oscillation frequency of a voltage controlled oscillator with a digital signal in communication equipment such as cordless telephones and transceivers.
Regarding PLL circuit. (B) Prior Art In communication equipment such as cordless telephones and transceivers, it is common practice to modulate the oscillation frequency of a crystal oscillator or a voltage-controlled oscillator in a PLL circuit with an audio signal or the like. However, recently, devices are often controlled using digital signals, and even in these devices, it has become necessary to send out digital signals for control before and after sending out audio signals. For this purpose,
The oscillation frequency of a crystal oscillator or voltage controlled oscillator may be modulated with a digital signal. However, when modulating the oscillation frequency of a crystal oscillator with a digital signal, a good modulated wave can be obtained, but when modulating the oscillation frequency of a voltage-controlled oscillator in a PLL circuit with a digital signal, the following problems occur. It was hot. Figure 1 is a block diagram of a PLL circuit that modulates with a digital signal, in which 1 is a voltage controlled oscillator comprising a varactor diode 2, 3
is a programmable divider that divides the oscillation frequency of the voltage controlled oscillator; 4 is a reference divider that divides the output of the crystal oscillator 5 to obtain a reference signal _O ; and 6 is a reference divider that divides the frequency of the divided signal _P and the reference signal _O. Phase comparator, 7 is P-type FET8 and N-type FET
9, a charge pump that causes charge to flow in or out according to the output of the phase comparator 6 ; 1 ;
0 is a low-pass filter that is composed of a resistor and a capacitor and integrates the output C of the charge pump 7 and outputs a control voltage for the voltage-controlled oscillator 1 ; 11 is a modulation circuit that modulates the input audio signal A; 12
A modulation circuit includes a switch 13 that is turned on and off according to the input digital signal P, that is, a pulse train, and modulates the digital signal. In the PLL circuit shown in Figure 1, the audio signal A
When inputting the signal shown in FIG. 2B as a digital signal P and the signal shown in FIG. 2B as a digital signal P, the signal M _O shown in FIG. It would be nice if it could be obtained, but in the PLL circuit, a phase-locked loop works to correct the frequency shift, so the modulated wave M is actually distorted as shown in FIG. 2D. In FIG. 2, A and B show voltage changes over time, and C and D show frequency changes over time. Conventionally, data modems (modulators and demodulators for data transmission) have been used to transmit and receive digital signals, but these data modems are expensive, and the price of the set itself has increased. There was a problem that I had no choice but to do. (c) Purpose of the invention The present invention is a PLL that modulates the oscillation frequency of a voltage controlled oscillator in a PLL circuit with a digital signal and can transmit digital signals economically and reliably without using a data modem. The purpose is to realize a circuit. (d) Structure of the invention The PLL circuit of the invention includes a phase comparator that compares the phases of a frequency-divided signal obtained by dividing the oscillation frequency of a voltage-controlled oscillator and a reference signal, and a phase comparator connected to the output terminal of the phase comparator. A charge pump, a low-pass filter that integrates the output of the charge pump and outputs a control voltage for the voltage-controlled oscillator, and a modulation circuit that modulates the oscillation frequency of the voltage-controlled oscillator with a digital signal, and modulates the oscillation frequency of the voltage-controlled oscillator with a digital signal. When this is done, the output of the charge pump is set to a high impedance state or an open state. (e) Embodiment FIG. 3 is a circuit diagram showing the main part of an embodiment of the present invention, in which the control signal INH is input to one end of the input terminals 6a and 6b of the phase comparator 6, and the control signal INH is input to the other end. are connected to OR gates 14a and 14b which respectively input the reference signal _O and the frequency-divided signal _P. and,
As the control signal INH, the period during which the digital signal P (FIG. 4A) input to the modulation circuit 12 is generated;
As shown in FIG. 4C, a signal that becomes "H" is used. The other configurations are exactly the same as in FIG. In FIG. 3, when the control signal INH becomes "H", the outputs of the OR gates 14a and 14b both become "H", so the outputs of the HAND gate 6c and the NOR gate 6d in the phase comparator 6 are respectively "H". H”
and “L”, therefore, the charge pump 7
The inputs of the P-type FET8 and N-type FET9 that make up the
They become "H" and "L", respectively. For this reason, P type
Both FET8 and N-type FET9 are turned off, and their output C becomes a high impedance state. Therefore, while the modulation circuit 12 is performing modulation using the digital signal P, even if the oscillation frequency of the voltage controlled oscillator 1 changes due to the modulation, the charge pump 7
Since the output C is fixed in a high impedance state and the PLL does not work, the modulated wave M becomes a signal corresponding to the input digital signal P as shown in FIG. 4D. Note that even if the output C of the charge pump 7 is in a high impedance state, the control voltage continues to be applied to the voltage controlled oscillator 1 by the low pass filter 10 , and the low pass filter 1
Since the outflow and inflow of zero charges is only leakage current, the center frequency of the voltage controlled oscillator 1 is hardly affected even if the PLL is in an inactive state. In particular, since the sending time of the digital signal P is generally short, there is no practical problem at all. By the way, for details of the operation of the phase comparator 6 shown in FIG. 3, please refer to Japanese Patent Laid-Open No. 11763/1983. Further, signal A in FIG. 4(b) represents the same audio signal as in FIG. 2(b). Next, FIG. 5 shows a circuit diagram of a main part of another embodiment of the present invention. In FIG. 5, a transmission gate 15 is provided at the output end of the charge pump 7 , and is turned on and off in response to a control signal INH shown in FIG. 4C. This transmission gate 15 is on when the control signal INH is "L" and is "H".
Since it is turned off when , the output C of the charge pump 7 is in an open state while the modulation circuit 12 is modulating the digital signal P. That is, the transmission between the charge pump 7 and the low-pass filter 10 is cut off, and as in the embodiment shown in FIG.
stops working. Therefore, in this embodiment as well, a modulated wave M as shown in FIG. 4D is obtained. By the way, although FIG. 1 shows a schematic circuit configuration of the modulation circuit 12 consisting of a switch 13 and a capacitor 16, in reality, a transistor 17 is used as shown in FIG. 6, or a transistor 17 is used as shown in FIG. It is sufficient to use a varactor diode 18 in this case. In FIG. 4, A, B, and C indicate voltage changes with respect to time, and D indicates frequency changes with respect to time. (f) Effects of the invention In this invention, when performing modulation with a digital signal, the output of the charge pump is set to a high impedance state or an open state, so the PLL circuit is not activated during modulation. Rakazu,
Therefore, a distortion-free and accurate modulated wave corresponding to the digital signal can be obtained. Furthermore, it is economical because it does not require the use of a data modem.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a conventional PLL circuit including a modulation circuit, Fig. 2 is a waveform diagram showing waveforms of each part in Fig. 1, Fig. 3 is a main part circuit diagram showing an embodiment of the present invention, 4 is a waveform diagram showing the waveforms of each part in FIG. 3, FIG. 5 is a main circuit diagram showing another embodiment of the present invention, and FIGS. 6 and 7 are circuits showing specific circuit examples of the modulation circuit. It is a diagram. Explanation of main figure numbers, 1 ... Voltage controlled oscillator, 3...
...Programmable divider, 4...Reference divider, 5...Crystal oscillator, 6...Phase comparator, 7 ...Charge pump, 10 ...Low pass filter, 11 , 12 ...Modulation circuit, 14a, 1
4b...NOR gate, 15...transmission gate.

Claims (1)

[Scope of utility model registration request] a phase comparator that compares the phases of a frequency-divided signal obtained by dividing the oscillation frequency of the voltage-controlled oscillator with a reference signal; a charge pump connected to the output terminal of the phase comparator; and a charge pump that integrates the output of the charge pump to control the voltage. A gate circuit that includes a low-pass filter that outputs a control voltage of an oscillator, and a modulation circuit that modulates the oscillation frequency of the voltage-controlled oscillator using a digital signal, and that is controlled by a prohibition signal that is output during a period in which modulation is performed using the digital signal. is provided in a signal path from the input of the phase comparator to the output of the charge pump, and the output of the charge pump is placed in a high impedance state.
PLL circuit.