JPH0548143A - Manufacture of semiconductor light receiving element - Google Patents

Abstract

(57) [Summary] (Modified) [Objective] To improve a method for manufacturing a semiconductor photodetector, particularly a method for forming a guard ring of an avalanche photodiode (APD), to form a good guard ring even with an ultra-high speed APD. Provided is a method for manufacturing a semiconductor light receiving element capable of achieving the above. [Structure] A light absorption layer 103, an electric field drop layer 105, and a window layer 109 are arranged on a substrate 101, and when a structure in which a guard ring surrounds a light receiving portion in the window layer is manufactured, A semiconductor layer for one-conductivity-type low-concentration light absorption layer 103 having a narrow band gap is formed, and a hetero-relaxation layer 1 having a wider band gap and a one-conductivity-type lower concentration is formed thereon.
No. 04 semiconductor layer is formed, and a semiconductor layer for the electric field drop layer 105 having a wider band gap and a higher concentration of one conductivity type than that is formed thereon to correspond to the guard ring of the semiconductor layer for the electric field drop layer 105. After the impurity of the opposite conductivity type is introduced into the position, the semiconductor layer for the one conductivity type window layer 109 having the same bandgap and the low concentration is formed on the semiconductor layer for the field drop layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor light receiving element, and more particularly to an avalanche photodiode (A
PD) for improving the guard ring forming method. APDs are being used more and more as a light receiving element for optical communication using an optical fiber, but APDs capable of high-speed operation are required with the advancement of communication technology such as higher transmission speed.

In general, APDs used for optical communication use a planar structure by selective diffusion. However, in the case of the planar structure, an "edge breakdown" occurs in which the breakdown occurs at the peripheral portion of the diffusion region before at the central portion of the diffusion region. The edge breakdown is more likely to occur as the radius of curvature around the diffusion region is smaller and the impurity concentration gradient is larger. When an edge breakdown occurs,
Even if the voltage is increased, only the current flows, and the reverse voltage of the light receiving portion pn junction in the central portion of the diffusion region hardly increases, so that the function as the APD cannot be exhibited. Therefore, in order to make the breakdown voltage around the diffusion region higher than the breakdown voltage at the flat portion (light receiving portion) at the center of the diffusion region, a guard ring is provided around the diffusion region. The difference in the breakdown voltage between the peripheral portion and the central portion of the diffusion region directly affects the reliability of the element, so that a manufacturing method capable of forming a good guard ring is required.

[0003]

2. Description of the Related Art Referring to FIG.
A method of manufacturing P / InGaAs-APD will be described. FIG. 3A shows a state in which various semiconductor layers for forming an APD are stacked and formed on a substrate.
0) on the n ⁺ InP substrate 301, the n ⁺ InP buffer layer 302, the n ^- InGaAs light absorption layer 303, and the n ^- In
A GaAsP hetero relaxation layer 304, an n ⁺ InP electric field drop layer 305, an n ⁻ InP window layer 306, and an InGaAs cap layer 307 are epitaxially grown in this order. Usually, as a growth method, a vapor phase growth method such as MOVPE is used to enhance the control of the thickness and concentration of each layer and to reduce the film thickness.

A photoresist 30 is formed on the above laminated structure.
8 is applied, and the required pattern is left (FIG. 8B). A p-type impurity such as Be is implanted by ion implantation using the resist pattern 308 as a mask (region 309) (FIG. 7C). The resist 308 is removed, and heat treatment is performed at a temperature of 700 ° C. or more to diffuse into the n ⁺ InP field drop layer 305 to form a p ⁻ guard ring 310 (FIG. 3D).

The InGaAs cap layer 308 is removed by selective etching, and the SiN film 311 is used as a mask for n.
^- forming a select diffusing p-type impurities of Cd or the like to the InP window layer 306 p ⁺ region 312. Pn generated by this diffusion
The n ⁻ InP layer 306 between the junction 313 and the n ⁺ InP electric field drop layer 305 becomes the carrier multiplication layer 314. Furthermore, the SiN film 315 which is a non-reflective film and the annular electrode (Au
/ Zn) 316 is formed and an electrode (AuG
e) 317 is formed and the APD is completed ((e) in the figure).

In the case of this structure, the n ⁺ InP field drop layer 3
The breakdown voltage of the guard ring 310 is determined by how much the concentration of 05 can be reduced by Be, which is a p-type impurity. Another conventional APD manufacturing method will be described with reference to FIG. FIG. 3A shows a state in which various semiconductor layers for forming APD are stacked and formed on a substrate, and a plane orientation (100) of n ⁺ InP is shown.
On the substrate 401, n ⁺ InP buffer layer 402, n ⁻ I
nGaAs light absorption layer 403, n ⁻ InGaAsP hetero relaxation layer 404, n ⁺ InP field drop layer 405, InGa
The As cap layer 406 is epitaxially grown in this order.

A photoresist 40 is formed on the laminated structure.
7 is applied and the necessary pattern is left, and the InGaAs cap layer 4 is formed using this resist pattern 407 as a mask.
06 is selectively etched. ((B) of the same figure). The resist 407 is removed, and the InGaAs cap layer 40 thereunder is removed.
The n ⁺ InP electric field drop layer 405 is mesa-etched by using 6 as a mask, and the InGaAs cap layer 406 is removed by selective etching (FIG. 7C).

From this, an n ^-- InP window layer 408 is grown so as to fill the mesa 405 of the n ⁺ InP electric field drop layer, and an InGaAs cap layer 409 is formed thereon (FIG. 2D). Thereafter, as in the case of FIG. 3, Cd is diffused using the SiN film 410 as a mask (region 411), and S
The iN non-reflective film 412, the electrodes (Au / Zn) 413 and (AuGe) 414 are formed to complete the embedded APD ((e) in the figure).

In the case of this embedded APD, Cd
Since the high-concentration layer below the peripheral portion of the diffusion region 411 is eliminated, the breakdown voltage in the peripheral portion becomes high, and the same effect as in the case of FIG. 3 in which the guard ring 310 is formed can be obtained.

[0010]

In order to operate the APD at high speed, the carrier multiplication layer should have as high an electric field as possible.
Further, it is necessary to apply a low electric field to the light absorption layer. For that purpose, it is necessary to increase the concentration of the n ⁺ InP layer and maximize the amount of electric field drop in this layer. When the concentration and thickness of each layer are optimized, for example, GB product 1
When trying to obtain 00 GHz, n ⁺ InP having a thickness of several hundred Å
Therefore, an electric field drop amount of 6 × 10 ⁵ V / cm or more is required (see FIG. 5).

In FIG. 5, n⁺-Field drop amount in the InP layer
GB product in the case of parameter and breakdown of light receiving part
Voltage (V_B) And the breakdown voltage of the guard ring section.
Pressure (V_BG) And show the results obtained by calculation. For example,
5 × 10 electric field drop^FiveWhen V / cm is set,
The breakdown is 33V (A in the figure). At this time,
The amount of electric field drop in the drain part is 7.5 × 10^FourV / cm low
Comb 4.25 × 10 ^FiveV / cm, Gardrin
The breakdown voltage of the active area is 10V higher than the light receiving area.
V (A 'in the figure), and a sufficient guard ring effect is obtained.
Be done. Similarly, the amount of electric field drop in the light receiving part and the guard ring part
6 × 10 each^FiveV / cm, 5.25 × 10^FiveV / c
m, the breakdown voltage is 26V (Fig.
Medium B), 28V (B 'in the figure), and the potential difference is as small as 2V.
And the amount of electric field drop in the light receiving part is 6.2 × 10^FiveV
/ Cm, the break down of the light receiving part and the guard ring part
There is no potential difference between the voltage and the guard ring effect.
I understand that it does not.

As described above, when the n ⁺ -InP layer has a high concentration, it becomes difficult to form the guard ring. That is, in the case of FIG. 3, the structure is such that the concentration of the n ⁺ layer is reduced by Be of the p-type impurity to obtain the guard ring effect, and Be is pushed into the inside by diffusion by annealing after implantation.
The Be concentration near the n ⁺ layer becomes low. Therefore n
^{If the +} layer concentration is increased, Be cannot be expected to reduce the n ⁺ layer concentration, and a good guard ring cannot be obtained. When the implantation amount is increased and the Be concentration is increased in order to greatly reduce the n ⁺ layer concentration, the guard ring portion in the n ⁻ InP layer becomes p ^{+ and} the role of the guard ring is not fulfilled. At present, the electric field drop amount of 6.2 × 10 ⁵ V / cm is the limit for obtaining the guard ring effect.

In the case of the example of FIG. 4, a mesa-embedded APD by double growth is used, but this structure has an LPE (Liquid Pha)
se epitaxy: liquid phase epitaxial growth method), but MOVPE has not succeeded. Since the mesa shape is circular, various plane orientations are exposed and abnormal growth occurs at the growth interface. Therefore, when a reverse voltage is applied to the device, the dark current sharply increases when the depletion layer reaches the growth interface (see FIG. 6).

FIG. 6 is a graph showing an example of the dark current-voltage characteristics of the device. In the figure, (a) shows the growth on the mesa shape twice, and (b) shows the growth on the plane twice. In the second growth on the mesa shape (a), the dark current increased sharply from around 30 V when the depletion layer reached the growth interface, whereas the second growth on the plane occurred (b). , No increase in dark current at the interface was observed. From this, it is understood that the growth on the mesa shape is not suitable for reducing the dark current of the device.

As described above, when trying to manufacture an ultra-high speed APD, there is a problem that it is very difficult to form a guard ring. It is an object of the present invention to provide a method for manufacturing a semiconductor light receiving element capable of forming a good guard ring even with an ultra high speed APD.

[0016]

In order to achieve the above object, in the method for manufacturing a semiconductor light receiving element of the present invention, a light absorption layer, an electric field drop layer, and a window layer are arranged on a substrate in this order from the bottom. In a method of manufacturing a semiconductor light receiving element having a structure in which a guard ring surrounds a light receiving portion formed in the window layer, a light absorption layer of one conductivity type low concentration having a narrow band gap is formed on a semiconductor substrate. Forming a semiconductor layer for a hetero-relaxation layer, a step of forming a semiconductor layer for a hetero-relaxation layer having a wider band gap and a lower concentration of one conductivity type on the semiconductor layer for a light-absorption layer, and a semiconductor layer for the hetero-relaxation layer A step of forming a semiconductor layer for a field-concentration layer having a wider band gap and a higher concentration of one conductivity type, and an impurity of an opposite conductivity type at a position in the semiconductor layer for a field-conduction layer corresponding to the guard ring. Engineering to introduce And, after the introduction of the impurity of the opposite conductivity type, a step of forming, on the semiconductor layer for the field drop layer, a semiconductor layer for window layer of one conductivity type having the same bandgap and low concentration. Characterize.

[0017]

According to the method of manufacturing the semiconductor light receiving element of the present invention,
Since impurities can be directly injected into the electric field drop layer, the concentration of the electric field drop layer can be greatly reduced by increasing the impurity concentration of this portion, and the same guard ring effect as that of the conventional buried APD can be obtained.

Further, since the second growth can be performed on the flat wafer, it is possible to prevent the dark current at the growth interface from increasing. Hereinafter, the present invention will be described in more detail with reference to Examples.

[0019]

[Embodiment 1] An example of steps of a method for manufacturing a semiconductor light receiving element according to the present invention will be described with reference to FIG.
FIG. 1A shows a state in which various semiconductor layers for forming an APD are stacked and formed on a substrate. An n ⁺ InP buffer layer is formed on an n ⁺ InP substrate 101 having a plane orientation (100). 102, n ^-- InGaAs light absorption layer 103, n
^An InGaAsP hetero relaxation layer 104, an n ⁺ InP electric field drop layer 105, and an InGaAs cap layer 106 are epitaxially grown in this order. Usually, as a growth method, a vapor phase growth method such as MOVPE is used to enhance the control of the thickness and concentration of each layer and to reduce the film thickness.

A photoresist 10 is formed on the laminated structure.
7 is applied, and the required pattern is left (FIG. 7B). Using the resist pattern 107 as a mask, p-type impurities such as Be are implanted by ion implantation (region 108) (FIG. 7C). The resist 107 is removed, and heat treatment is performed at a temperature of 700 ° C. or higher. In this case, Be is not excessively diffused,
The Be concentration peak after diffusion is the n ⁺ InP electric field drop layer 105.
It is preferable to put it inside. ((D) of the same figure).

The InGaAs cap layer 106 is removed by selective etching, and the n ^-- InP window layer 109 and the InGaAs cap layer 110 are grown by MOVPE (FIG. 8E). The InGaAs cap layer 110 is removed by selective etching, and p-type impurities such as Cd are selectively diffused in the n ⁻ InP window layer 109 using the SiN film 111 as a mask to form ap ⁺ region 112. Further, a SiN film 113 which is a non-reflective film and an annular electrode (Au / Zn) 114 are formed, and an electrode (AuGe) 115 is also formed on the back surface of the substrate to complete the APD (FIG. 6 (f)). [Example 2] The same steps as in Example 1 up to step (e) are performed.

A pattern is formed on this structure with a photoresist 201, p-type impurity ions such as Be are implanted again using this resist pattern 201 as a mask (region 202), and then the resist 201 is removed and heat treatment is performed. Then, the guard ring 202 is formed ((f) in the figure).
Following the same procedure as in Example 1, the InGaAs cap layer 110 is removed, and Cd is selectively diffused in the n ⁻ InP layer 103 using the SiN film 203 as a mask to form the p ⁺ region 20.
4 is formed. Further, a SiN film 205 which is a non-reflective film, an annular electrode (Au / Zn) 206 are formed, and an electrode (AuGe) 207 is also formed on the back surface of the substrate to complete the APD (FIG. 9 (g)).

In this embodiment, the concentration gradient in the peripheral portion of the diffusion region 204 can be reduced, so that the guard ring effect can be further enhanced.

[0024]

As described above, according to the present invention,
Even a guard ring of an APD for ultrahigh-speed optical communication can be easily formed, and the performance of the APD can be significantly improved.

[Brief description of drawings]

FIG. 1 is a sectional view showing an example of a procedure for manufacturing an APD according to the present invention.

FIG. 2 is a sectional view showing another example of a procedure for manufacturing an APD according to the present invention.

FIG. 3 is a cross-sectional view showing one typical example of a conventional APD manufacturing process.

FIG. 4 is a cross-sectional view showing another typical example of the conventional APD manufacturing process.

FIG. 5 is a graph showing the GB product and the breakdown voltage of the light receiving portion and the guard ring portion as a function of the amount of electric field drop, respectively.

FIG. 6 is a graph showing the relationship between dark current and reverse bias voltage.

[Explanation of symbols]

101 ... Planar orientation (100) n ⁺ InP substrate 102 ... n ⁺ InP buffer layer 103 ... n ^- InGaAs light absorption layer 104 ... n ^- InGaAsP hetero relaxation layer 105 ... n ⁺ InP electric field drop layer 106 ... InGaAs cap layer 107 ... Photoresist (resist pattern) 108 ... A region in which p-type impurities such as Be are implanted by ion implantation 109 ... n ^-- InP window layer 110 ... InGaAs cap layer 111 ... SiN film 112 ... Cd and other p-type impurities are selectively diffused Formed p
⁺ Region 113 ... SiN non-reflective film 114 ... Annular electrode (Au / Zn) 115 ... Substrate back surface electrode (AuGe) 201 ... Photoresist (resist pattern) 202 ... Region in which p-type impurity ion implantation such as Be was performed again ( Guard ring) 203 ... SiN film (mask) 204 ... p formed by selectively diffusing p-type impurities such as Cd
⁺ Region 205 ... SiN non-reflective film 206 ... Annular electrode (Au / Zn) 207 ... Substrate back electrode (AuGe) 301 ... n ⁺ InP substrate 302 ... N ⁺ InP buffer layer 303 ... n ^-- InGaAs light with plane orientation (100) Absorption layer 304 ... n ^-- InGaAsP hetero relaxation layer 305 ... n ⁺ InP field drop layer 306 ... n ^-- InP window layer 307 ... InGaAs cap layer 308 ... Photoresist (resist pattern) 309 ... P-type impurities such as Be by ion implantation Implanted region 310 ... Guard ring 311 ... SiN film (mask) 312 ... P formed by selectively diffusing p-type impurities such as Cd
⁺ Region 313 ... Pn junction part 314 ... Carrier multiplication layer 315 ... SiN non-reflective film 316 ... Annular electrode (Au / Zn) 317 ... Substrate back surface electrode (AuGe) 401 ... n ⁺ InP substrate 402 with plane orientation (100). n ⁺ InP buffer layer 403 ... n ^- InGaAs light absorption layer 404 ... n ^- InGaAsP hetero relaxation layer 405 ... n ⁺ InP field drop layer 406 ... InGaAs cap layer 407 ... photoresist (resist pattern) 408 ... n ^- InP window layer 409 ... InGaAs cap layer 410 ... SiN film (mask) 411 ... Region in which p-type impurities such as Cd are diffused 412 ... SiN non-reflective film 413 ... Annular electrode (Au / Zn) 414 ... Substrate rear surface electrode (AuGe)

Claims (2)

[Claims] 1. A semiconductor having a structure in which a light absorption layer, an electric field drop layer, and a window layer are arranged in this order from the bottom on a substrate, and a guard ring surrounds a light receiving portion formed in the window layer. A method of manufacturing a light-receiving element, the method comprising the steps of: forming a semiconductor layer for a one-conduction-type low-concentration light-absorbing layer with a narrow bandgap on a semiconductor substrate; And a step of forming a one-conductivity-type low-concentration hetero relaxation layer semiconductor layer, wherein a one-conductivity-type high-concentration semiconductor layer for a field relaxation layer having a wider band gap than the hetero-relaxation layer semiconductor layer is formed on the hetero-relaxation layer semiconductor layer. The step of introducing an impurity of opposite conductivity type into the position corresponding to the guard ring in the semiconductor layer for field drop layer, and after introducing the impurity of opposite conductivity type, on the semiconductor layer for field drop layer, Same as this The method of manufacturing a semiconductor light receiving device characterized by comprising the step of forming a and one conductivity type window layer semiconductor layer of a low concentration-gap. 2. The method for manufacturing a semiconductor light receiving element according to claim 1, further comprising the step of introducing the impurity of the opposite conductivity type into a position of the window layer semiconductor layer corresponding to the guard ring. Method.