JPH055211B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field] The present invention connects a plurality of terminal devices each having a unique address to a central supervisory control device via a signal line, and transmits transmission signals sent from the central supervisory control device. A specific terminal is identified using the address signal, and each terminal is called individually in sequence, and the output operation of this called terminal is controlled by the control signal following the address signal. The present invention relates to a time-division multiplex remote control device that sends a monitoring input as a return signal to a central monitoring and control device.

[Background technology]

FIG. 1 shows a schematic configuration example of a general time-division multiplexing remote control device of this kind, in which a plurality of terminal devices 3 are connected to one circuit of signal lines 2 derived from one central monitoring and control device 1. However, these terminal devices 3 are used to control loads 4 that are dependent on the terminal devices 3. The central supervisory control device 1 is in charge of controlling the entire system, and as shown in the upper part of FIG. It is for transmitting and receiving control signals from the central supervisory controller 1 to the terminal device 3 and return signals from the terminal device 3 to the central supervisory controller 1 with the supervisory controller 1 . Here, the lower part of FIG. 2 shows the signal configuration per terminal. First, the central supervisory control unit 1 sends an address signal to call any terminal 3, and then sends a control signal to the called terminal. When the sending of the control signal from the central supervisory controller 1 is finished, the central supervisory controller 1 temporarily switches to the receiving state, and receives the supervisory input from the called terminal 3. is sent back as a return signal, which is received by the central monitoring and control device 1. The device shown in FIG. 1 repeats the above-mentioned operation every time each terminal is accessed. In addition, during the return standby period during which the terminal device 3 returns an address signal, a control signal, and a return signal (described later) to the central monitoring and control device 1, the terminal device 3 is sent from the central monitoring and control device 1 to
The transmission signal to be sent to is configured.

FIG. 3 shows an example of the circuit configuration of a conventional terminal device 3,
A received signal input from the signal line 2 via the input/output converter 5 is input to the timing generator 6, the data detector 7, and the return request detector 8. The data of the transmission signal detected by the data detection section 7 is controlled by the timing signal output from the timing generation section 6 and sent to the address register 9 and the control register 10.
A comparison error check unit 12 checks whether the data of the address signal input to the address register 9 matches the address data of this terminal device 3 set in advance by the address setter 11. The comparison error checking unit 12 also checks whether there are any transmission errors in the data detected by the address register 9 and the control register 10. In this way, when the return request detection unit 8 detects that the return signal period (that is, the return waiting period) shown in the lower part of FIG. Then, an output signal is generated from the comparison error check section 12, and this output signal operates the output register 13 to read the contents of the control register 10, and outputs the control data output for controlling the load 4 from the output register 13. AND gate 14 which inputs the output of the return request detection section 8 and the output of the comparison error check section 12.
The AND gate 14 and the input/output converter 5 output the monitoring data created by the monitoring data generator 15 that inputs monitoring inputs such as the output of an external sensor.
The signal is sent back to the central supervisory control device 1 from the signal line 3 as a return signal.

By the way, in the above-mentioned system device, if a certain terminal device 3 is a so-called answer-back type terminal device 3 of the type that monitors the load 4 controlled by the terminal device 3, originally, from the terminal device 3, The return signal should have content consistent with the control signal sent at the time of the access. That is, in the lower diagram of FIG.
When the address signal is accessed, the contents of the control signal following this address signal and the contents of the return signal sent back from the terminal device 3 after this control signal should be the same. However, in reality, since a drive element such as a relay is used to control the load 4 (as a control load for the terminal device 3 itself), the operation of this drive element is delayed after the terminal device 3 outputs a control output. It takes a certain amount of time to stabilize, and the control state of the load 4 is changed by the control signal at the time of one access only after the period of the return signal following that control signal ends. The contents of the control signal at the time of access and the contents of the return signal do not match, and in the end, the contents controlled by the control signal at the time of access in the nth cycle can only be confirmed by the return signal at the time of access in the n+1th cycle. Nakatsuta. That is, in the access flow of each terminal device shown in FIG. At time _t1 , this terminal device 3 generates a control output for turning on. However, since this relay requires time T to stabilize its operation, this relay is actually turned on at time _t2 shown in c in the figure. Therefore, at time _t2 , this terminal device 3 becomes able to recognize the ON state of this relay, as shown by the broken line in d of the same figure.
At time _t2 , the (m+1)th terminal device 3 has already been accessed in the access flow shown in FIG. Therefore, in the second cycle, the mth
At time t ₃ when the th terminal device 3 is accessed, a relay-on return signal is sent to the central supervisory control device 1 as shown by the solid line in d in the same figure, and in particular, the number of terminal devices 3 is In such a case, there is a problem in that it takes a long time for the central monitoring and control device 1 to check the control results based on the control signals, making it impossible to perform quick monitoring operations.

In addition, in order to speed up the monitoring operation in the central monitoring and control device 1, after the m-th terminal device 3 is accessed and a control signal is sent, the m-th It is also conceivable to access the same terminal device 3 twice per cycle and send a return signal at the second access.
Although the response time of the monitoring operation is shortened, one access cycle takes too long, which poses an obstacle to accessing each terminal 3 at high speed. .

[Purpose of the invention]

The present invention provides a so-called answer-back type terminal device in which the control status of the terminal device can be quickly checked and monitored on the central monitoring and control device side, and a large number of terminal devices can be accessed at high speed. The object is to provide a division multiplex remote control device.

[Disclosure of the invention]

(Configuration) The present invention sends a control signal to the terminal device 3 when the terminal device 3 at a certain address is accessed,
A return signal is sent when the terminal device 3 is accessed one or more addresses later than the current access. That is, FIG. 5 shows a time chart of an embodiment in which the control signal and the return signal are shifted by two addresses, and the m-th address set at addresses A _n-1 to _{A n} to _{A n+3 is}
- When the 1st to mth to m+3rd terminals are accessed in sequence, when the mth terminal 3 is accessed with address A _n , the control signal C for this mth terminal 3 _n and sends a return signal R _n-2 from the m-2nd terminal device 3.
is returned to the central supervisory control device 1, and the central supervisory control device 1 receives this return signal Rn _-2 .

(Embodiment) FIG. 6 shows a block diagram of a terminal device 3 according to an embodiment of the present invention.
A counter 16, an RS latch 17, a reset signal generator 18, two AND gates 19 and 20, etc. are added. More specifically, there is a data detection section 7 as a transmission signal detection means that outputs a pulse signal every time each transmission signal is received, and a comparison error check as an address discrimination means for determining whether an address signal matches its own address. 12, an RS latch 17 as a latch means for latching the matching output of the comparison error check unit 12, and an RS latch 1.
A counter 16 serves as a counting means that counts a predetermined number using the pulse signal outputted from the data detection section 7 as a clock while the coincidence output is latched at step 7, and generates an output when the count is up.
and the AND gate 19, the return request detection section 8 as a return period detection means for detecting the start of the period for returning the return signal, and the return signal when the outputs of the counter 16 and the return request detection section 8 are both obtained. The system includes a monitoring data generating section 15 and an AND gate 14 as return signal transmitting means for transmitting a return signal, and a reset signal generating section 18 as a reset means for resetting the RS latch 17 and counter 16 after transmitting the return signal. Thus, in this embodiment circuit, signals are sent and received as shown in FIG. If the configuration is such that the signal is sent back, the comparison error check unit 12 generates an address match output as shown in b in the same figure at time _t1 when address A _n is accessed, and as a result, an address match output is generated as shown in b in the same figure.
The RS latch 17 is set at time _t1 as shown in FIG.
Its Q output becomes "H". On the other hand, data detection section 7
From then on, a start detection pulse indicating the start of access to each address as shown in FIG.
9, and the Q output of the RS latch 17 is input to the other input terminal of this AND gate 19, so after this Q output becomes "H", the start detection pulse is input to the AND gate 19. gate 1
9 and is input to the clock input terminal of the counter 16. Here, the pulse signal inputted from the data detection section 7 to the clock input terminal of the counter 16 via the AND gate 19 is not limited to the above-mentioned start detection pulse, but may be applied once for each address access or a predetermined number of times. Any signal may be used as long as it is a pulse signal that occurs twice. As for the counter 16 whose clock input is the start detection pulse as described above, since only this counter 16 has a numerical value set to "3", at time _t2 when three start detection pulses are input, As shown in , when the Q output of the counter 16 is "H" and an output is generated from the return request detection section 8, the output of the AND gate 20 becomes "H", is opened and a return signal is sent out in the same way as in the conventional example. After this counter 16
When the Q output of RS is "H _" , an output signal as shown in FIG. Latch 17
is reset. FIG. 8 shows a circuit example of the reset signal generating section 18, and the data detecting section 7
It consists of a delay circuit (or timer circuit) that inputs a pulse signal that is output once for each address access and delays it, and a one-shot multi for setting the pulse width that is triggered by the output of this delay circuit. It is composed of a delayed pulse generation circuit 21 and an AND gate 22 that inputs the output of this delayed pulse generation circuit 21 and the Q output of the counter 16, and is accessed at the timing when the Q output of the counter 16 becomes "H". After the signal transmission/reception period for the previous address ends, a reset pulse signal is output before the return signal period for the next address begins.

〔Effect of the invention〕

As described above, the present invention connects a plurality of terminal devices each having a unique address to a central supervisory control device via a signal line, and uses the address signal of a transmission signal sent from the central supervisory control device to specify a specific address. In addition to identifying the terminal device and calling each terminal device individually in sequence, the output operation of this called terminal device is controlled by the control signal following the above address signal, and the monitoring input input by this called terminal device is used as a return signal. In a time-division multiplex remote control device configured to send data back to a central supervisory control device, a transmission signal detection means outputs a pulse signal each time each transmission signal is received, and a transmission signal detection means determines whether an address signal matches its own address. an address discriminating means, a latch means for latching the coincidence output of the address discriminating means, and counting a predetermined number using a pulse signal output from the transmission signal detecting means as a clock while the latch means latches the coincidence output; a counting means that produces an output when the count is up; a return period detection means that detects the beginning of a period in which a return signal is sent back;
It is equipped with a return signal transmitting means for transmitting a return signal when both the outputs of the counting means and the return period detecting means are obtained, and a reset means for resetting the latch means and the counting means after transmitting the return signal, Since the return signal of the terminal device is sent back to the central monitoring and control device during the return waiting period after one or more addresses are accessed from the central monitoring and control device,
When a control signal is sent to a terminal device to control its load, after the drive element such as a relay for controlling the load is sufficiently stable and the control state is reliably switched, the monitoring input of that terminal device is transferred to the central monitoring control. The data can now be sent back to the device, allowing for quick monitoring operations and high-speed access to each terminal, reducing the access interval even when there are a large number of terminals. This has the effect of not making it too long.

[Brief explanation of the drawing]

Fig. 1 is a schematic block diagram of a general time division multiplexing remote control device, Fig. 2 is an example of the configuration of the same transmission signal as above, Fig. 3 is a block diagram of a conventional terminal device, and Fig. 4 is a schematic block diagram of a general time division multiplexing remote control device.
The figure is a time chart when the mth terminal device is accessed, FIG. 5 is an explanatory diagram of the operation of an embodiment of the present invention, and FIG. 6 is a block diagram of the terminal device,
FIG. 7 is a time chart of the above terminal, and FIG. 8 is a detailed block diagram of the reset signal generator 18 used in the above terminal.
2 is a signal line, 3 is a terminal device, 7 is a data detection section, 8
12 is a comparison error check unit, 15 is a monitoring data generation unit, 16 is a counter,
17 is an RS latch, 18 is a reset signal generator,
14 and 19 are AND gates.

Claims (1)

[Claims] 1 Connect multiple terminal devices with unique addresses to the central monitoring and control device via signal lines, and identify each specific terminal using the address signal of the transmission signal sent from the central monitoring and control device. While calling the terminals one after another, the output operation of the called terminal is controlled by the control signal following the address signal, and the monitoring input input by the called terminal is sent back to the central supervisory control unit as a return signal. The time-division multiplexing remote control device as described above includes a transmission signal detection means for outputting a pulse signal each time each transmission signal is received, an address determination means for determining whether the address signal matches its own address, and an address determination means. A latch means for latching the coincidence output of the means, and a count that counts a predetermined number using a pulse signal output from the transmission signal detection means as a clock while the latch means latches the coincidence output, and generates an output when the count is up. a return period detection means for detecting the beginning of a period for returning the return signal; a return signal transmission means for transmitting the return signal when both the outputs of the counting means and the return period detection means are obtained; 1. A time division multiplexing remote control device comprising a latch means for transmitting and a reset means for resetting the counting means.