JPH055214B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" This invention is applied to the recording of digital information signals such as digital video signals and digital audio signals on magnetic tape using a rotating head. Regarding transmission equipment.

"Background technology and its problems" In a digital VTR, when the recording head is coupled with a rotary transformer, DC components and low-frequency components are cut out, causing level fluctuations, making it difficult to accurately generate magnetization reversal on the tape. I can do it. Furthermore, since the output of the reproducing head is determined by temporal changes in the interlinking magnetic fluxes, the lower the frequency of the signal, the lower the output, and the DC component cannot be reproduced. Furthermore, due to the amplifier's capacitor, transformer, or rotary transformer, not only the DC component cannot be reproduced during reproduction, but also the low-frequency transmission characteristics deteriorate.

In this way, when the DC component or the low-frequency component cannot be recorded or reproduced, the reproduced digital signal may suffer from waveform distortion or fluctuations in the DC level, making errors more likely.

Therefore, the digital video signal to be recorded is encoded and converted into a digital signal with as few direct current components as possible during recording and reproduction. Such an encoding method uses DC
It is called a free encoding method.

DC-free encoding methods include channel coding and source coding.As one type of channel coding, one word of n bits is converted into a code word of m bits (m>n).
An encoding method (called a block code) has been proposed in which the DSV becomes 0.

Here, DSV (Digital Sum Variation) is 2
It represents the integrated value of the value levels 1 and 0 corresponding to +1 and -1, respectively. This DSV has a value for any point in time or period. Also, if you calculate the DSV for a continuous binary signal from the beginning,
If the DSV increases or decreases without limit, the signal has a DC component, and if the DSV is bounded, it does not have a DC component. In addition, CDS (Codeword
Digital Sum) represents the DSV value from the beginning to the end of any one word.

Other channel coding includes:
Examples include ^M2 (Modified Miller). With these channel codings, the recording bit rate relative to the source bit rate is 1.25 with an 8-10 conversion.
If the ^source bit rate is higher than that of a composite signal, such as component-encoded color video data, it is undesirable for the recording bit rate to be higher than that. .

Therefore, source coding has been proposed in which the direct current component is suppressed by utilizing the correlation of video data. In the case of video data, since it has continuity, an 8-bit word corresponding to a certain sample and a word of a sample temporally close to this are the same or similar data. Therefore, in the simplest way, the DSV can be reduced to some extent by inverting 0 and 1 for each two pieces of consecutive data.

However, in the case of natural binary code, the DSV changes between two adjacent words,
The polarity of the DSV is often reversed, and the simple reversal process described above cannot sufficiently suppress the DC component.

Therefore, we form multiple groups depending on the CDS value, and this CDS matches the natural binary words one-to-one to the codewords in the same group.
Source coding has been proposed by the applicant. According to this, the DC component can be suppressed without increasing the recording bit rate unlike channel coding.

By the way, in order to reduce the effect of burst errors due to dropouts during recording and playback,
It is desirable to perform shuffling to change the chronological order of digital video data during recording. Shuffling is performed on the recorded data,
By performing deshuffling (an operation opposite to shuffling) on reproduced data, burst errors can be dispersed and errors in continuous data can be avoided. This makes it possible to perform error correction such as interpolating error data with the average value of correct data before and after it, or interpolating it with previous or subsequent data.

This shuffling processing is normally performed in units of one word, so if shuffling is performed after the source coding and inversion processing as described above, convergence of the DSV is not guaranteed after shuffling, and the DC component is suppressed. A problem was identified that resulted in insufficient performance.

``Object of the Invention'' The purpose of the present invention is to provide a digital data transmission device that can perform processing to suppress DC components without increasing the transmission bit rate, and can disperse burst errors by shuffling. It is something.

"Summary of the Invention" This invention sets data of two samples of correlated digital information signals, and uses this set as a unit to invert data of one of the two samples to form complementary data. However, by combining this complementary data with the data of the other sample of the two samples, the DC component of the signal is suppressed, and
Shuffling processing is performed to change the chronological order of this set as a unit, and the shuffled digital data is transmitted.

Embodiment In this embodiment, the present invention is applied to a digital VTR that records digital video signals on a magnetic tape.

In FIG. 1, 1 is an input terminal to which a video signal is supplied, and 2 is an A/D converter that converts this video signal into a digital signal. 1 sample 8 output from this A/D converter 2
Bits of digital video data are supplied to a source encoder 3.

The source encoder 3 converts the natural binary code from the A/D converter 2 one-to-one into 8-bit code words classified by CDS, and this conversion table is written.
It is composed of ROM.

Figure 2 shows the natural binary code 256
This figure shows an example of the correspondence between code words and words. In Figure 2, the original value is
means the decimal representation of the natural binary code obtained from the A/D converter 2; the replacement value means the decimal representation of the code word to be replaced;
DSVCC indicates this codeword.

As can be understood from FIG. 2, codewords having the same CDS value are assigned to adjacent pieces of video data, ie, correlated data. Furthermore, when it is not possible to allocate the same codeword of CDS despite correlated data, a codeword with as small a difference in CDS as possible is allocated.

The output data of the source encoder 3 is inverted by the inverting circuit 4.
is supplied to This inversion circuit 4 performs inversion processing for each word of continuous video data.
The output of source encoder 3 is (W ₁ , W ₂ , W ₃ ,
W ₄ , W ₅ ...) (Wi represents one word of the code word), the inversion circuit 4 converts (W ₁ , ₂ , W ₃ , ₄ , W ₅ ...) ( to 0 and 1 indicates one word of the inverted complementary code word). This inversion circuit 4
The output data is such that the CDS values of adjacent code words are approximately equal and have opposite polarities,
The DSV converges to 0, and the DC component is suppressed. For example, in Figure 2A, "original value"
53 Replacement value 49'' and the data word (DSVCC) [00110001] with a CDS of -2 is inverted.
This is converted to [11001110]. This value corresponds to the "original value 202 replacement value 206" data word, and its CDS is +2. That is, in this case, the complementary word of the data word from the source encoder 3 is a word in which the positive/negative polarity of the CDS is opposite to that of the original word.

In this way, the inversion circuit 4 alternately obtains intact words and inverted words, and considering that the input video signal is a highly correlated signal, the direct current component is suppressed. is easy to understand.

As for the process in the inverting circuit 4, in addition to inverting every word as described above, it is also possible to invert every two words. In this case, the output data of the inverting circuit 4 is
(W ₁ , W ₂ , ₃ , ₄ , W ₅ , W ₆ , ₇ , ₈ ...).

The output data of this inverting circuit 4 is supplied to a shuffling circuit 5, and the chronological order of the data is rearranged in sets of two words. Shuffling circuit 5
An example is shown in FIG.

In FIG. 3, 21 and 22 indicate RAMs, and write data is supplied to these RAMs 21 and 22 via data selectors 23 and 24, and read data is also supplied via data selectors 23 and 24. Data is retrieved. Further, write addresses or read addresses for the RAMs 21 and 22 are supplied via address selectors 25 and 26. Select signals for data selectors 23, 24 and address selectors 25, 26, RAM2
R/W signal that controls writing and reading of 1 and 22;
Formation of the write address and read address takes place in the memory controller 27.

Inverters 28 and 29 are provided for the select signal and the R/W signal, and the RAM 21 and
The RAM 22 is designed so that during a period when one of them is performing a write operation, the other one performs a read operation, so that continuous data processing can be performed. At the same time, shuffling is performed by controlling write addresses and read addresses. For example, an incremental write address is given to one of the RAMs 21 and 22, and a read address that changes stepwise by a predetermined difference is given to the other one.

Therefore, if the input data of the shuffling circuit 5 is (W ₁ , ₂ , W ₃ , ₄ , W ₅ , ₆ . . . ),
Like (W ₁ , ₂ …W ₃ , ₄ ,…W ₅ , ₆ …),
The output data of the shuffling circuit 5 is obtained by dispersing adjacent data in units of two words at predetermined time intervals.

In addition, when the inversion circuit 4 performs inversion every two words as described above, a complementary two-word set is created among a total of four words, two adjacent non-inverted words and two inverted words. is formed. For example, the four words (W ₁ , W ₂ , ₃ , ₄ ) are made into a set of 2 words (W ₁ , ₃ ) and (W ₂ , ₄ ), and the shuffling process is performed in this unit as well.

The output data of the shuffling circuit 5 is parallel/
The data is converted into serial recording data by a serial converter 6, and supplied to a rotary head 7 via a recording amplifier, a recording/reproduction switching circuit, a rotary transformer, etc. (not shown), and then to a magnetic tape 8. Although the recorded data has been subjected to shuffling processing, the direct current component is suppressed because this shuffling processing is performed in units of two words.

Further, the data reproduced from the magnetic tape 8 by the rotary head 7 is supplied to the serial/parallel converter 11 via a rotary transformer, a recording/reproducing switching circuit, a reproducing amplifier, etc. (not shown), and its output is deshuffled. is supplied to circuit 12. The deshuffling circuit 12 reverses the process of the shuffling circuit 5 and performs a process of restoring the original chronological order in units of two words.

The output data of this deshuafling circuit 12 is supplied to an inverting circuit 13. This inversion circuit 13 is
A code word that has been inverted during recording is inverted and returned to its original code word. The output data of the inversion circuit 13 is supplied to the source decoder 14, and is returned to natural binary data according to the data conversion table shown in FIG. The signal is then supplied to the D/A converter 15, converted back into an analog video signal, and taken out to the output terminal 16.

``Application Example'' Unlike the above embodiment, the present invention may be applied to recording and reproducing a digital color video signal obtained by digitizing (composite encoding) a composite color video signal. Further, the present invention can also be applied to recording and reproducing component-encoded digital color video signals in which each of the three components of a luminance signal and two color difference signals are encoded.

In the case of component encoding, since the bit rate is high, recording is performed by dividing recording data into several channels, for example, two channels. By recording only a luminance signal on one of these channels and recording two color difference signals on the other channel, the effects of source coding and shuffling can be improved.

Furthermore, the present invention can be applied to the transmission of audio signals in addition to video signals.

[Effects of the Invention] According to the present invention, shuffling can be performed without impairing the effect of suppressing the DC component, and when a burst error occurs, error data can be easily corrected. For example (Wi,
₊₁ ), even if both of these two words become error data, the correct two words Wi _-1 and Wi ₊₂ are sent as error data because the recording positions are separated. Data Wi, Wi ₊₁
can be replaced with each of the following. Also, (Wi,
When shuffling is performed in units of two words every other word, as in Wi ₊₂ ), there is an advantage that average value interpolation can be performed using the two correct words located before and after the error data.

FIG. 4 is a graph of the results of a computer simulation used to explain the effect of DC component suppression according to the present invention. The vertical axis of this graph shows the height of the eye part of the eye pattern of the processed data (eye height), and the horizontal axis shows the relative value of the cutoff frequency on the low frequency side of the transmission system with a predetermined passband. be. The cutoff frequency is _c , and the sampling frequency is _s.
(for example, 40MHz), the value of _c / _s is shown on the horizontal axis.

In addition, in FIG. 4, 31 is the simulation result when source coding and shuffling in units of 2 words are performed as in the present invention, and 32, 33, 34, and 35 are the results of other processes to be compared. This is the simulation result when doing this. Furthermore, the broken line 36 indicates the cutoff frequency (160K) on the lower side of an actual rotary head type digital VTR.
Hz). The graph in FIG. 4 shows the change in eye height when the amount of DC component is reduced by gradually increasing the cutoff frequency _c with respect to standard image data. The eye height is 1 V _pp before processing, and decreases as the cutoff frequency _c increases. It is determined that the slower the degree of this decrease, the smaller the DC component in the transmitted data.

In Fig. 4, the simulation result indicated by 32 is obtained when block coding is performed to convert 8-bit data to 10-bit data.
The simulation results shown in 3 are obtained when only source coding was performed without shuffling. In both cases, the rate of decrease in eye height due to the decrease in the transmitted DC component is small;
The effect of suppressing the DC component is slightly better than that of this invention. However, as mentioned above, there are problems with transmission bit rate and error correction ability.

In addition, the simulation results shown in 34 are obtained when data is transmitted using the NRZ method without performing either source coding or channel coding, and the eye height decreases significantly as the DC component decreases. . Furthermore, the simulation results shown at 35 are obtained when source coding similar to that of the present invention is performed, but shuffling is performed on a sample-by-sample basis. It is clear from this result that the DC component suppression effect by source coding is impaired by shuffling in units of one sampling.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of this invention, FIG. 2 is a diagram showing a data conversion table used to explain source coding in an embodiment of this invention, and FIG. 3 is a diagram showing a data conversion table used in this invention. FIG. 4 is a block diagram of an example of a shuffling circuit that can be used, and is a graph used to explain the effect of DC component suppression according to the present invention. 3... Source encoder, 4... Inverting circuit, 5
...Shuffling circuit, 21, 22...RAM.

Claims (1)

[Claims] 1. When converting a digital information signal into code words classified by CDS, code words whose CDS values are approximately the same are assigned to the digital information signals whose values are adjacent to each other. a conversion means for the code word, and two samples of data located every word or several words of the code word as a set,
Using this set as a unit, one of the two samples of data is inverted to form complementary data, and this complementary data is combined with the other of the two samples of data. Therefore, the CDS values are made to be approximately equal and have opposite polarities in adjacent codewords, and as a result, an inverting circuit is used to suppress the DC component, and a shuffling process is used to change the order in time series using the above set as a unit. A digital data transmission device comprising: a shuffling circuit for performing shuffling; and a transmission means for transmitting the shuffled data.