JPH0555191U - Image display - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide an image display device that solves the problem of the shift between a captured image and a D / A converted image. [Construction] The present invention A / D the video signal from the image pickup device 1.
The clock generation circuit is provided with an area for A / D conversion by the conversion circuit 2 and the area for writing the A / D converted image data into the memory 3 and an area for reading from the memory 3 and D / A converted and output by the D / A conversion circuit 7. An image display device comprising: an area setting means for setting based on a clock signal from 5; and a display means 8 for outputting the video signal and the image data, wherein the area setting means 4 includes a clock signal. Counter means 10 for incrementing the count value by 1 only when the image data in the memory is D / A converted and output to the display means 8 and the D / A conversion signal to the display means 8. A flip-flop 11 that operates when outputting

Description

[Detailed description of the device]

[0001]

[Industrial application]

 The present invention relates to an image display device having a function of writing A / D-converted image data in a memory, D / A converting it, and outputting it to a monitor.

[0002]

[Prior Art]

 The video signal from the image pickup device such as a television camera is converted into analog / digital (A / D), the A / D converted image data is written into the memory, and the image data is read out from the memory, and the digital / analog (D) is read. / A) An image display device for converting and outputting to a monitor such as a CRT display is well known.

[0003]

[Problems to be solved by the device]

 However, in the image display device as described above, if the address counter for writing the image data to the memory and the address counter for reading the image data are shared, the image on the monitor will be out of the display area due to the system delay at the time of reading. There is a problem of shifting to the right. Further, as a result of the image being shifted to the right of the display area, there is a problem that indeterminate data appears at the left end of the display area. The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an image display device that solves the problem of the shift between the captured image and the D / A converted image.

[0004]

[Means for Solving the Problems]

 In order to achieve the above object, the present invention, based on a clock signal, an area for A / D converting a video signal from an image pickup device and writing or reading the A / D converted image data into a memory. An image display device having area setting means for setting and display means for outputting the video signal and the image data, wherein the area setting means counts on the basis of a clock signal and stores it in the display means. There is provided counter means for advancing the count value by 1 only when D / A converting the image data in the inside and outputting it, and a flip-flop operating when outputting the D / A converted signal to the displaying means. It is characterized by

[0005]

[Action]

 In the present invention, the circuit is configured so that the least significant bit of the horizontal load value of the address counter as the area setting means is "0" during A / D conversion and "1" during D / A conversion. The address count value for D / A conversion is advanced by 1. The switch (SW) for turning on / off the display area (window area) is configured by using a flip-flop so as to be delayed by one clock when D / A conversion of image data in the memory. More specifically with reference to FIG. 4, as shown in FIG. 4A, a window area (a video signal from the image pickup device is A / D converted on the monitor screen, and the A / D converted image data is stored in a memory. Areas for writing and reading from memory are provided. That is, the area A where the window SW is OFF and the area B where the window SW is ON are set, and when the A / D conversion or D / A conversion is performed, the address counter is constantly advancing and only after loading the initial value. A / D conversion or D / A conversion is started from the time when it becomes 0 ", and after counting a certain number, A / D conversion or D / A conversion is stopped. Therefore, by changing the load value, the image from an arbitrary point (window SW is ON) to an arbitrary point (window SW is OFF) on the screen is A / D converted as shown in FIG. 4 (b). Can be taken into memory. Note that FIG. 4B shows a video signal of one line including a window.

However, if the image data is D / A converted by the circuit as it is, the image converted to D / A as shown in FIG. 4C is caused by a system delay such as a delay due to switching to the D / A conversion side. The output of the signal is delayed by one clock, and as a result, the output timing of the video signal is delayed from the ON timing of the window SW, and the image shifts from the window area. Therefore, in the present invention, the load value of the counter is advanced by 1 at the time of D / A conversion to correct the delay in the output of the D / A converted video signal, and the position with respect to the image before A / D conversion. Correct the deviation. However, if the count value is simply incremented by 1, the timing at which the window switch is turned on will also be advanced, and as a result, the ON timing of the window SW will be faster than the output timing of the video signal, as shown in Fig. 4 (d). , A deviation occurs between the window area and the image position. Therefore, in the present invention, when the switch for turning the window on and off is delayed by one clock when the D / A conversion output of the image data in the memory is delayed, the circuit is configured to correct the ON timing of the window. Then, the output timing of the video signal by D / A conversion is matched. This solves the problem of the difference between the image display position based on the video signal from the camera and the display position of the image obtained by A / D conversion and writing in the memory, reading and D / A conversion.

[0007]

【Example】

 Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. FIG. 1 is a diagram showing an embodiment of an image display device according to the present invention, wherein (a) is a block diagram schematically showing the overall structure of the image display device, and (b) is a region setting means of the image display device. It is a block diagram which shows an example of schematically. In FIG. 1A, reference numeral 1 is an image pickup device such as a television camera, and 2 is A / D conversion (hereinafter referred to as AD conversion (the same applies to DA conversion)) of a video signal from the image pickup device 1 to obtain image data. An AD conversion circuit for outputting, 3 is a frame memory for storing (storing) AD-converted image data, and 4 is a counter for setting an address at the time of AD / DA conversion and an AD / DA conversion area (window area). An address counter circuit as setting means, 5 is a clock generating circuit for generating a clock signal for the AD conversion circuit, the DA conversion circuit and the counter, and 6 is data from the AD conversion circuit 2 and data from the frame memory 3. A multiplexer for switching 7 is DA conversion of the image data from the AD conversion circuit 2 or the image data from the frame memory 3 into a video signal. Nita DA conversion circuit for outputting the 8, 9 instruction to read the image data from the instruction and memory Komu Ri taken image data to the memory, a controller for a switching instruction and the like of the multiplexer. Various display means such as a CRT display and a liquid crystal display can be applied to the monitor 8. Further, FIG. 1B shows the internal configuration of the address counter 4, which is the area setting means, 10 is a counter means, 11 is a flip-flop, and 12 is a multiplexer.

Here, when a clock that samples 700 dots in the horizontal direction as shown in FIG. 2 is used as a shooting area (camera area) of the image pickup apparatus (camera) 1, the entire area is 700 × 525. The number of pixels becomes. When trying to use the 512 × 512 area B in this area as the window area (image data acquisition area) in image processing, only the acquisition area B must be made to function for AD / DA conversion. Absent. Therefore, the address counter 4 is used to count H0 in the horizontal direction and VO in the vertical direction, and during that time, the output of the data strobe signal is stopped to stop the AD / DA conversion, and the H1 · V1 of the capture area B is stopped. A circuit for outputting a data strobe signal to operate AD / DA conversion only during the period is added. Actually, as the counter means 10 of the address counter 4, the structure shown in FIG. For example, when it is desired to set V0 = 5 and H0 = 10 in FIG. 2, the value of V load of the counter means of FIG. 3 (a) is 1FBh in hexadecimal system (0111111010 in binary system) and the value of H load is 1F6h ( 0111110101), the V-direction counter value is 200h (1000000000) after V0 count, the H-direction counter value is 200h (1000000000) after H0 count, and the AD / DA valid signal (data strobe signal) is It is output and AD / DA conversion becomes effective.

However, when the counter between V1 and H1 is used as it is as an address counter and the counter for AD conversion and the counter for DA conversion are shared, the following problems occur. To do. When the data read from the frame memory 3 is DA-converted and output to the monitor 8, a deviation occurs between the image displayed on the monitor and the reproduced image when it is taken into the frame memory 3. This is because the system is delayed due to the reading from the memory as described above and the output timing of the reproduction signal is deviated, and the timing at which the data designated by the address counter is DA converted becomes the next clock. To wake up. After counting H0, the window SW is turned on and the AD / DA valid signal is output, but undefined data is output at the left end of the capture area H1 in FIG. 2 because the data has not yet been output from the memory. If the AD / DA valid signal disappears after counting H1, the last data of each line will not be displayed on the screen. That is, as described with reference to FIG. 4, indeterminate data is displayed at the left end of the capture area and disappears at the right end.

Therefore, in order to solve the above-mentioned problem, in the present invention, the value of the H-direction counter is incremented by 1 only when the image data in the memory is DA converted. That is, the value of H0 is reduced. Specifically, the counter means 10 of the address counter 4 at the time of DA conversion of the image data in the memory is configured as shown in FIG. That is, by connecting the DA conversion command signal from the controller 9 to the least significant bit of the load value of the H direction counter, H0 becomes an even number during AD conversion and H0 becomes an odd number that is one less than that during DA conversion. Therefore, the DA-converted image of the image data in the memory can be displayed at the same position (display position on the monitor) as when AD conversion was performed.

Further, as a solution to the above, as shown in FIG. 1B, a flip-flop 11 and a multiplexer 12 are provided in the address counter 4 and the controller 9 is used when DA conversion of image data in the memory is performed. It suffices to operate the multiplexer 12 by a signal, switch the circuit to the flip-flop side by the multiplexer 12, and output the AD / DA valid signal from the counter means 10 through the flip-flop 11. That is, if the signal from the clock generation circuit 5 is input to the CK terminal of the flip-flop 11 and the AD / DA valid signal is transferred from D to Q of the flip-flop 11 in synchronization with this clock signal, the result is obtained. This means that the output timing of the AD / DA effective signal is delayed by one clock, the ON timing of the window SW and the output timing of the reproduced image match, and the same position as when AD conversion was performed (on the monitor It is possible to display a DA conversion reproduced image without image breakage at the display position).

[0012]

[Effect of the device]

 As described above, in the image display device of the present invention, the count value is set to 1 only when the area setting means counts based on the clock signal and D / A converts the image data in the memory to the monitor for output. By providing the counter means to be advanced and the flip-flop that operates when the D / A conversion signal is output to the monitor, the output timing of the A / D conversion of the image data and the output of The problem of delay can be solved, and the problem of display area shift can be solved. Therefore, it is possible to solve the problem of the deviation between the display position of the image by the video signal from the camera and the display position of the image obtained by A / D conversion and writing in the memory, reading and D / A conversion.

[Brief description of drawings]

1A and 1B are diagrams showing an embodiment of an image display device according to the present invention, in which FIG. 1A is a block diagram schematically showing the overall configuration of the image display device, and FIG. 1B is a region setting means of the image display device. It is a block diagram which shows an example of schematically.

FIG. 2 is an explanatory diagram of a data acquisition area (area setting range) for a camera area.

3A and 3B are explanatory diagrams of a counter means of an address counter, FIG. 3A is a diagram showing a state when a video signal is A / D converted and written, and FIG. 3B is a diagram showing image data being D / A converted. It is a figure which shows the state at the time of outputting.

FIG. 4 is an explanatory diagram of a problem of a D / A converted image shift of an image display device and a solution thereof.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Camera (imaging device) 2 ... AD conversion circuit 3 ... Frame memory 4 ... Address counter (area setting means) 5 ... Clock generation circuit 6 ... Multiplexer 7 ... DA Conversion circuit 8 ... Monitor (display means) 9 ... Controller 10 ... Counter means 11 ... Flip-flop 12 ... Multiplexer

Claims (1)

[Scope of utility model registration request] 1. A / D conversion of a video signal from an image pickup device,
Image display having area setting means for setting an area for writing or reading the A / D converted image data in the memory based on a clock signal, and display means for outputting the video signal and the image data In the device, the area setting means counts based on a clock signal, and the count means advances the count value by one only when the image data in the memory is D / A converted and output to the display means. And an flip-flop that operates when the D / A converted signal is output to the display means.