JPH0555451A - Semiconductor device - Google Patents

Abstract

(57) [Abstract] [Purpose] A semiconductor device including a plurality of chips, having a high packaging density, having a voltage stabilizing circuit for supplying a current to the plurality of chips and a temperature control circuit for controlling the temperature of the plurality of chips. The purpose is to provide a device. [Structure] A large chip 1 on which active circuits 1a and 1b are formed,
Multilayer wiring layer 3 and multilayer wiring layer 3 formed on the large chip 1
Has a plurality of small chips 2a to 2f bonded to each other, and the multilayer wiring layer 3 has a wiring layer and a plurality of small chips connected to the active circuits 1a and 1b.
The semiconductor device has a wiring layer connected to 2a to 2f. Further, the active circuit is composed of a semiconductor device including a voltage stabilizing circuit 1a that supplies electric power to a plurality of small chips 2a to 2f. Further, the active circuit is composed of a semiconductor device including a temperature control circuit 1b for controlling the temperature of the plurality of small chips 2a to 2f.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a chip-on-chip structure including a plurality of chips.

For semiconductor devices and mounting boards in recent years,
High-speed operation and high-density mounting are required. In mounting a semiconductor device, it is necessary to mount a plurality of semiconductor devices to increase the mounting density rather than mounting a single semiconductor device on a mounting board. In addition, a mounting board structure that supports high-speed operation and a mounting board structure that includes a cooling mechanism that efficiently removes heat generated due to high density are required.

[0003]

2. Description of the Related Art In the conventional high-density packaging for high-speed operation, a multi-chip module type is adopted, and active elements such as transistors and diodes are not mounted on the mounting board side, and wiring layers, interlayer insulating films, A mounting board consisting of a board and a cooling mechanism was used.

However, as the scale of a device using a large number of semiconductor devices such as an electronic computer and a communication device increases, the heat generated from the semiconductor device also increases, and the mechanism for cooling the semiconductor device also expands. ing. Since this cooling mechanism is always operating on all boards on which semiconductor devices are mounted, it means that even the mounting boards that are originally in a suspended state that are not needed are cooled, and the cooling mechanism is larger than necessary. Now, the power consumption of devices such as electronic computers and communication devices has been decided by the cooling mechanism.

Therefore, it is desirable to have a mounting board which has a cooling mechanism of an appropriate scale and exhibits a required cooling capacity when needed. In addition, it is desirable to mount multiple chips at high density, including a voltage stabilization circuit that supplies stable power to multiple chips, and to support high-speed operation of signals output from multiple chips.

[0006]

SUMMARY OF THE INVENTION In view of the above problems, the present invention provides a high-density packaged semiconductor device in consideration of high-speed operation of multiple chips, supply of stable voltage to multiple chips, and efficient cooling of multiple chips. The purpose is to provide.

[0007]

1 (a) and 1 (b) are sectional views showing a semiconductor device of the present invention, FIG. 2 is an explanatory view of an embodiment, and FIG.
Is an explanatory view of another embodiment, FIG. 4 is a sectional view showing an example of a multilayer wiring layer, and FIG. 5 is a sectional view showing another example of a multilayer wiring layer.

The above problem is solved by the large chip 1 on which the active circuits 1a and 1b are formed, the multilayer wiring layer 3 formed on the large chip 1, and the plurality of small chips 2a bonded to the multilayer wiring layer 3. 2f
And the multilayer wiring layer 3 is solved by a semiconductor device having a wiring layer connected to the active circuits 1a and 1b and a wiring layer connected to the plurality of small chips 2a to 2f.

Further, the active circuit includes the plurality of small chips 2a.
It is solved by a semiconductor device including a voltage stabilizing circuit 1a that supplies power to 2f. Further, the active circuit is solved by a semiconductor device including a temperature control circuit 1b that controls the temperature of the plurality of small chips 2a to 2f.

The insulating film 16 between the wiring layer connected to the active circuits 1a and 1b and the wiring layer connected to the plurality of small chips 2a to 2f has a thickness of 10 μm or more and 20 μm or less of silicon oxide. It is solved by a semiconductor device which is a film.

[0011]

In the present invention, as shown in FIGS. 1A and 1B, a plurality of small chips 2a to 2f are mounted on the large chip 1. Figure 1
(a) is an example in which the main surface of the large chip 1 and the main surfaces of the plurality of small chips 2a to 2f are arranged in parallel, and FIG. 1 (b) is the main surface of the large chip 1 and the plurality of small chips 2a to 2f. This is an example in which the main surface of is arranged vertically.

In the present invention, an active circuit is also formed on the large chip 1 on which a plurality of small chips 2a to 2f are mounted, and the active circuit is given various functions. For example, by forming the voltage stabilizing circuit 1a for supplying electric power to the plurality of small chips 2a to 2f on the large chip 1, it is possible to implement higher density packaging than in the past.

Further, the large chip 1 is provided with a plurality of small chips 2a ...
By forming the temperature control circuit 1b for controlling the temperature of 2f, it is possible to efficiently cool the plurality of small chips 2a to 2f and reduce the power consumption.

Also, an insulating film between the wiring layer connected to the active circuits 1a and 1b and the wiring layer connected to the plurality of small chips 2a to 2f.
By forming a silicon oxide film having a thickness of 10 μm or more and 20 μm or less as 16, it is possible to reduce the signal propagation delay from the small chips 2a to 2f and prevent the insulating film 16 from cracking. ..

[0015]

[Embodiment] FIG. 2 is an explanatory view of an embodiment.
Is a voltage stabilizing circuit, 1b is a temperature control circuit, 2a to 2f are small chips, 3 is a multi-layer wiring layer, 4 is a joint and a bump, 5 is a housing, 6 is a coolant opening / closing valve, and 7 is an external power supply. ..

The large chip 1 is, for example, a square Si single crystal substrate with an 8 inch diagonal cut out from an 8 inch wafer, and a voltage stabilizing circuit 1a and a temperature control circuit 1b are formed therein.

A multi-layer wiring layer 3 is formed on the large chip 1. Small chips 2a to 2f are bonded to the multilayer wiring layer 3 by bumps 4. The multilayer wiring layer 3 includes a wiring layer and an interlayer insulating film,
The wiring layer includes signal paths from the small chips 2a to 2f, power supply from the external power source 7 to the voltage stabilizing circuit 1a of the large chip 1, power supply from the voltage stabilizing circuit 1a to the small chips 2a to 2f, and voltage stabilizing circuit 1a. Has a role of supplying power from the temperature control circuit 1b to the temperature control circuit 1b.

The large chip 1 on which the small chips 2a to 2f are mounted is housed in the housing 5 and cooled by a cooling liquid circulating in the housing 5, for example, a fluorocarbon liquid. The voltage stabilizing circuit 1a supplies the small chips 2a to 2f with a voltage that does not depend on the load. In the temperature control circuit 1b, for example, a temperature-sensitive diode bridge circuit is formed, and when the temperature of the large chip 1 rises due to the heat generated by the load of the small chips 2a to 2f, it is cooled when it reaches a preset temperature. The liquid opening / closing valve 6 is opened to circulate the cooling liquid in the housing 5, and the cooling liquid opening / closing valve 6 is closed when the temperature of the large chip 1 is lowered by the circulation of the cooling liquid and reaches a preset temperature.

In this way, the temperature of the large chip 1 equipped with the small chips 2a to 2f can be properly maintained even if the cooling liquid is not constantly circulated, and the power consumption for cooling is reduced as compared with the conventional case. Savings can be made and the cooling mechanism can be made compact.

FIG. 3 is an explanatory view of another embodiment, which is an example in which a forced air cooling method is adopted instead of the direct cooling method using the cooling liquid. Reference numerals are the same as those in FIG. 2, and 8 is a cooling fin and 9 is a cooling fan.

Also in this case, as in the above example, the small chip 2a
When the large chip 1 reaches a preset temperature by the heat generated by the load of ~ 2f, the cooling fan 9 is operated to perform forced air cooling, and when the temperature of the large chip 1 drops to the preset temperature, the cooling fan 9 Stop.

In this way, the temperature of the large chip 1 having the small chips 2a to 2f can be properly maintained even if the cooling fan 9 is not always operated. FIG. 4 is a sectional view showing an example of a multilayer wiring layer.

Numerals 11, 12 and 13 are signal wirings for transmitting the signal of the small chip to another small chip or to the outside through the bump 4. 14, 15 are insulating films, for example, SiO ₂ films. 1
Reference numerals 8 and 19 are wirings on the side of the large chip 1 for guiding the current from the external power supply 7 to the voltage stabilization circuit 1a, the output from the voltage stabilization circuit 1a to the temperature control circuit 1b, and the signal from the temperature control circuit 1b to the outside. Communicate to. 19 is a ground electrode, and insulating film 17 is wiring 18.
A capacitor is formed between the ground electrode 19 and the ground electrode 19 and also serves as a decoupling filter. In order to increase the capacitance of the capacitor, the dielectric constant of the insulating film 17 should be high.

The insulating film 16 between the wiring on the side of the large chip 1 and the wiring on the side of the small chip reduces the propagation delay of the signal transmitted from the small chip to another small chip or from the small chip to the outside, and minimizes the interruption. To increase the frequency, it is necessary to reduce the capacity. For that purpose, it is necessary to reduce the dielectric constant of the insulating film 16 and increase its thickness. This is because the signal propagation delay time t is proportional to the square root of the dielectric constant ε of the interlayer insulating film, the minimum cutoff frequency ω ₀ is proportional to the square root of the thickness d of the interlayer insulating film, and the dielectric constant ε of the interlayer insulating film. This is because it is proportional to the reciprocal of the square root of.

As an example, when SiO ₂ is used as the material of the insulating film 16, the film thickness needs to be 10 μm or more. However, when the thickness is 20 μm or more, the residual stress causes cracks in the SiO ₂ insulating film 16. The condition that does not cause cracking is that the compressive stress is 1.0 × 10 ⁹ dyne / cm ² or less, or the tensile stress is 1.
The range is 0 × 10 ⁸ dyne / cm ² or less, and the above range of the SiO ₂ film thickness corresponds thereto.

FIG. 5 is a sectional view showing another example of the multilayer wiring layer, and the reference numerals are the same as those in FIG. This figure shows a multilayer wiring layer for supplying a stable voltage from the voltage stabilizing circuit 1a of the large chip 1 to the small chip. A contact hole is formed in the insulating film 16 to connect the output terminal of the voltage stabilizing circuit 1a and the wiring on the small chip side.

The number of voltage stabilizing circuits is not limited to one, and a plurality of voltage stabilizing circuits may be formed. The number of layers is not limited to two, and more layers may be formed. Further, the wiring layer on the small chip side is not limited to three layers, and more layers may be formed.

[0028]

As described above, according to the present invention,
A high-density packaged semiconductor device with a small signal propagation delay can be realized. Furthermore, a highly efficient mounting board cooling mechanism can be realized,
Power consumption for cooling can be reduced.

[Brief description of drawings]

1A and 1B are cross-sectional views showing a semiconductor device of the present invention.

FIG. 2 is an explanatory diagram of an example.

FIG. 3 is an explanatory diagram of another embodiment.

FIG. 4 is a cross-sectional view showing an example of a multilayer wiring layer.

FIG. 5 is a cross-sectional view showing another example of a multilayer wiring layer.

[Explanation of symbols]

 1 is a large chip, the single crystal Si substrate 1a is an active circuit, the voltage stabilizing circuit 1b is an active circuit, the temperature control circuits 2a to 2f are small chips 3, the multilayer wiring layer 4 is a bonding portion, and bumps. 5 is a housing 6 is a coolant opening / closing valve 7 is an external power supply 8 is a cooling fin 9 is a cooling fan 11, 12, 13 is a wiring and signal wiring 14, 15, 16, 17, 20 is an insulating film and is an interlayer The insulating film 18 is a wiring, and the power supply wiring 19 is a ground electrode.

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Claims (4)

[Claims] 1. A large chip on which an active circuit (1a, 1b) is formed
(1) and a multilayer wiring layer (3) formed on the large chip (1) and a plurality of small chips (2a to 2f) bonded to the multilayer wiring layer (3) The layer (3) has a wiring layer connected to the active circuits (1a, 1b) and a wiring layer connected to the plurality of small chips (2a to 2f). 2. The active circuit comprises a plurality of small chips (2a ...
2. The semiconductor device according to claim 1, further comprising a voltage stabilizing circuit (1a) for supplying electric power to 2f). 3. The active circuit comprises the plurality of small chips (2a ...
The semiconductor device according to claim 1, further comprising a temperature control circuit (1b) for controlling the temperature of 2f). 4. The insulating film (16) between the wiring layer connected to the active circuit (1a, 1b) and the wiring layer connected to the plurality of small chips (2a to 2f) has a thickness of 10 μm or more. 2. The semiconductor device according to claim 1, which is a silicon oxide film having a thickness of 20 μm or less.