JPH0562293B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a surface inspection device for inspecting the surface of an object to be inspected, such as a steel plate or an aluminum plate.
In particular, the present invention relates to a surface inspection device that accurately determines the type of flaw on the surface of an object to be inspected.

[Technical background of the invention and its problems]

Conventional devices of this type use an industrial television camera to optically scan the transported object from one end of the object to the other in its width direction, capturing an image of the surface of the object. , the analog signal of the surface image is binarized and further divided in the width direction to obtain quantized data. After comparing and adding the quantized previous data and current data to create a histogram, the histogram is read out for a certain length of the inspected object for each division. The one with the largest number of defects was determined to be a representative flaw, and the type of flaw was determined from the width and area of the representative flaw.

However, in the case of a linear flaw pattern 1 in which a large number of linear flaws are gathered as shown in FIG. 2a, the flaw determination means described above uses arrow A of the histogram shown in FIG. 2b as a representative flaw. Because of the evaluation, many linear flaws other than A cannot be detected. Also, the fourth
If one linear flaw 3 is included in the dot pattern 2 as shown in figure a, the arrow mark 3 in the histogram shown in figure 4 b is evaluated as a representative flaw, so other dot flaws are It has the disadvantage that it is completely ignored, and the type of flaw cannot be accurately determined.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a surface inspection device that accurately determines the type of flaw on an object to be inspected online and in real time.

[Summary of the invention]

The present invention creates a histogram for a certain length of the object to be inspected, performs a height judgment on the fixed length of the object to be inspected in the conveyance direction for each divided section in the width direction, and then performs a judgment in the width direction,
This is a surface inspection device that determines the type of flaw on the object to be inspected from the distribution state of the signals outputted through both of these determinations.

[Embodiments of the invention]

FIG. 1 is a diagram showing an embodiment of the apparatus of the present invention. This device includes an imaging device 12 that optically scans from one end of the object 11 in the width direction to the other end of the object 11 in the width direction to obtain a surface image of the object 11 to be inspected, which is conveyed in the direction of arrow A; a binarization-quantization circuit 13 that obtains binarized data corresponding to representative values of "1" and "0" for each pixel obtained by dividing the surface image obtained by dividing the surface image into a suitable mesh; A histogram creation circuit 14 that creates a histogram from the binary data obtained by the binarization-quantization circuit 13, and a height determination circuit that determines the height and width of the binarized data read from this circuit 14. circuit 15
a width determination circuit 16; a peak number detection circuit 17 that counts signals that have passed through both circuits 15 and 16;
A computer 18 for determining the type of flaw from the output of this circuit 17 is provided. The binarization-quantization circuit 13 obtains binarized data by discriminating the wave height of the analog signal of the surface image output from the imaging device 12 based on a predetermined level, and
It receives pulses from a pulse generator 20 connected to a roller 19 installed on a conveyance line, divides the object 11 to be inspected into appropriate pixels in the width direction, and quantizes the divided pixels. Next, histogram creation circuit 1
4 consists of an adder circuit 141, a main memory 142, a buffer memory 143, a counter 144 for counting pulses from the pulse generator 20, and a control circuit 145. This adder circuit 141 integrates the binarized data by comparing the binarized data of the previous scan and the binarized data of the current scan, which are divided in the width direction of the object 11 to be inspected, for each division. Yes, the main memory 142 is
By inputting the clock CP corresponding to the number of widthwise divisions of 1, the integrated data obtained by the adding circuit 141 is sequentially stored, and a histogram of flaws integrated over a fixed length of the inspection object 11 in the transport direction is created. and memorize it. The buffer memory 143 has a function of temporarily storing the histogram in the main memory 142 and outputting histogram data for a fixed length in the transport direction of the object 11 for each division in the width direction based on a read command from the control circuit 145. I have it too. The counter 144 provides a signal to the control circuit 145 when it receives pulses from the pulse generator 20 in a number corresponding to a fixed length of the object 11 in the transport direction.

The height determination circuit 15 includes a buffer memory 14
Comparison circuit 1 compares the histogram data read from 3 with a predetermined height setting value H, and outputs histogram data exceeding the height setting value H.
51, and an AND gate 152 which outputs the output data of the comparison circuit 151 every time the clock CP is input. Furthermore, the width determination circuit 16 has a counter 161 and a comparison circuit 162, and the counter 161 counts the signal output from the AND gate 152 to obtain the width value of the flaw on the surface of the object to be inspected. For example, when the width is within the width setting value W, the comparison circuit 162 outputs a signal. The peak number detection circuit 17 includes a counter 1 that counts the number of signals output from the comparison circuit 162.
71, and a comparison circuit 172 that determines whether the count value of this counter 171 is equal to or greater than the set value N.
It is made up of.

Next, the operation of the device configured as above will be explained. The object to be inspected 11 is being conveyed in the direction of arrow A on the conveyance line, and at this time, the imaging device 12 installed on the conveyance line detects the object to be inspected 1.
The surface image of the object 11 to be inspected is optically scanned from one end in the width direction to the other end, and a surface image of the object 11 to be inspected is captured for each scan and converted into an analog signal, which is sent to the binarization-quantization circuit 13. This binarization-quantization circuit 13
compares the analog signal of the surface image inputted from the imaging device 12 at a predetermined setting level.
At the same time, the pulse outputted from the pulse generator 20 is divided into appropriate pixels in the width direction of the object to be inspected 11 and quantized.
The digitized data is sequentially supplied to the addition circuit 141. In the adder circuit 141, the binary data for one scan from the previous time input from the main memory 142 and the 2
The binary data for one scan of the current time inputted from the digitization-quantization circuit 13 is compared and added, and the added value is stored in the subsequent main memory 142.

The above-described signal processing is performed for a fixed length of the object 11 in the transport direction, and after creating histograms as shown in FIGS. 2b to 4b, the histograms are transferred to the buffer memory 143. In this case, if a linear flaw pattern 1, a dirt pattern 4, and a dotted flaw pattern 2 as shown in FIGS. 2a, 3a, and 4a occur on the surface of the inspection object 11, the buffer memory 1
43 stores histogram data as shown in FIG. 2b, FIG. 3b, and FIG. 4b.

When the pulse generator 20 outputs a number of pulses corresponding to the fixed length of the object 11 in the transport direction, the counter 144 counts the pulses and gives an operation command to the control circuit 145. At this point, the control circuit 145 starts reading the histogram data from the buffer memory 143. In this case, the object to be inspected 11
A fixed length of the inspection object 11 in the conveying direction is read out at fixed time intervals for each divided section in the width direction. The data read from the buffer memory 143 is compared with the height setting value H in the comparison circuit 151 of the height determination circuit 15, and a signal is outputted to the output terminal of the comparison circuit 151 only when it is equal to or greater than the setting value H. At this time, as the height setting value H, either one of H ₁ or H ₂ or continuously variable as shown in Figures 2 to 4, and furthermore, a height judgment circuit with H ₁ and a height judgment circuit with H ₂ Both height determination circuits may be connected to the histogram creation circuit 14.

Next, the effects of the embodiment configured as described above will be explained.
This will be explained with reference to FIGS.

According to the embodiments described above, it is possible to determine the type of flaw and to extract a representative flaw. For example, in the case of the linear flaw shown in FIG. 2, in the prior art, A, which is the longest (high profile), becomes the representative of this surface, and it is not known that there are other types of linear flaws.

On the other hand, in this example, many signals exceeding the low level _H1 , exceeding the high level _H2 , and within the width setting value W are detected, so FIG. 2 shows a large number of linear flaws. can determine that.

In addition, in the case of Figure 3, the signal exceeding the low level H ₁ is a wide continuous signal, and the signal exceeding the high level H ₂ is a wide continuous signal, which is further within the width setting value W. Since no signal is detected, it can be determined that FIG. 3 is a planar dirt pattern.

In the case of Figure 4, there are many signals exceeding the low level _H1 , and the number exceeding the high level _H2 is the fourth signal.
As shown in Figure B, there is only one piece, and the width setting value W
Since a plurality of signals within the range of 1 to 3 are detected, it can be determined that the flaw in FIG. 4 is a combination of dot-like flaws and linear flaws 3.

Next, the effects described above will be explained in detail. Hereinafter, for convenience of explanation, a case will be described in which a high level _H2 is used as the height setting value.
In this case, in the case of linear flaw pattern 1 in FIG. 2, many signals are generated from the comparison circuit 151, and
In oil stain pattern 4 shown in the figure, a wide continuous signal is generated. In the case of point-like flaw pattern 2 in FIG. 4, only one signal is generated. The signal outputted from the comparison circuit 151 in this manner is counted by the counter 161 of the width determination circuit 16 through an AND gate 152 which is gated on by the high speed clock CP. This counter 161 is reset, for example, when the output terminal of the comparison circuit 151 falls. The count value of the counter 161 is sent to a comparison circuit 162, where it is compared with the width setting value W, and when the count value is within the width setting value W, a signal is output. Therefore, the width determination circuit 16 generates a signal in the case of a flaw pattern 2 that is a combination of a linear flaw pattern 3 and a dotted flaw pattern as shown in FIG. No signal is output when the stain pattern is 4. The signal outputted from the width determination circuit 16 in this way is counted by the counter 171 of the subsequent peak number detection circuit 17, but this count value is further compared with a set value N, and when it is greater than or equal to N, a line is sent to the computer 18. It is determined that the pattern is defect pattern 1. If the height setting value H ₁
If the height judgment circuit 15 of , the width judgment circuit 16 that outputs a signal within the width setting value W, and the peak number detection circuit 17 that outputs a signal of the setting value N are added to FIG. It can be determined that the spot flaw pattern 2 is based on the signal output from the point flaw pattern 2. Furthermore, by increasing the width setting value W and preventing the width determination circuit 16 from outputting a signal when it is within this W, it is possible to determine that it is a planar dirt pattern based on the output of the peak detection circuit 17. .

〔Effect of the invention〕

As described in detail above, according to the present invention, the data obtained by binarizing and quantizing the surface image in the width direction of the object to be inspected, and converting it into a histogram for a certain length in the transport direction of the object to be inspected, is divided during quantization. The height is determined for each section, the width of the histogram data generated in the width direction is determined, and the signals obtained as a result of the height and width determination are counted to know the distribution state of the flaw, so the type of flaw can be determined. It is possible to determine the correct answer online and in real time, and it is also possible to accurately determine the degree of linearity and dot-likeness. Furthermore, since the peak number can be counted by the peak number detection circuit and immediately used for determination, a surface inspection apparatus that can perform high-speed processing can be provided.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a surface inspection apparatus according to the present invention, and FIGS. 2 to 4 are diagrams showing a flaw pattern on the surface of an object to be inspected and its histogram. 11...Object to be inspected, 12...Imaging device, 13...
... Binarization-quantization circuit, 14... Histogram creation circuit, 15... Height judgment circuit, 16... Width judgment circuit, 17... Peak number detection circuit.

Claims (1)

[Scope of Claims] 1. An imaging device that optically scans from one end to the other end in the width direction of an object to be inspected, which is conveyed from a conveyance line, to obtain a surface image of the object, and a surface obtained by this imaging device. A typical value is associated with each pixel obtained by dividing the image into a suitable mesh.
A binarization-quantization circuit that obtains digitized data compares and adds the binarized data of the previous scan and the binarized data of the current scan from this binarization-quantization circuit to the object to be inspected. a histogram creation circuit that creates a histogram for a constant length in the conveyance direction; and a histogram creation circuit that reads out the histogram for a constant length in the conveyance direction for each divided section in the width direction, compares it with a predetermined height setting value, and determines the height setting value. When you cross the
A height judgment circuit that outputs a signal compares the width value corresponding to the width of the flaw obtained by integrating the clock pulses output from this height judgment circuit with a predetermined width setting value, and determines the width setting value. A surface inspection device comprising: a width determination circuit that outputs a signal when the width is within a set value; and a peak value detection circuit that counts signals from the width determination circuit and detects whether the counted value exceeds a set value.