JPH0567781A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

(57) [Summary] [Purpose] It is suitable as a high-speed driving device such as a large-area display device, and the substrate can be inexpensive. [Structure] A polycrystalline InP layer 2 is provided on a substrate 1 made of a material having a melting point higher than the formation temperature of the polycrystalline InP, and this polycrystalline InP layer 2 has MIS transistors 3, 4, 5, 6, 7
Are formed. Since polycrystalline InP has a large carrier mobility, this MIS transistor 3, 4, 5,
High speed operation of 6 and 7 is possible. Further, the substrate 1 may be any one as long as it has a melting point higher than the formation temperature of polycrystalline InP, and the formation temperature of polycrystalline InP is lower than that of Si or the like, so inexpensive Pyrex glass can be used for this.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device used as a switch element of a display driving device and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a semiconductor device using polycrystalline Si has been used as a switch element, that is, a driving element of a large area display device such as a liquid crystal display (LCD). FIG. 4 is a diagram showing a configuration example of a conventional semiconductor device of this type.

This semiconductor device has, for example, p
Type polycrystalline Si layer 51, and in the polycrystalline Si layer 51, a source 52, a drain 53, and a source 52, a drain 53 formed by doping impurities of a conductivity type opposite to the above, that is, n type A channel region 54 between 53 is provided. In addition, above the channel region 54, SiO ₂
A gate insulating film 55 and the like and a gate electrode 56 are provided, so that the semiconductor device in FIG. 4 is formed with an n-channel type MIS transistor, that is, a device that functions as a thin film transistor (TFT). ..

[0004]

By the way, in order to improve the performance of a large-area display device, it is necessary to select an electrode material and to provide a high-speed driving device. However, when the semiconductor device having the n-channel type device as described above is used as a driving device of a large-area display device, the electron mobility of n (-) type polycrystalline Si is averaged. Since it is as small as about 50 cm ² / V · S, there is a limit in using it as a high speed driving device.

Further, the temperature required for forming polycrystalline Si is 500 ° C. or higher, for example, 600 ° C. to 700 ° C., and processes such as thermal oxidation for forming a TFT and blast annealing such as ion implantation are performed. Since the temperature needed to be as high as 850 ° C. to 1100 ° C., the substrate 5
No. 0 has a drawback that expensive quartz or the like having a melting point higher than the formation temperature of p-type polycrystalline Si must be used.

The present invention is a semiconductor having a structure capable of high-speed operation and suitable for use as a high-speed driving device such as a large-area display device, and having a structure in which a substrate can be made of an inexpensive material. An object is to provide a device and a manufacturing method thereof.

[0007]

In order to achieve the above object, a semiconductor device of the present invention comprises a substrate made of a material having a melting point higher than the temperature at which polycrystalline InP is formed, and a substrate formed on the substrate. A polycrystalline InP layer, and the polycrystalline In
It is characterized in that a predetermined device is formed in the P layer, the substrate is made of Pyrex glass, and the polycrystalline InP layer is made of an intrinsic semiconductor polycrystalline InP.

The method of manufacturing a semiconductor device of the present invention is
The polycrystalline InP is supplied to a substrate made of a material having a melting point higher than the temperature at which the polycrystalline InP is formed, and if necessary, assist ions such as P are emitted toward the substrate at the same time, It is characterized in that a polycrystalline InP layer of an intrinsic semiconductor is formed thereon, and then a predetermined device is formed in the polycrystalline InP layer.

[0009]

In the present invention, the polycrystalline InP is formed on the substrate made of a material having a melting point higher than the temperature at which the polycrystalline InP is formed.
A polycrystalline InP layer, a MIS transistor, for example, is formed as a predetermined device on the polycrystalline InP layer.
Since P has a large carrier mobility, this device, that is, the MIS transistor can be operated at high speed. Further, the substrate may be made of a material having a melting point higher than the temperature at which polycrystalline InP is formed. Since the formation temperature of polycrystalline InP is lower than the formation temperature of polycrystalline Si, the substrate is inexpensive. Pyrex glass can be used. In addition, if the polycrystalline InP layer is formed of polycrystalline InP that is an intrinsic semiconductor, it is possible to provide higher carrier mobility and the like.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an embodiment of a semiconductor device according to the present invention.

The semiconductor device of this embodiment has a substrate 1 and a high-resistivity polycrystalline InP layer (polycrystalline InP layer of an intrinsic semiconductor) formed on the substrate 1, and the polycrystalline InP layer 2
Inside, a source 3 and a drain 4 formed by doping n-type impurities, for example, and a channel region 5 between the source 3 and the drain 4 are provided. In addition, the channel region 5
A gate insulating film 6 and a gate electrode 7 are provided above the semiconductor device, so that the device formed in the semiconductor device of this embodiment is similar to the device formed in the semiconductor device of FIG. , N-channel type MIS transistor, that is, a thin film transistor (TFT).

FIG. 2 is a schematic view of an example of a manufacturing apparatus for manufacturing the semiconductor of this embodiment. The manufacturing apparatus shown in FIG.
In order to form polycrystalline InP as an intrinsic semiconductor on the substrate 1, a polycrystalline InP wafer 20 as a target is formed.
Is irradiated with a predetermined beam to evaporate InP particles from the surface of the polycrystalline InP wafer 20 and sputter it toward the substrate 1, and polycrystalline InP is sputtered and deposited on the substrate 1. An ion beam device 22 for emitting an ion beam of P, Fe, Cr, O or the like as assist ions toward the substrate 1 is sometimes provided.

In order to manufacture the semiconductor device of FIG. 1 by using the manufacturing apparatus as shown in FIG. 2, it is necessary to heat the substrate 1 to the formation temperature of polycrystalline InP. Therefore, the substrate 1 is made of polycrystalline InP. It is necessary to use one having a melting point higher than the formation temperature of. However, since the formation temperature of polycrystalline InP is 500 ° C. or lower, the substrate 1 may be formed of a material having a low melting point of about 600 ° C.
Pyrex glass or the like, which is less expensive than quartz, can be used for the substrate.

In this way, for example, Pyrex glass is selected as the substrate 1, this is attached to a predetermined position of the manufacturing apparatus, and heated to the formation temperature of polycrystalline InP. After that, an ion beam of Ar, for example, is emitted from the sputtering device 21 (for example, an ion beam sputtering device) and is made incident on the polycrystalline InP wafer 20 as a target, and the polycrystalline InP wafer 20 is changed to InP.
The particles are evaporated and sputtered toward the substrate 1, and at the same time, P, Fe, Cr,
At least one kind of O ions is emitted as a beam toward the substrate 1 as assist ions. Thereby, the polycrystalline InP layer 2 of the intrinsic semiconductor can be formed on the substrate 1. Then, by a known method, for example, n-type impurities are doped to form the source 3 and the drain 4 in the polycrystalline InP layer 2, and further the gate insulating film 6 and the gate electrode 7 are formed to form one n A device that functions as a channel-type MIS transistor, that is, a thin film transistor can be manufactured. As a method for forming polycrystalline InP having high mobility, in addition to the above example, InP is vaporized in a cluster form, and the cluster is charged in the middle,
There are also a method of forming the substrate 1 so that it has kinetic energy for deposition, a method of irradiating InP with a high-energy laser beam and depositing InP on the opposing substrate by ablation.

By the way, the electron mobility of the polycrystalline InP thus manufactured is 500 to 1000 cm ² / V · S.
And becomes almost the same as ordinary n-type single crystal Si. Therefore, in the semiconductor device of this embodiment, the operating speed of the thin film transistor formed therein can be made higher than that of the conventional device using polycrystalline Si. Therefore, this can be applied as a high-speed driving device for a large-area display device.

By using polycrystalline InP as an intrinsic semiconductor, not only the electron mobility can be increased, but also the operating voltage threshold of the transistor can be lowered.

Further, in this embodiment, by using polycrystalline InP whose formation temperature is considerably lower than that of polycrystalline Si, the substrate 1 is 850 ° C. as in the case of forming polycrystalline SiTFT.
Since it is not necessary to heat the substrate to a high temperature of 1100 ° C., it is not necessary to use expensive quartz for the substrate 1, and an inexpensive one such as Pyrex glass can be used.

In the above-described embodiments, the semiconductor device in which one n-channel type thin film transistor (TFT) device is formed on the substrate 1 has been described as an example, but a plurality of thin film transistors, for example, n-channels, are formed on the substrate. Mold,
It is also possible to form a complementary MIS (CMIS) device including two p-channel MIS transistors.

In the case of manufacturing such a CMIS device, first, as shown in FIG. 3A, a polycrystalline InP layer 30 of an intrinsic semiconductor is formed on the substrate 1, and this polycrystalline InP layer 30 is formed.
A certain region in the P layer 30 is doped with an n-type impurity to form a source 32 and a drain 33 of an n-channel type MIS transistor 31, and another region in the polycrystalline InP layer 30 is doped with a p-type impurity. Then, the source 35 and the drain 36 of the p-channel type MIS transistor 34 are formed.
Then, as shown in FIG. 3B, a portion 37 of the polycrystalline InP layer 30 between the drain 33 of the n-channel type MIS transistor 31 and the source 35 of the p-channel type MIS transistor 34 is etched or the like. By removing the MIS transistors 31 and 34 from each other, the CMIS device can be formed.

[0020]

As described above, according to the present invention,
Since the polycrystalline InP layer is provided on the substrate made of a material having a melting point higher than the formation temperature of the polycrystalline InP and a predetermined device is formed on the polycrystalline InP layer, high speed operation and high speed operation are possible. It is suitable for use as a driving device, and the substrate can be made of an inexpensive material such as Pyrex glass. In addition, if the polycrystalline InP layer is formed of an intrinsic semiconductor polycrystalline InP, it is possible to have a higher carrier mobility and the like, and it is possible to function as a higher performance device.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of a semiconductor device according to the present invention.

FIG. 2 is a diagram showing an example of a manufacturing apparatus for manufacturing the semiconductor device of FIG.

3A and 3B are diagrams showing an example of a manufacturing process of a CMIS transistor device.

FIG. 4 is a configuration diagram of a conventional semiconductor device.

[Explanation of symbols]

 1 substrate 2 polycrystalline InP layer 3 source 4 drain 5 channel region 6 gate insulating film 7 gate electrode

Claims (4)

[Claims] 1. A substrate made of a material having a melting point higher than the temperature at which polycrystalline InP is formed, and a polycrystalline InP layer formed on the substrate, wherein the polycrystalline InP layer has a predetermined thickness. A semiconductor device having a device formed therein. 2. The semiconductor device according to claim 1, wherein the substrate is made of Pyrex glass. 3. The polycrystalline InP layer is formed of polycrystalline InP which is an intrinsic semiconductor.
The semiconductor device described. 4. The polycrystalline InP is sputtered toward a substrate made of a material having a melting point higher than the temperature at which the polycrystalline InP is formed, and at the same time, predetermined assist ions are emitted toward the substrate, Intrinsic semiconductor polycrystal I on substrate
A method of manufacturing a semiconductor device, comprising forming an nP layer, and then forming a predetermined device in the polycrystalline InP layer.